c1_LIRAssembler.hpp revision 1499:e9ff18c4ace7
1157089Simp/* 2157089Simp * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. 3157089Simp * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4157089Simp * 5157089Simp * This code is free software; you can redistribute it and/or modify it 6157089Simp * under the terms of the GNU General Public License version 2 only, as 7157089Simp * published by the Free Software Foundation. 8157089Simp * 9157089Simp * This code is distributed in the hope that it will be useful, but WITHOUT 10157089Simp * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11157089Simp * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12157089Simp * version 2 for more details (a copy is included in the LICENSE file that 13185265Simp * accompanied this code). 14185265Simp * 15185265Simp * You should have received a copy of the GNU General Public License version 16185265Simp * 2 along with this work; if not, write to the Free Software Foundation, 17185265Simp * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18185265Simp * 19185265Simp * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20185265Simp * or visit www.oracle.com if you need additional information or have any 21185265Simp * questions. 22185265Simp * 23185265Simp */ 24157089Simp 25157089Simpclass Compilation; 26157089Simpclass ScopeValue; 27157089Simpclass BarrierSet; 28157089Simp 29157089Simpclass LIR_Assembler: public CompilationResourceObj { 30157089Simp private: 31235271Simp C1_MacroAssembler* _masm; 32157089Simp CodeStubList* _slow_case_stubs; 33157089Simp BarrierSet* _bs; 34157089Simp 35157089Simp Compilation* _compilation; 36157089Simp FrameMap* _frame_map; 37157089Simp BlockBegin* _current_block; 38157089Simp 39157089Simp Instruction* _pending_non_safepoint; 40157089Simp int _pending_non_safepoint_offset; 41157089Simp 42157089Simp Label _unwind_handler_entry; 43157089Simp 44157089Simp#ifdef ASSERT 45157089Simp BlockList _branch_target_blocks; 46157089Simp void check_no_unbound_labels(); 47157089Simp#endif 48157089Simp 49157089Simp FrameMap* frame_map() const { return _frame_map; } 50157089Simp 51157089Simp void set_current_block(BlockBegin* b) { _current_block = b; } 52157089Simp BlockBegin* current_block() const { return _current_block; } 53157089Simp 54157089Simp // non-safepoint debug info management 55157089Simp void flush_debug_info(int before_pc_offset) { 56157089Simp if (_pending_non_safepoint != NULL) { 57165711Simp if (_pending_non_safepoint_offset < before_pc_offset) 58165711Simp record_non_safepoint_debug_info(); 59157089Simp _pending_non_safepoint = NULL; 60157089Simp } 61157089Simp } 62157089Simp void process_debug_info(LIR_Op* op); 63157089Simp void record_non_safepoint_debug_info(); 64157089Simp 65157089Simp // unified bailout support 66157089Simp void bailout(const char* msg) const { compilation()->bailout(msg); } 67157089Simp bool bailed_out() const { return compilation()->bailed_out(); } 68157089Simp 69235271Simp // code emission patterns and accessors 70157089Simp void check_codespace(); 71213496Scognet bool needs_icache(ciMethod* method) const; 72213496Scognet 73213496Scognet // returns offset of icache check 74213496Scognet int check_icache(); 75213496Scognet 76213496Scognet void jobject2reg(jobject o, Register reg); 77213496Scognet void jobject2reg_with_patching(Register reg, CodeEmitInfo* info); 78213496Scognet 79213496Scognet void emit_stubs(CodeStubList* stub_list); 80213496Scognet 81213496Scognet // addresses 82213496Scognet Address as_Address(LIR_Address* addr); 83213496Scognet Address as_Address_lo(LIR_Address* addr); 84213496Scognet Address as_Address_hi(LIR_Address* addr); 85213496Scognet 86213496Scognet // debug information 87213496Scognet void add_call_info(int pc_offset, CodeEmitInfo* cinfo); 88213496Scognet void add_debug_info_for_branch(CodeEmitInfo* info); 89213496Scognet void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo); 90213496Scognet void add_debug_info_for_div0_here(CodeEmitInfo* info); 91213496Scognet void add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo); 92213496Scognet void add_debug_info_for_null_check_here(CodeEmitInfo* info); 93213496Scognet 94213496Scognet void set_24bit_FPU(); 95213496Scognet void reset_FPU(); 96213496Scognet void fpop(); 97213496Scognet void fxch(int i); 98213496Scognet void fld(int i); 99213496Scognet void ffree(int i); 100213496Scognet 101213496Scognet void breakpoint(); 102213496Scognet void push(LIR_Opr opr); 103213496Scognet void pop(LIR_Opr opr); 104213496Scognet 105213496Scognet // patching 106213496Scognet void append_patching_stub(PatchingStub* stub); 107213496Scognet void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info); 108213496Scognet 109213496Scognet void comp_op(LIR_Condition condition, LIR_Opr src, LIR_Opr result, LIR_Op2* op); 110213496Scognet 111213496Scognet public: 112213496Scognet LIR_Assembler(Compilation* c); 113213496Scognet ~LIR_Assembler(); 114213496Scognet C1_MacroAssembler* masm() const { return _masm; } 115213496Scognet Compilation* compilation() const { return _compilation; } 116213496Scognet ciMethod* method() const { return compilation()->method(); } 117213496Scognet 118213496Scognet CodeOffsets* offsets() const { return _compilation->offsets(); } 119213496Scognet int code_offset() const; 120213496Scognet address pc() const; 121213496Scognet 122213496Scognet int initial_frame_size_in_bytes(); 123213496Scognet 124213496Scognet // test for constants which can be encoded directly in instructions 125213496Scognet static bool is_small_constant(LIR_Opr opr); 126213496Scognet 127213496Scognet static LIR_Opr receiverOpr(); 128213496Scognet static LIR_Opr incomingReceiverOpr(); 129213496Scognet static LIR_Opr osrBufferPointer(); 130213496Scognet 131213496Scognet // stubs 132213496Scognet void emit_slow_case_stubs(); 133213496Scognet void emit_static_call_stub(); 134213496Scognet void emit_code_stub(CodeStub* op); 135213496Scognet void add_call_info_here(CodeEmitInfo* info) { add_call_info(code_offset(), info); } 136213496Scognet 137213496Scognet // code patterns 138213496Scognet int emit_exception_handler(); 139213496Scognet int emit_unwind_handler(); 140213496Scognet void emit_exception_entries(ExceptionInfoList* info_list); 141213496Scognet int emit_deopt_handler(); 142213496Scognet 143213496Scognet void emit_code(BlockList* hir); 144213496Scognet void emit_block(BlockBegin* block); 145213496Scognet void emit_lir_list(LIR_List* list); 146213496Scognet 147213496Scognet // any last minute peephole optimizations are performed here. In 148213496Scognet // particular sparc uses this for delay slot filling. 149213496Scognet void peephole(LIR_List* list); 150213496Scognet 151213496Scognet void emit_string_compare(LIR_Opr left, LIR_Opr right, LIR_Opr dst, CodeEmitInfo* info); 152213496Scognet 153213496Scognet void return_op(LIR_Opr result); 154213496Scognet 155213496Scognet // returns offset of poll instruction 156213496Scognet int safepoint_poll(LIR_Opr result, CodeEmitInfo* info); 157213496Scognet 158213496Scognet void const2reg (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info); 159213496Scognet void const2stack(LIR_Opr src, LIR_Opr dest); 160213496Scognet void const2mem (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info); 161213496Scognet void reg2stack (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack); 162213496Scognet void reg2reg (LIR_Opr src, LIR_Opr dest); 163213496Scognet void reg2mem (LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned); 164213496Scognet void stack2reg (LIR_Opr src, LIR_Opr dest, BasicType type); 165213496Scognet void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type); 166213496Scognet void mem2reg (LIR_Opr src, LIR_Opr dest, BasicType type, 167258820Sian LIR_PatchCode patch_code = lir_patch_none, 168258820Sian CodeEmitInfo* info = NULL, bool unaligned = false); 169258820Sian 170258820Sian void prefetchr (LIR_Opr src); 171258820Sian void prefetchw (LIR_Opr src); 172258820Sian 173258820Sian void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp); 174258820Sian void shift_op(LIR_Code code, LIR_Opr left, jint count, LIR_Opr dest); 175258820Sian 176258820Sian void move_regs(Register from_reg, Register to_reg); 177258820Sian void swap_reg(Register a, Register b); 178258820Sian 179258820Sian void emit_op0(LIR_Op0* op); 180258820Sian void emit_op1(LIR_Op1* op); 181258820Sian void emit_op2(LIR_Op2* op); 182258820Sian void emit_op3(LIR_Op3* op); 183258820Sian void emit_opBranch(LIR_OpBranch* op); 184258820Sian void emit_opLabel(LIR_OpLabel* op); 185258820Sian void emit_arraycopy(LIR_OpArrayCopy* op); 186258820Sian void emit_opConvert(LIR_OpConvert* op); 187258820Sian void emit_alloc_obj(LIR_OpAllocObj* op); 188258820Sian void emit_alloc_array(LIR_OpAllocArray* op); 189258820Sian void emit_opTypeCheck(LIR_OpTypeCheck* op); 190258820Sian void emit_compare_and_swap(LIR_OpCompareAndSwap* op); 191258820Sian void emit_lock(LIR_OpLock* op); 192258820Sian void emit_call(LIR_OpJavaCall* op); 193258820Sian void emit_rtcall(LIR_OpRTCall* op); 194258820Sian void emit_profile_call(LIR_OpProfileCall* op); 195258820Sian void emit_delay(LIR_OpDelay* op); 196258820Sian 197258820Sian void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack); 198258820Sian void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info); 199258820Sian void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op); 200258820Sian 201258820Sian void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest); 202258820Sian 203258820Sian void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack); 204258820Sian void move_op(LIR_Opr src, LIR_Opr result, BasicType type, 205258820Sian LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned); 206258820Sian void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); 207258820Sian void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions 208258820Sian void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op); 209258820Sian void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result); 210258820Sian 211258820Sian void call( LIR_OpJavaCall* op, relocInfo::relocType rtype); 212258820Sian void ic_call( LIR_OpJavaCall* op); 213258820Sian void vtable_call( LIR_OpJavaCall* op); 214258820Sian 215258820Sian void osr_entry(); 216258820Sian 217258820Sian void build_frame(); 218258820Sian 219258820Sian void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info); 220258820Sian void unwind_op(LIR_Opr exceptionOop); 221258820Sian void monitor_address(int monitor_ix, LIR_Opr dst); 222258820Sian 223258820Sian void align_backward_branch_target(); 224258820Sian void align_call(LIR_Code code); 225258820Sian 226258820Sian void negate(LIR_Opr left, LIR_Opr dest); 227258820Sian void leal(LIR_Opr left, LIR_Opr dest); 228258820Sian 229258820Sian void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info); 230258820Sian 231213496Scognet void membar(); 232157089Simp void membar_acquire(); 233 void membar_release(); 234 void get_thread(LIR_Opr result); 235 236 void verify_oop_map(CodeEmitInfo* info); 237 238 #include "incls/_c1_LIRAssembler_pd.hpp.incl" 239}; 240