c1_LIR.cpp revision 0:a61af66fc99e
1/* 2 * Copyright 2000-2006 Sun Microsystems, Inc. All Rights Reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 20 * CA 95054 USA or visit www.sun.com if you need additional information or 21 * have any questions. 22 * 23 */ 24 25# include "incls/_precompiled.incl" 26# include "incls/_c1_LIR.cpp.incl" 27 28Register LIR_OprDesc::as_register() const { 29 return FrameMap::cpu_rnr2reg(cpu_regnr()); 30} 31 32Register LIR_OprDesc::as_register_lo() const { 33 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); 34} 35 36Register LIR_OprDesc::as_register_hi() const { 37 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); 38} 39 40#ifdef IA32 41 42XMMRegister LIR_OprDesc::as_xmm_float_reg() const { 43 return FrameMap::nr2xmmreg(xmm_regnr()); 44} 45 46XMMRegister LIR_OprDesc::as_xmm_double_reg() const { 47 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation"); 48 return FrameMap::nr2xmmreg(xmm_regnrLo()); 49} 50 51#endif 52 53 54#ifdef SPARC 55 56FloatRegister LIR_OprDesc::as_float_reg() const { 57 return FrameMap::nr2floatreg(fpu_regnr()); 58} 59 60FloatRegister LIR_OprDesc::as_double_reg() const { 61 return FrameMap::nr2floatreg(fpu_regnrHi()); 62} 63 64#endif 65 66LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); 67 68LIR_Opr LIR_OprFact::value_type(ValueType* type) { 69 ValueTag tag = type->tag(); 70 switch (tag) { 71 case objectTag : { 72 ClassConstant* c = type->as_ClassConstant(); 73 if (c != NULL && !c->value()->is_loaded()) { 74 return LIR_OprFact::oopConst(NULL); 75 } else { 76 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); 77 } 78 } 79 case addressTag: return LIR_OprFact::intConst(type->as_AddressConstant()->value()); 80 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); 81 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); 82 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); 83 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); 84 default: ShouldNotReachHere(); 85 } 86} 87 88 89LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) { 90 switch (type->tag()) { 91 case objectTag: return LIR_OprFact::oopConst(NULL); 92 case addressTag: 93 case intTag: return LIR_OprFact::intConst(0); 94 case floatTag: return LIR_OprFact::floatConst(0.0); 95 case longTag: return LIR_OprFact::longConst(0); 96 case doubleTag: return LIR_OprFact::doubleConst(0.0); 97 default: ShouldNotReachHere(); 98 } 99 return illegalOpr; 100} 101 102 103 104//--------------------------------------------------- 105 106 107LIR_Address::Scale LIR_Address::scale(BasicType type) { 108 int elem_size = type2aelembytes[type]; 109 switch (elem_size) { 110 case 1: return LIR_Address::times_1; 111 case 2: return LIR_Address::times_2; 112 case 4: return LIR_Address::times_4; 113 case 8: return LIR_Address::times_8; 114 } 115 ShouldNotReachHere(); 116 return LIR_Address::times_1; 117} 118 119 120#ifndef PRODUCT 121void LIR_Address::verify() const { 122#ifdef SPARC 123 assert(scale() == times_1, "Scaled addressing mode not available on SPARC and should not be used"); 124 assert(disp() == 0 || index()->is_illegal(), "can't have both"); 125#endif 126#ifdef _LP64 127 assert(base()->is_cpu_register(), "wrong base operand"); 128 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand"); 129 assert(base()->type() == T_OBJECT || base()->type() == T_LONG, 130 "wrong type for addresses"); 131#else 132 assert(base()->is_single_cpu(), "wrong base operand"); 133 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand"); 134 assert(base()->type() == T_OBJECT || base()->type() == T_INT, 135 "wrong type for addresses"); 136#endif 137} 138#endif 139 140 141//--------------------------------------------------- 142 143char LIR_OprDesc::type_char(BasicType t) { 144 switch (t) { 145 case T_ARRAY: 146 t = T_OBJECT; 147 case T_BOOLEAN: 148 case T_CHAR: 149 case T_FLOAT: 150 case T_DOUBLE: 151 case T_BYTE: 152 case T_SHORT: 153 case T_INT: 154 case T_LONG: 155 case T_OBJECT: 156 case T_ADDRESS: 157 case T_VOID: 158 return ::type2char(t); 159 160 case T_ILLEGAL: 161 return '?'; 162 163 default: 164 ShouldNotReachHere(); 165 } 166} 167 168#ifndef PRODUCT 169void LIR_OprDesc::validate_type() const { 170 171#ifdef ASSERT 172 if (!is_pointer() && !is_illegal()) { 173 switch (as_BasicType(type_field())) { 174 case T_LONG: 175 assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == double_size, "must match"); 176 break; 177 case T_FLOAT: 178 assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == single_size, "must match"); 179 break; 180 case T_DOUBLE: 181 assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == double_size, "must match"); 182 break; 183 case T_BOOLEAN: 184 case T_CHAR: 185 case T_BYTE: 186 case T_SHORT: 187 case T_INT: 188 case T_OBJECT: 189 case T_ARRAY: 190 assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == single_size, "must match"); 191 break; 192 193 case T_ILLEGAL: 194 // XXX TKR also means unknown right now 195 // assert(is_illegal(), "must match"); 196 break; 197 198 default: 199 ShouldNotReachHere(); 200 } 201 } 202#endif 203 204} 205#endif // PRODUCT 206 207 208bool LIR_OprDesc::is_oop() const { 209 if (is_pointer()) { 210 return pointer()->is_oop_pointer(); 211 } else { 212 OprType t= type_field(); 213 assert(t != unknown_type, "not set"); 214 return t == object_type; 215 } 216} 217 218 219 220void LIR_Op2::verify() const { 221#ifdef ASSERT 222 switch (code()) { 223 case lir_cmove: 224 break; 225 226 default: 227 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), 228 "can't produce oops from arith"); 229 } 230 231 if (TwoOperandLIRForm) { 232 switch (code()) { 233 case lir_add: 234 case lir_sub: 235 case lir_mul: 236 case lir_mul_strictfp: 237 case lir_div: 238 case lir_div_strictfp: 239 case lir_rem: 240 case lir_logic_and: 241 case lir_logic_or: 242 case lir_logic_xor: 243 case lir_shl: 244 case lir_shr: 245 assert(in_opr1() == result_opr(), "opr1 and result must match"); 246 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 247 break; 248 249 // special handling for lir_ushr because of write barriers 250 case lir_ushr: 251 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant"); 252 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 253 break; 254 255 } 256 } 257#endif 258} 259 260 261LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) 262 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 263 , _cond(cond) 264 , _type(type) 265 , _label(block->label()) 266 , _block(block) 267 , _ublock(NULL) 268 , _stub(NULL) { 269} 270 271LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) : 272 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 273 , _cond(cond) 274 , _type(type) 275 , _label(stub->entry()) 276 , _block(NULL) 277 , _ublock(NULL) 278 , _stub(stub) { 279} 280 281LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock) 282 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 283 , _cond(cond) 284 , _type(type) 285 , _label(block->label()) 286 , _block(block) 287 , _ublock(ublock) 288 , _stub(NULL) 289{ 290} 291 292void LIR_OpBranch::change_block(BlockBegin* b) { 293 assert(_block != NULL, "must have old block"); 294 assert(_block->label() == label(), "must be equal"); 295 296 _block = b; 297 _label = b->label(); 298} 299 300void LIR_OpBranch::change_ublock(BlockBegin* b) { 301 assert(_ublock != NULL, "must have old block"); 302 _ublock = b; 303} 304 305void LIR_OpBranch::negate_cond() { 306 switch (_cond) { 307 case lir_cond_equal: _cond = lir_cond_notEqual; break; 308 case lir_cond_notEqual: _cond = lir_cond_equal; break; 309 case lir_cond_less: _cond = lir_cond_greaterEqual; break; 310 case lir_cond_lessEqual: _cond = lir_cond_greater; break; 311 case lir_cond_greaterEqual: _cond = lir_cond_less; break; 312 case lir_cond_greater: _cond = lir_cond_lessEqual; break; 313 default: ShouldNotReachHere(); 314 } 315} 316 317 318LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 319 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 320 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, 321 CodeStub* stub, 322 ciMethod* profiled_method, 323 int profiled_bci) 324 : LIR_Op(code, result, NULL) 325 , _object(object) 326 , _array(LIR_OprFact::illegalOpr) 327 , _klass(klass) 328 , _tmp1(tmp1) 329 , _tmp2(tmp2) 330 , _tmp3(tmp3) 331 , _fast_check(fast_check) 332 , _stub(stub) 333 , _info_for_patch(info_for_patch) 334 , _info_for_exception(info_for_exception) 335 , _profiled_method(profiled_method) 336 , _profiled_bci(profiled_bci) { 337 if (code == lir_checkcast) { 338 assert(info_for_exception != NULL, "checkcast throws exceptions"); 339 } else if (code == lir_instanceof) { 340 assert(info_for_exception == NULL, "instanceof throws no exceptions"); 341 } else { 342 ShouldNotReachHere(); 343 } 344} 345 346 347 348LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) 349 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) 350 , _object(object) 351 , _array(array) 352 , _klass(NULL) 353 , _tmp1(tmp1) 354 , _tmp2(tmp2) 355 , _tmp3(tmp3) 356 , _fast_check(false) 357 , _stub(NULL) 358 , _info_for_patch(NULL) 359 , _info_for_exception(info_for_exception) 360 , _profiled_method(profiled_method) 361 , _profiled_bci(profiled_bci) { 362 if (code == lir_store_check) { 363 _stub = new ArrayStoreExceptionStub(info_for_exception); 364 assert(info_for_exception != NULL, "store_check throws exceptions"); 365 } else { 366 ShouldNotReachHere(); 367 } 368} 369 370 371LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, 372 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) 373 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) 374 , _tmp(tmp) 375 , _src(src) 376 , _src_pos(src_pos) 377 , _dst(dst) 378 , _dst_pos(dst_pos) 379 , _flags(flags) 380 , _expected_type(expected_type) 381 , _length(length) { 382 _stub = new ArrayCopyStub(this); 383} 384 385 386//-------------------verify-------------------------- 387 388void LIR_Op1::verify() const { 389 switch(code()) { 390 case lir_move: 391 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); 392 break; 393 case lir_null_check: 394 assert(in_opr()->is_register(), "must be"); 395 break; 396 case lir_return: 397 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); 398 break; 399 } 400} 401 402void LIR_OpRTCall::verify() const { 403 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); 404} 405 406//-------------------visits-------------------------- 407 408// complete rework of LIR instruction visitor. 409// The virtual calls for each instruction type is replaced by a big 410// switch that adds the operands for each instruction 411 412void LIR_OpVisitState::visit(LIR_Op* op) { 413 // copy information from the LIR_Op 414 reset(); 415 set_op(op); 416 417 switch (op->code()) { 418 419// LIR_Op0 420 case lir_word_align: // result and info always invalid 421 case lir_backwardbranch_target: // result and info always invalid 422 case lir_build_frame: // result and info always invalid 423 case lir_fpop_raw: // result and info always invalid 424 case lir_24bit_FPU: // result and info always invalid 425 case lir_reset_FPU: // result and info always invalid 426 case lir_breakpoint: // result and info always invalid 427 case lir_membar: // result and info always invalid 428 case lir_membar_acquire: // result and info always invalid 429 case lir_membar_release: // result and info always invalid 430 { 431 assert(op->as_Op0() != NULL, "must be"); 432 assert(op->_info == NULL, "info not used by this instruction"); 433 assert(op->_result->is_illegal(), "not used"); 434 break; 435 } 436 437 case lir_nop: // may have info, result always invalid 438 case lir_std_entry: // may have result, info always invalid 439 case lir_osr_entry: // may have result, info always invalid 440 case lir_get_thread: // may have result, info always invalid 441 { 442 assert(op->as_Op0() != NULL, "must be"); 443 if (op->_info != NULL) do_info(op->_info); 444 if (op->_result->is_valid()) do_output(op->_result); 445 break; 446 } 447 448 449// LIR_OpLabel 450 case lir_label: // result and info always invalid 451 { 452 assert(op->as_OpLabel() != NULL, "must be"); 453 assert(op->_info == NULL, "info not used by this instruction"); 454 assert(op->_result->is_illegal(), "not used"); 455 break; 456 } 457 458 459// LIR_Op1 460 case lir_fxch: // input always valid, result and info always invalid 461 case lir_fld: // input always valid, result and info always invalid 462 case lir_ffree: // input always valid, result and info always invalid 463 case lir_push: // input always valid, result and info always invalid 464 case lir_pop: // input always valid, result and info always invalid 465 case lir_return: // input always valid, result and info always invalid 466 case lir_leal: // input and result always valid, info always invalid 467 case lir_neg: // input and result always valid, info always invalid 468 case lir_monaddr: // input and result always valid, info always invalid 469 case lir_null_check: // input and info always valid, result always invalid 470 case lir_move: // input and result always valid, may have info 471 case lir_prefetchr: // input always valid, result and info always invalid 472 case lir_prefetchw: // input always valid, result and info always invalid 473 { 474 assert(op->as_Op1() != NULL, "must be"); 475 LIR_Op1* op1 = (LIR_Op1*)op; 476 477 if (op1->_info) do_info(op1->_info); 478 if (op1->_opr->is_valid()) do_input(op1->_opr); 479 if (op1->_result->is_valid()) do_output(op1->_result); 480 481 break; 482 } 483 484 case lir_safepoint: 485 { 486 assert(op->as_Op1() != NULL, "must be"); 487 LIR_Op1* op1 = (LIR_Op1*)op; 488 489 assert(op1->_info != NULL, ""); do_info(op1->_info); 490 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register 491 assert(op1->_result->is_illegal(), "safepoint does not produce value"); 492 493 break; 494 } 495 496// LIR_OpConvert; 497 case lir_convert: // input and result always valid, info always invalid 498 { 499 assert(op->as_OpConvert() != NULL, "must be"); 500 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; 501 502 assert(opConvert->_info == NULL, "must be"); 503 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); 504 if (opConvert->_result->is_valid()) do_output(opConvert->_result); 505 do_stub(opConvert->_stub); 506 507 break; 508 } 509 510// LIR_OpBranch; 511 case lir_branch: // may have info, input and result register always invalid 512 case lir_cond_float_branch: // may have info, input and result register always invalid 513 { 514 assert(op->as_OpBranch() != NULL, "must be"); 515 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; 516 517 if (opBranch->_info != NULL) do_info(opBranch->_info); 518 assert(opBranch->_result->is_illegal(), "not used"); 519 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); 520 521 break; 522 } 523 524 525// LIR_OpAllocObj 526 case lir_alloc_object: 527 { 528 assert(op->as_OpAllocObj() != NULL, "must be"); 529 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; 530 531 if (opAllocObj->_info) do_info(opAllocObj->_info); 532 if (opAllocObj->_opr->is_valid()) do_input(opAllocObj->_opr); 533 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); 534 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); 535 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); 536 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); 537 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); 538 do_stub(opAllocObj->_stub); 539 break; 540 } 541 542 543// LIR_OpRoundFP; 544 case lir_roundfp: { 545 assert(op->as_OpRoundFP() != NULL, "must be"); 546 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; 547 548 assert(op->_info == NULL, "info not used by this instruction"); 549 assert(opRoundFP->_tmp->is_illegal(), "not used"); 550 do_input(opRoundFP->_opr); 551 do_output(opRoundFP->_result); 552 553 break; 554 } 555 556 557// LIR_Op2 558 case lir_cmp: 559 case lir_cmp_l2i: 560 case lir_ucmp_fd2i: 561 case lir_cmp_fd2i: 562 case lir_add: 563 case lir_sub: 564 case lir_mul: 565 case lir_div: 566 case lir_rem: 567 case lir_sqrt: 568 case lir_abs: 569 case lir_log: 570 case lir_log10: 571 case lir_logic_and: 572 case lir_logic_or: 573 case lir_logic_xor: 574 case lir_shl: 575 case lir_shr: 576 case lir_ushr: 577 { 578 assert(op->as_Op2() != NULL, "must be"); 579 LIR_Op2* op2 = (LIR_Op2*)op; 580 581 if (op2->_info) do_info(op2->_info); 582 if (op2->_opr1->is_valid()) do_input(op2->_opr1); 583 if (op2->_opr2->is_valid()) do_input(op2->_opr2); 584 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); 585 if (op2->_result->is_valid()) do_output(op2->_result); 586 587 break; 588 } 589 590 // special handling for cmove: right input operand must not be equal 591 // to the result operand, otherwise the backend fails 592 case lir_cmove: 593 { 594 assert(op->as_Op2() != NULL, "must be"); 595 LIR_Op2* op2 = (LIR_Op2*)op; 596 597 assert(op2->_info == NULL && op2->_tmp->is_illegal(), "not used"); 598 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); 599 600 do_input(op2->_opr1); 601 do_input(op2->_opr2); 602 do_temp(op2->_opr2); 603 do_output(op2->_result); 604 605 break; 606 } 607 608 // vspecial handling for strict operations: register input operands 609 // as temp to guarantee that they do not overlap with other 610 // registers 611 case lir_mul_strictfp: 612 case lir_div_strictfp: 613 { 614 assert(op->as_Op2() != NULL, "must be"); 615 LIR_Op2* op2 = (LIR_Op2*)op; 616 617 assert(op2->_info == NULL, "not used"); 618 assert(op2->_opr1->is_valid(), "used"); 619 assert(op2->_opr2->is_valid(), "used"); 620 assert(op2->_result->is_valid(), "used"); 621 622 do_input(op2->_opr1); do_temp(op2->_opr1); 623 do_input(op2->_opr2); do_temp(op2->_opr2); 624 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); 625 do_output(op2->_result); 626 627 break; 628 } 629 630 case lir_throw: 631 case lir_unwind: { 632 assert(op->as_Op2() != NULL, "must be"); 633 LIR_Op2* op2 = (LIR_Op2*)op; 634 635 if (op2->_info) do_info(op2->_info); 636 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 637 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter 638 assert(op2->_result->is_illegal(), "no result"); 639 640 break; 641 } 642 643 644 case lir_tan: 645 case lir_sin: 646 case lir_cos: { 647 assert(op->as_Op2() != NULL, "must be"); 648 LIR_Op2* op2 = (LIR_Op2*)op; 649 650 // sin and cos need two temporary fpu stack slots, so register 651 // two temp operands. Register input operand as temp to 652 // guarantee that they do not overlap 653 assert(op2->_info == NULL, "not used"); 654 assert(op2->_opr1->is_valid(), "used"); 655 do_input(op2->_opr1); do_temp(op2->_opr1); 656 657 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); 658 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); 659 if (op2->_result->is_valid()) do_output(op2->_result); 660 661 break; 662 } 663 664 665// LIR_Op3 666 case lir_idiv: 667 case lir_irem: { 668 assert(op->as_Op3() != NULL, "must be"); 669 LIR_Op3* op3= (LIR_Op3*)op; 670 671 if (op3->_info) do_info(op3->_info); 672 if (op3->_opr1->is_valid()) do_input(op3->_opr1); 673 674 // second operand is input and temp, so ensure that second operand 675 // and third operand get not the same register 676 if (op3->_opr2->is_valid()) do_input(op3->_opr2); 677 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); 678 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); 679 680 if (op3->_result->is_valid()) do_output(op3->_result); 681 682 break; 683 } 684 685 686// LIR_OpJavaCall 687 case lir_static_call: 688 case lir_optvirtual_call: 689 case lir_icvirtual_call: 690 case lir_virtual_call: { 691 assert(op->as_OpJavaCall() != NULL, "must be"); 692 LIR_OpJavaCall* opJavaCall = (LIR_OpJavaCall*)op; 693 694 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); 695 696 // only visit register parameters 697 int n = opJavaCall->_arguments->length(); 698 for (int i = 0; i < n; i++) { 699 if (!opJavaCall->_arguments->at(i)->is_pointer()) { 700 do_input(*opJavaCall->_arguments->adr_at(i)); 701 } 702 } 703 704 if (opJavaCall->_info) do_info(opJavaCall->_info); 705 do_call(); 706 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); 707 708 break; 709 } 710 711 712// LIR_OpRTCall 713 case lir_rtcall: { 714 assert(op->as_OpRTCall() != NULL, "must be"); 715 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; 716 717 // only visit register parameters 718 int n = opRTCall->_arguments->length(); 719 for (int i = 0; i < n; i++) { 720 if (!opRTCall->_arguments->at(i)->is_pointer()) { 721 do_input(*opRTCall->_arguments->adr_at(i)); 722 } 723 } 724 if (opRTCall->_info) do_info(opRTCall->_info); 725 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); 726 do_call(); 727 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); 728 729 break; 730 } 731 732 733// LIR_OpArrayCopy 734 case lir_arraycopy: { 735 assert(op->as_OpArrayCopy() != NULL, "must be"); 736 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; 737 738 assert(opArrayCopy->_result->is_illegal(), "unused"); 739 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); 740 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); 741 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); 742 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); 743 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); 744 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); 745 if (opArrayCopy->_info) do_info(opArrayCopy->_info); 746 747 // the implementation of arraycopy always has a call into the runtime 748 do_call(); 749 750 break; 751 } 752 753 754// LIR_OpLock 755 case lir_lock: 756 case lir_unlock: { 757 assert(op->as_OpLock() != NULL, "must be"); 758 LIR_OpLock* opLock = (LIR_OpLock*)op; 759 760 if (opLock->_info) do_info(opLock->_info); 761 762 // TODO: check if these operands really have to be temp 763 // (or if input is sufficient). This may have influence on the oop map! 764 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); 765 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); 766 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); 767 768 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); 769 assert(opLock->_result->is_illegal(), "unused"); 770 771 do_stub(opLock->_stub); 772 773 break; 774 } 775 776 777// LIR_OpDelay 778 case lir_delay_slot: { 779 assert(op->as_OpDelay() != NULL, "must be"); 780 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; 781 782 visit(opDelay->delay_op()); 783 break; 784 } 785 786// LIR_OpTypeCheck 787 case lir_instanceof: 788 case lir_checkcast: 789 case lir_store_check: { 790 assert(op->as_OpTypeCheck() != NULL, "must be"); 791 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; 792 793 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); 794 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); 795 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); 796 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); 797 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); 798 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); 799 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); 800 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); 801 do_stub(opTypeCheck->_stub); 802 break; 803 } 804 805// LIR_OpCompareAndSwap 806 case lir_cas_long: 807 case lir_cas_obj: 808 case lir_cas_int: { 809 assert(op->as_OpCompareAndSwap() != NULL, "must be"); 810 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; 811 812 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); 813 if (opCompareAndSwap->_addr->is_valid()) do_input(opCompareAndSwap->_addr); 814 if (opCompareAndSwap->_cmp_value->is_valid()) do_input(opCompareAndSwap->_cmp_value); 815 if (opCompareAndSwap->_new_value->is_valid()) do_input(opCompareAndSwap->_new_value); 816 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); 817 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); 818 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); 819 820 break; 821 } 822 823 824// LIR_OpAllocArray; 825 case lir_alloc_array: { 826 assert(op->as_OpAllocArray() != NULL, "must be"); 827 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; 828 829 if (opAllocArray->_info) do_info(opAllocArray->_info); 830 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); 831 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); 832 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); 833 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); 834 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); 835 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); 836 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); 837 do_stub(opAllocArray->_stub); 838 break; 839 } 840 841// LIR_OpProfileCall: 842 case lir_profile_call: { 843 assert(op->as_OpProfileCall() != NULL, "must be"); 844 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; 845 846 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); 847 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); 848 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); 849 break; 850 } 851 852 default: 853 ShouldNotReachHere(); 854 } 855} 856 857 858void LIR_OpVisitState::do_stub(CodeStub* stub) { 859 if (stub != NULL) { 860 stub->visit(this); 861 } 862} 863 864XHandlers* LIR_OpVisitState::all_xhandler() { 865 XHandlers* result = NULL; 866 867 int i; 868 for (i = 0; i < info_count(); i++) { 869 if (info_at(i)->exception_handlers() != NULL) { 870 result = info_at(i)->exception_handlers(); 871 break; 872 } 873 } 874 875#ifdef ASSERT 876 for (i = 0; i < info_count(); i++) { 877 assert(info_at(i)->exception_handlers() == NULL || 878 info_at(i)->exception_handlers() == result, 879 "only one xhandler list allowed per LIR-operation"); 880 } 881#endif 882 883 if (result != NULL) { 884 return result; 885 } else { 886 return new XHandlers(); 887 } 888 889 return result; 890} 891 892 893#ifdef ASSERT 894bool LIR_OpVisitState::no_operands(LIR_Op* op) { 895 visit(op); 896 897 return opr_count(inputMode) == 0 && 898 opr_count(outputMode) == 0 && 899 opr_count(tempMode) == 0 && 900 info_count() == 0 && 901 !has_call() && 902 !has_slow_case(); 903} 904#endif 905 906//--------------------------------------------------- 907 908 909void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { 910 masm->emit_call(this); 911} 912 913void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { 914 masm->emit_rtcall(this); 915} 916 917void LIR_OpLabel::emit_code(LIR_Assembler* masm) { 918 masm->emit_opLabel(this); 919} 920 921void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { 922 masm->emit_arraycopy(this); 923 masm->emit_code_stub(stub()); 924} 925 926void LIR_Op0::emit_code(LIR_Assembler* masm) { 927 masm->emit_op0(this); 928} 929 930void LIR_Op1::emit_code(LIR_Assembler* masm) { 931 masm->emit_op1(this); 932} 933 934void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { 935 masm->emit_alloc_obj(this); 936 masm->emit_code_stub(stub()); 937} 938 939void LIR_OpBranch::emit_code(LIR_Assembler* masm) { 940 masm->emit_opBranch(this); 941 if (stub()) { 942 masm->emit_code_stub(stub()); 943 } 944} 945 946void LIR_OpConvert::emit_code(LIR_Assembler* masm) { 947 masm->emit_opConvert(this); 948 if (stub() != NULL) { 949 masm->emit_code_stub(stub()); 950 } 951} 952 953void LIR_Op2::emit_code(LIR_Assembler* masm) { 954 masm->emit_op2(this); 955} 956 957void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { 958 masm->emit_alloc_array(this); 959 masm->emit_code_stub(stub()); 960} 961 962void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { 963 masm->emit_opTypeCheck(this); 964 if (stub()) { 965 masm->emit_code_stub(stub()); 966 } 967} 968 969void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { 970 masm->emit_compare_and_swap(this); 971} 972 973void LIR_Op3::emit_code(LIR_Assembler* masm) { 974 masm->emit_op3(this); 975} 976 977void LIR_OpLock::emit_code(LIR_Assembler* masm) { 978 masm->emit_lock(this); 979 if (stub()) { 980 masm->emit_code_stub(stub()); 981 } 982} 983 984 985void LIR_OpDelay::emit_code(LIR_Assembler* masm) { 986 masm->emit_delay(this); 987} 988 989 990void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { 991 masm->emit_profile_call(this); 992} 993 994 995// LIR_List 996LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) 997 : _operations(8) 998 , _compilation(compilation) 999#ifndef PRODUCT 1000 , _block(block) 1001#endif 1002#ifdef ASSERT 1003 , _file(NULL) 1004 , _line(0) 1005#endif 1006{ } 1007 1008 1009#ifdef ASSERT 1010void LIR_List::set_file_and_line(const char * file, int line) { 1011 const char * f = strrchr(file, '/'); 1012 if (f == NULL) f = strrchr(file, '\\'); 1013 if (f == NULL) { 1014 f = file; 1015 } else { 1016 f++; 1017 } 1018 _file = f; 1019 _line = line; 1020} 1021#endif 1022 1023 1024void LIR_List::append(LIR_InsertionBuffer* buffer) { 1025 assert(this == buffer->lir_list(), "wrong lir list"); 1026 const int n = _operations.length(); 1027 1028 if (buffer->number_of_ops() > 0) { 1029 // increase size of instructions list 1030 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); 1031 // insert ops from buffer into instructions list 1032 int op_index = buffer->number_of_ops() - 1; 1033 int ip_index = buffer->number_of_insertion_points() - 1; 1034 int from_index = n - 1; 1035 int to_index = _operations.length() - 1; 1036 for (; ip_index >= 0; ip_index --) { 1037 int index = buffer->index_at(ip_index); 1038 // make room after insertion point 1039 while (index < from_index) { 1040 _operations.at_put(to_index --, _operations.at(from_index --)); 1041 } 1042 // insert ops from buffer 1043 for (int i = buffer->count_at(ip_index); i > 0; i --) { 1044 _operations.at_put(to_index --, buffer->op_at(op_index --)); 1045 } 1046 } 1047 } 1048 1049 buffer->finish(); 1050} 1051 1052 1053void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { 1054 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); 1055} 1056 1057 1058void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1059 append(new LIR_Op1( 1060 lir_move, 1061 LIR_OprFact::address(addr), 1062 src, 1063 addr->type(), 1064 patch_code, 1065 info)); 1066} 1067 1068 1069void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1070 append(new LIR_Op1( 1071 lir_move, 1072 LIR_OprFact::address(address), 1073 dst, 1074 address->type(), 1075 patch_code, 1076 info, lir_move_volatile)); 1077} 1078 1079void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1080 append(new LIR_Op1( 1081 lir_move, 1082 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1083 dst, 1084 type, 1085 patch_code, 1086 info, lir_move_volatile)); 1087} 1088 1089 1090void LIR_List::prefetch(LIR_Address* addr, bool is_store) { 1091 append(new LIR_Op1( 1092 is_store ? lir_prefetchw : lir_prefetchr, 1093 LIR_OprFact::address(addr))); 1094} 1095 1096 1097void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1098 append(new LIR_Op1( 1099 lir_move, 1100 LIR_OprFact::intConst(v), 1101 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1102 type, 1103 patch_code, 1104 info)); 1105} 1106 1107 1108void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1109 append(new LIR_Op1( 1110 lir_move, 1111 LIR_OprFact::oopConst(o), 1112 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1113 type, 1114 patch_code, 1115 info)); 1116} 1117 1118 1119void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1120 append(new LIR_Op1( 1121 lir_move, 1122 src, 1123 LIR_OprFact::address(addr), 1124 addr->type(), 1125 patch_code, 1126 info)); 1127} 1128 1129 1130void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1131 append(new LIR_Op1( 1132 lir_move, 1133 src, 1134 LIR_OprFact::address(addr), 1135 addr->type(), 1136 patch_code, 1137 info, 1138 lir_move_volatile)); 1139} 1140 1141void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1142 append(new LIR_Op1( 1143 lir_move, 1144 src, 1145 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1146 type, 1147 patch_code, 1148 info, lir_move_volatile)); 1149} 1150 1151 1152void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1153 append(new LIR_Op3( 1154 lir_idiv, 1155 left, 1156 right, 1157 tmp, 1158 res, 1159 info)); 1160} 1161 1162 1163void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1164 append(new LIR_Op3( 1165 lir_idiv, 1166 left, 1167 LIR_OprFact::intConst(right), 1168 tmp, 1169 res, 1170 info)); 1171} 1172 1173 1174void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1175 append(new LIR_Op3( 1176 lir_irem, 1177 left, 1178 right, 1179 tmp, 1180 res, 1181 info)); 1182} 1183 1184 1185void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1186 append(new LIR_Op3( 1187 lir_irem, 1188 left, 1189 LIR_OprFact::intConst(right), 1190 tmp, 1191 res, 1192 info)); 1193} 1194 1195 1196void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 1197 append(new LIR_Op2( 1198 lir_cmp, 1199 condition, 1200 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), 1201 LIR_OprFact::intConst(c), 1202 info)); 1203} 1204 1205 1206void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { 1207 append(new LIR_Op2( 1208 lir_cmp, 1209 condition, 1210 reg, 1211 LIR_OprFact::address(addr), 1212 info)); 1213} 1214 1215void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1216 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { 1217 append(new LIR_OpAllocObj( 1218 klass, 1219 dst, 1220 t1, 1221 t2, 1222 t3, 1223 t4, 1224 header_size, 1225 object_size, 1226 init_check, 1227 stub)); 1228} 1229 1230void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { 1231 append(new LIR_OpAllocArray( 1232 klass, 1233 len, 1234 dst, 1235 t1, 1236 t2, 1237 t3, 1238 t4, 1239 type, 1240 stub)); 1241} 1242 1243void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1244 append(new LIR_Op2( 1245 lir_shl, 1246 value, 1247 count, 1248 dst, 1249 tmp)); 1250} 1251 1252void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1253 append(new LIR_Op2( 1254 lir_shr, 1255 value, 1256 count, 1257 dst, 1258 tmp)); 1259} 1260 1261 1262void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1263 append(new LIR_Op2( 1264 lir_ushr, 1265 value, 1266 count, 1267 dst, 1268 tmp)); 1269} 1270 1271void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { 1272 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, 1273 left, 1274 right, 1275 dst)); 1276} 1277 1278void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { 1279 append(new LIR_OpLock( 1280 lir_lock, 1281 hdr, 1282 obj, 1283 lock, 1284 scratch, 1285 stub, 1286 info)); 1287} 1288 1289void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, CodeStub* stub) { 1290 append(new LIR_OpLock( 1291 lir_unlock, 1292 hdr, 1293 obj, 1294 lock, 1295 LIR_OprFact::illegalOpr, 1296 stub, 1297 NULL)); 1298} 1299 1300 1301void check_LIR() { 1302 // cannot do the proper checking as PRODUCT and other modes return different results 1303 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); 1304} 1305 1306 1307 1308void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 1309 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1310 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 1311 ciMethod* profiled_method, int profiled_bci) { 1312 append(new LIR_OpTypeCheck(lir_checkcast, result, object, klass, 1313 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub, 1314 profiled_method, profiled_bci)); 1315} 1316 1317 1318void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch) { 1319 append(new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL, NULL, 0)); 1320} 1321 1322 1323void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) { 1324 append(new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception, NULL, 0)); 1325} 1326 1327 1328void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) { 1329 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value, 1330 // implying successful swap of new_value into addr 1331 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2)); 1332} 1333 1334void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) { 1335 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value, 1336 // implying successful swap of new_value into addr 1337 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2)); 1338} 1339 1340void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) { 1341 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value, 1342 // implying successful swap of new_value into addr 1343 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2)); 1344} 1345 1346 1347#ifdef PRODUCT 1348 1349void print_LIR(BlockList* blocks) { 1350} 1351 1352#else 1353// LIR_OprDesc 1354void LIR_OprDesc::print() const { 1355 print(tty); 1356} 1357 1358void LIR_OprDesc::print(outputStream* out) const { 1359 if (is_illegal()) { 1360 return; 1361 } 1362 1363 out->print("["); 1364 if (is_pointer()) { 1365 pointer()->print_value_on(out); 1366 } else if (is_single_stack()) { 1367 out->print("stack:%d", single_stack_ix()); 1368 } else if (is_double_stack()) { 1369 out->print("dbl_stack:%d",double_stack_ix()); 1370 } else if (is_virtual()) { 1371 out->print("R%d", vreg_number()); 1372 } else if (is_single_cpu()) { 1373 out->print(as_register()->name()); 1374 } else if (is_double_cpu()) { 1375 out->print(as_register_hi()->name()); 1376 out->print(as_register_lo()->name()); 1377#ifdef IA32 1378 } else if (is_single_xmm()) { 1379 out->print(as_xmm_float_reg()->name()); 1380 } else if (is_double_xmm()) { 1381 out->print(as_xmm_double_reg()->name()); 1382 } else if (is_single_fpu()) { 1383 out->print("fpu%d", fpu_regnr()); 1384 } else if (is_double_fpu()) { 1385 out->print("fpu%d", fpu_regnrLo()); 1386#else 1387 } else if (is_single_fpu()) { 1388 out->print(as_float_reg()->name()); 1389 } else if (is_double_fpu()) { 1390 out->print(as_double_reg()->name()); 1391#endif 1392 1393 } else if (is_illegal()) { 1394 out->print("-"); 1395 } else { 1396 out->print("Unknown Operand"); 1397 } 1398 if (!is_illegal()) { 1399 out->print("|%c", type_char()); 1400 } 1401 if (is_register() && is_last_use()) { 1402 out->print("(last_use)"); 1403 } 1404 out->print("]"); 1405} 1406 1407 1408// LIR_Address 1409void LIR_Const::print_value_on(outputStream* out) const { 1410 switch (type()) { 1411 case T_INT: out->print("int:%d", as_jint()); break; 1412 case T_LONG: out->print("lng:%lld", as_jlong()); break; 1413 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; 1414 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; 1415 case T_OBJECT: out->print("obj:0x%x", as_jobject()); break; 1416 default: out->print("%3d:0x%x",type(), as_jdouble()); break; 1417 } 1418} 1419 1420// LIR_Address 1421void LIR_Address::print_value_on(outputStream* out) const { 1422 out->print("Base:"); _base->print(out); 1423 if (!_index->is_illegal()) { 1424 out->print(" Index:"); _index->print(out); 1425 switch (scale()) { 1426 case times_1: break; 1427 case times_2: out->print(" * 2"); break; 1428 case times_4: out->print(" * 4"); break; 1429 case times_8: out->print(" * 8"); break; 1430 } 1431 } 1432 out->print(" Disp: %d", _disp); 1433} 1434 1435// debug output of block header without InstructionPrinter 1436// (because phi functions are not necessary for LIR) 1437static void print_block(BlockBegin* x) { 1438 // print block id 1439 BlockEnd* end = x->end(); 1440 tty->print("B%d ", x->block_id()); 1441 1442 // print flags 1443 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); 1444 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); 1445 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); 1446 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); 1447 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); 1448 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); 1449 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); 1450 1451 // print block bci range 1452 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->bci())); 1453 1454 // print predecessors and successors 1455 if (x->number_of_preds() > 0) { 1456 tty->print("preds: "); 1457 for (int i = 0; i < x->number_of_preds(); i ++) { 1458 tty->print("B%d ", x->pred_at(i)->block_id()); 1459 } 1460 } 1461 1462 if (x->number_of_sux() > 0) { 1463 tty->print("sux: "); 1464 for (int i = 0; i < x->number_of_sux(); i ++) { 1465 tty->print("B%d ", x->sux_at(i)->block_id()); 1466 } 1467 } 1468 1469 // print exception handlers 1470 if (x->number_of_exception_handlers() > 0) { 1471 tty->print("xhandler: "); 1472 for (int i = 0; i < x->number_of_exception_handlers(); i++) { 1473 tty->print("B%d ", x->exception_handler_at(i)->block_id()); 1474 } 1475 } 1476 1477 tty->cr(); 1478} 1479 1480void print_LIR(BlockList* blocks) { 1481 tty->print_cr("LIR:"); 1482 int i; 1483 for (i = 0; i < blocks->length(); i++) { 1484 BlockBegin* bb = blocks->at(i); 1485 print_block(bb); 1486 tty->print("__id_Instruction___________________________________________"); tty->cr(); 1487 bb->lir()->print_instructions(); 1488 } 1489} 1490 1491void LIR_List::print_instructions() { 1492 for (int i = 0; i < _operations.length(); i++) { 1493 _operations.at(i)->print(); tty->cr(); 1494 } 1495 tty->cr(); 1496} 1497 1498// LIR_Ops printing routines 1499// LIR_Op 1500void LIR_Op::print_on(outputStream* out) const { 1501 if (id() != -1 || PrintCFGToFile) { 1502 out->print("%4d ", id()); 1503 } else { 1504 out->print(" "); 1505 } 1506 out->print(name()); out->print(" "); 1507 print_instr(out); 1508 if (info() != NULL) out->print(" [bci:%d]", info()->bci()); 1509#ifdef ASSERT 1510 if (Verbose && _file != NULL) { 1511 out->print(" (%s:%d)", _file, _line); 1512 } 1513#endif 1514} 1515 1516const char * LIR_Op::name() const { 1517 const char* s = NULL; 1518 switch(code()) { 1519 // LIR_Op0 1520 case lir_membar: s = "membar"; break; 1521 case lir_membar_acquire: s = "membar_acquire"; break; 1522 case lir_membar_release: s = "membar_release"; break; 1523 case lir_word_align: s = "word_align"; break; 1524 case lir_label: s = "label"; break; 1525 case lir_nop: s = "nop"; break; 1526 case lir_backwardbranch_target: s = "backbranch"; break; 1527 case lir_std_entry: s = "std_entry"; break; 1528 case lir_osr_entry: s = "osr_entry"; break; 1529 case lir_build_frame: s = "build_frm"; break; 1530 case lir_fpop_raw: s = "fpop_raw"; break; 1531 case lir_24bit_FPU: s = "24bit_FPU"; break; 1532 case lir_reset_FPU: s = "reset_FPU"; break; 1533 case lir_breakpoint: s = "breakpoint"; break; 1534 case lir_get_thread: s = "get_thread"; break; 1535 // LIR_Op1 1536 case lir_fxch: s = "fxch"; break; 1537 case lir_fld: s = "fld"; break; 1538 case lir_ffree: s = "ffree"; break; 1539 case lir_push: s = "push"; break; 1540 case lir_pop: s = "pop"; break; 1541 case lir_null_check: s = "null_check"; break; 1542 case lir_return: s = "return"; break; 1543 case lir_safepoint: s = "safepoint"; break; 1544 case lir_neg: s = "neg"; break; 1545 case lir_leal: s = "leal"; break; 1546 case lir_branch: s = "branch"; break; 1547 case lir_cond_float_branch: s = "flt_cond_br"; break; 1548 case lir_move: s = "move"; break; 1549 case lir_roundfp: s = "roundfp"; break; 1550 case lir_rtcall: s = "rtcall"; break; 1551 case lir_throw: s = "throw"; break; 1552 case lir_unwind: s = "unwind"; break; 1553 case lir_convert: s = "convert"; break; 1554 case lir_alloc_object: s = "alloc_obj"; break; 1555 case lir_monaddr: s = "mon_addr"; break; 1556 // LIR_Op2 1557 case lir_cmp: s = "cmp"; break; 1558 case lir_cmp_l2i: s = "cmp_l2i"; break; 1559 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; 1560 case lir_cmp_fd2i: s = "comp_fd2i"; break; 1561 case lir_cmove: s = "cmove"; break; 1562 case lir_add: s = "add"; break; 1563 case lir_sub: s = "sub"; break; 1564 case lir_mul: s = "mul"; break; 1565 case lir_mul_strictfp: s = "mul_strictfp"; break; 1566 case lir_div: s = "div"; break; 1567 case lir_div_strictfp: s = "div_strictfp"; break; 1568 case lir_rem: s = "rem"; break; 1569 case lir_abs: s = "abs"; break; 1570 case lir_sqrt: s = "sqrt"; break; 1571 case lir_sin: s = "sin"; break; 1572 case lir_cos: s = "cos"; break; 1573 case lir_tan: s = "tan"; break; 1574 case lir_log: s = "log"; break; 1575 case lir_log10: s = "log10"; break; 1576 case lir_logic_and: s = "logic_and"; break; 1577 case lir_logic_or: s = "logic_or"; break; 1578 case lir_logic_xor: s = "logic_xor"; break; 1579 case lir_shl: s = "shift_left"; break; 1580 case lir_shr: s = "shift_right"; break; 1581 case lir_ushr: s = "ushift_right"; break; 1582 case lir_alloc_array: s = "alloc_array"; break; 1583 // LIR_Op3 1584 case lir_idiv: s = "idiv"; break; 1585 case lir_irem: s = "irem"; break; 1586 // LIR_OpJavaCall 1587 case lir_static_call: s = "static"; break; 1588 case lir_optvirtual_call: s = "optvirtual"; break; 1589 case lir_icvirtual_call: s = "icvirtual"; break; 1590 case lir_virtual_call: s = "virtual"; break; 1591 // LIR_OpArrayCopy 1592 case lir_arraycopy: s = "arraycopy"; break; 1593 // LIR_OpLock 1594 case lir_lock: s = "lock"; break; 1595 case lir_unlock: s = "unlock"; break; 1596 // LIR_OpDelay 1597 case lir_delay_slot: s = "delay"; break; 1598 // LIR_OpTypeCheck 1599 case lir_instanceof: s = "instanceof"; break; 1600 case lir_checkcast: s = "checkcast"; break; 1601 case lir_store_check: s = "store_check"; break; 1602 // LIR_OpCompareAndSwap 1603 case lir_cas_long: s = "cas_long"; break; 1604 case lir_cas_obj: s = "cas_obj"; break; 1605 case lir_cas_int: s = "cas_int"; break; 1606 // LIR_OpProfileCall 1607 case lir_profile_call: s = "profile_call"; break; 1608 1609 case lir_none: ShouldNotReachHere();break; 1610 default: s = "illegal_op"; break; 1611 } 1612 return s; 1613} 1614 1615// LIR_OpJavaCall 1616void LIR_OpJavaCall::print_instr(outputStream* out) const { 1617 out->print("call: "); 1618 out->print("[addr: 0x%x]", address()); 1619 if (receiver()->is_valid()) { 1620 out->print(" [recv: "); receiver()->print(out); out->print("]"); 1621 } 1622 if (result_opr()->is_valid()) { 1623 out->print(" [result: "); result_opr()->print(out); out->print("]"); 1624 } 1625} 1626 1627// LIR_OpLabel 1628void LIR_OpLabel::print_instr(outputStream* out) const { 1629 out->print("[label:0x%x]", _label); 1630} 1631 1632// LIR_OpArrayCopy 1633void LIR_OpArrayCopy::print_instr(outputStream* out) const { 1634 src()->print(out); out->print(" "); 1635 src_pos()->print(out); out->print(" "); 1636 dst()->print(out); out->print(" "); 1637 dst_pos()->print(out); out->print(" "); 1638 length()->print(out); out->print(" "); 1639 tmp()->print(out); out->print(" "); 1640} 1641 1642// LIR_OpCompareAndSwap 1643void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { 1644 addr()->print(out); out->print(" "); 1645 cmp_value()->print(out); out->print(" "); 1646 new_value()->print(out); out->print(" "); 1647 tmp1()->print(out); out->print(" "); 1648 tmp2()->print(out); out->print(" "); 1649 1650} 1651 1652// LIR_Op0 1653void LIR_Op0::print_instr(outputStream* out) const { 1654 result_opr()->print(out); 1655} 1656 1657// LIR_Op1 1658const char * LIR_Op1::name() const { 1659 if (code() == lir_move) { 1660 switch (move_kind()) { 1661 case lir_move_normal: 1662 return "move"; 1663 case lir_move_unaligned: 1664 return "unaligned move"; 1665 case lir_move_volatile: 1666 return "volatile_move"; 1667 default: 1668 ShouldNotReachHere(); 1669 return "illegal_op"; 1670 } 1671 } else { 1672 return LIR_Op::name(); 1673 } 1674} 1675 1676 1677void LIR_Op1::print_instr(outputStream* out) const { 1678 _opr->print(out); out->print(" "); 1679 result_opr()->print(out); out->print(" "); 1680 print_patch_code(out, patch_code()); 1681} 1682 1683 1684// LIR_Op1 1685void LIR_OpRTCall::print_instr(outputStream* out) const { 1686 intx a = (intx)addr(); 1687 out->print(Runtime1::name_for_address(addr())); 1688 out->print(" "); 1689 tmp()->print(out); 1690} 1691 1692void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { 1693 switch(code) { 1694 case lir_patch_none: break; 1695 case lir_patch_low: out->print("[patch_low]"); break; 1696 case lir_patch_high: out->print("[patch_high]"); break; 1697 case lir_patch_normal: out->print("[patch_normal]"); break; 1698 default: ShouldNotReachHere(); 1699 } 1700} 1701 1702// LIR_OpBranch 1703void LIR_OpBranch::print_instr(outputStream* out) const { 1704 print_condition(out, cond()); out->print(" "); 1705 if (block() != NULL) { 1706 out->print("[B%d] ", block()->block_id()); 1707 } else if (stub() != NULL) { 1708 out->print("["); 1709 stub()->print_name(out); 1710 out->print(": 0x%x]", stub()); 1711 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->bci()); 1712 } else { 1713 out->print("[label:0x%x] ", label()); 1714 } 1715 if (ublock() != NULL) { 1716 out->print("unordered: [B%d] ", ublock()->block_id()); 1717 } 1718} 1719 1720void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { 1721 switch(cond) { 1722 case lir_cond_equal: out->print("[EQ]"); break; 1723 case lir_cond_notEqual: out->print("[NE]"); break; 1724 case lir_cond_less: out->print("[LT]"); break; 1725 case lir_cond_lessEqual: out->print("[LE]"); break; 1726 case lir_cond_greaterEqual: out->print("[GE]"); break; 1727 case lir_cond_greater: out->print("[GT]"); break; 1728 case lir_cond_belowEqual: out->print("[BE]"); break; 1729 case lir_cond_aboveEqual: out->print("[AE]"); break; 1730 case lir_cond_always: out->print("[AL]"); break; 1731 default: out->print("[%d]",cond); break; 1732 } 1733} 1734 1735// LIR_OpConvert 1736void LIR_OpConvert::print_instr(outputStream* out) const { 1737 print_bytecode(out, bytecode()); 1738 in_opr()->print(out); out->print(" "); 1739 result_opr()->print(out); out->print(" "); 1740} 1741 1742void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { 1743 switch(code) { 1744 case Bytecodes::_d2f: out->print("[d2f] "); break; 1745 case Bytecodes::_d2i: out->print("[d2i] "); break; 1746 case Bytecodes::_d2l: out->print("[d2l] "); break; 1747 case Bytecodes::_f2d: out->print("[f2d] "); break; 1748 case Bytecodes::_f2i: out->print("[f2i] "); break; 1749 case Bytecodes::_f2l: out->print("[f2l] "); break; 1750 case Bytecodes::_i2b: out->print("[i2b] "); break; 1751 case Bytecodes::_i2c: out->print("[i2c] "); break; 1752 case Bytecodes::_i2d: out->print("[i2d] "); break; 1753 case Bytecodes::_i2f: out->print("[i2f] "); break; 1754 case Bytecodes::_i2l: out->print("[i2l] "); break; 1755 case Bytecodes::_i2s: out->print("[i2s] "); break; 1756 case Bytecodes::_l2i: out->print("[l2i] "); break; 1757 case Bytecodes::_l2f: out->print("[l2f] "); break; 1758 case Bytecodes::_l2d: out->print("[l2d] "); break; 1759 default: 1760 out->print("[?%d]",code); 1761 break; 1762 } 1763} 1764 1765void LIR_OpAllocObj::print_instr(outputStream* out) const { 1766 klass()->print(out); out->print(" "); 1767 obj()->print(out); out->print(" "); 1768 tmp1()->print(out); out->print(" "); 1769 tmp2()->print(out); out->print(" "); 1770 tmp3()->print(out); out->print(" "); 1771 tmp4()->print(out); out->print(" "); 1772 out->print("[hdr:%d]", header_size()); out->print(" "); 1773 out->print("[obj:%d]", object_size()); out->print(" "); 1774 out->print("[lbl:0x%x]", stub()->entry()); 1775} 1776 1777void LIR_OpRoundFP::print_instr(outputStream* out) const { 1778 _opr->print(out); out->print(" "); 1779 tmp()->print(out); out->print(" "); 1780 result_opr()->print(out); out->print(" "); 1781} 1782 1783// LIR_Op2 1784void LIR_Op2::print_instr(outputStream* out) const { 1785 if (code() == lir_cmove) { 1786 print_condition(out, condition()); out->print(" "); 1787 } 1788 in_opr1()->print(out); out->print(" "); 1789 in_opr2()->print(out); out->print(" "); 1790 if (tmp_opr()->is_valid()) { tmp_opr()->print(out); out->print(" "); } 1791 result_opr()->print(out); 1792} 1793 1794void LIR_OpAllocArray::print_instr(outputStream* out) const { 1795 klass()->print(out); out->print(" "); 1796 len()->print(out); out->print(" "); 1797 obj()->print(out); out->print(" "); 1798 tmp1()->print(out); out->print(" "); 1799 tmp2()->print(out); out->print(" "); 1800 tmp3()->print(out); out->print(" "); 1801 tmp4()->print(out); out->print(" "); 1802 out->print("[type:0x%x]", type()); out->print(" "); 1803 out->print("[label:0x%x]", stub()->entry()); 1804} 1805 1806 1807void LIR_OpTypeCheck::print_instr(outputStream* out) const { 1808 object()->print(out); out->print(" "); 1809 if (code() == lir_store_check) { 1810 array()->print(out); out->print(" "); 1811 } 1812 if (code() != lir_store_check) { 1813 klass()->print_name_on(out); out->print(" "); 1814 if (fast_check()) out->print("fast_check "); 1815 } 1816 tmp1()->print(out); out->print(" "); 1817 tmp2()->print(out); out->print(" "); 1818 tmp3()->print(out); out->print(" "); 1819 result_opr()->print(out); out->print(" "); 1820 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->bci()); 1821} 1822 1823 1824// LIR_Op3 1825void LIR_Op3::print_instr(outputStream* out) const { 1826 in_opr1()->print(out); out->print(" "); 1827 in_opr2()->print(out); out->print(" "); 1828 in_opr3()->print(out); out->print(" "); 1829 result_opr()->print(out); 1830} 1831 1832 1833void LIR_OpLock::print_instr(outputStream* out) const { 1834 hdr_opr()->print(out); out->print(" "); 1835 obj_opr()->print(out); out->print(" "); 1836 lock_opr()->print(out); out->print(" "); 1837 if (_scratch->is_valid()) { 1838 _scratch->print(out); out->print(" "); 1839 } 1840 out->print("[lbl:0x%x]", stub()->entry()); 1841} 1842 1843 1844void LIR_OpDelay::print_instr(outputStream* out) const { 1845 _op->print_on(out); 1846} 1847 1848 1849// LIR_OpProfileCall 1850void LIR_OpProfileCall::print_instr(outputStream* out) const { 1851 profiled_method()->name()->print_symbol_on(out); 1852 out->print("."); 1853 profiled_method()->holder()->name()->print_symbol_on(out); 1854 out->print(" @ %d ", profiled_bci()); 1855 mdo()->print(out); out->print(" "); 1856 recv()->print(out); out->print(" "); 1857 tmp1()->print(out); out->print(" "); 1858} 1859 1860 1861#endif // PRODUCT 1862 1863// Implementation of LIR_InsertionBuffer 1864 1865void LIR_InsertionBuffer::append(int index, LIR_Op* op) { 1866 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); 1867 1868 int i = number_of_insertion_points() - 1; 1869 if (i < 0 || index_at(i) < index) { 1870 append_new(index, 1); 1871 } else { 1872 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); 1873 assert(count_at(i) > 0, "check"); 1874 set_count_at(i, count_at(i) + 1); 1875 } 1876 _ops.push(op); 1877 1878 DEBUG_ONLY(verify()); 1879} 1880 1881#ifdef ASSERT 1882void LIR_InsertionBuffer::verify() { 1883 int sum = 0; 1884 int prev_idx = -1; 1885 1886 for (int i = 0; i < number_of_insertion_points(); i++) { 1887 assert(prev_idx < index_at(i), "index must be ordered ascending"); 1888 sum += count_at(i); 1889 } 1890 assert(sum == number_of_ops(), "wrong total sum"); 1891} 1892#endif 1893