c1_Defs.hpp revision 2073:b92c45f2bc75 
1/*
2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
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23 */
24
25#ifndef SHARE_VM_C1_C1_DEFS_HPP
26#define SHARE_VM_C1_C1_DEFS_HPP
27
28#include "utilities/globalDefinitions.hpp"
29#ifdef TARGET_ARCH_x86
30# include "register_x86.hpp"
31#endif
32#ifdef TARGET_ARCH_sparc
33# include "register_sparc.hpp"
34#endif
35#ifdef TARGET_ARCH_zero
36# include "register_zero.hpp"
37#endif
38#ifdef TARGET_ARCH_arm
39# include "register_arm.hpp"
40#endif
41#ifdef TARGET_ARCH_ppc
42# include "register_ppc.hpp"
43#endif
44
45// set frame size and return address offset to these values in blobs
46// (if the compiled frame uses ebp as link pointer on IA; otherwise,
47// the frame size must be fixed)
48enum {
49  no_frame_size            = -1
50};
51
52
53#ifdef TARGET_ARCH_x86
54# include "c1_Defs_x86.hpp"
55#endif
56#ifdef TARGET_ARCH_sparc
57# include "c1_Defs_sparc.hpp"
58#endif
59#ifdef TARGET_ARCH_arm
60# include "c1_Defs_arm.hpp"
61#endif
62#ifdef TARGET_ARCH_ppc
63# include "c1_Defs_ppc.hpp"
64#endif
65
66
67// native word offsets from memory address
68enum {
69  lo_word_offset_in_bytes = pd_lo_word_offset_in_bytes,
70  hi_word_offset_in_bytes = pd_hi_word_offset_in_bytes
71};
72
73
74// the processor may require explicit rounding operations to implement the strictFP mode
75enum {
76  strict_fp_requires_explicit_rounding = pd_strict_fp_requires_explicit_rounding
77};
78
79
80// for debug info: a float value in a register may be saved in double precision by runtime stubs
81enum {
82  float_saved_as_double = pd_float_saved_as_double
83};
84
85#endif // SHARE_VM_C1_C1_DEFS_HPP
86