os_solaris_x86.cpp revision 4989:5e3b6f79d280
1/*
2 * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25// no precompiled headers
26#include "asm/macroAssembler.hpp"
27#include "classfile/classLoader.hpp"
28#include "classfile/systemDictionary.hpp"
29#include "classfile/vmSymbols.hpp"
30#include "code/icBuffer.hpp"
31#include "code/vtableStubs.hpp"
32#include "interpreter/interpreter.hpp"
33#include "jvm_solaris.h"
34#include "memory/allocation.inline.hpp"
35#include "mutex_solaris.inline.hpp"
36#include "os_share_solaris.hpp"
37#include "prims/jniFastGetField.hpp"
38#include "prims/jvm.h"
39#include "prims/jvm_misc.hpp"
40#include "runtime/arguments.hpp"
41#include "runtime/extendedPC.hpp"
42#include "runtime/frame.inline.hpp"
43#include "runtime/interfaceSupport.hpp"
44#include "runtime/java.hpp"
45#include "runtime/javaCalls.hpp"
46#include "runtime/mutexLocker.hpp"
47#include "runtime/osThread.hpp"
48#include "runtime/sharedRuntime.hpp"
49#include "runtime/stubRoutines.hpp"
50#include "runtime/thread.inline.hpp"
51#include "runtime/timer.hpp"
52#include "utilities/events.hpp"
53#include "utilities/vmError.hpp"
54
55// put OS-includes here
56# include <sys/types.h>
57# include <sys/mman.h>
58# include <pthread.h>
59# include <signal.h>
60# include <setjmp.h>
61# include <errno.h>
62# include <dlfcn.h>
63# include <stdio.h>
64# include <unistd.h>
65# include <sys/resource.h>
66# include <thread.h>
67# include <sys/stat.h>
68# include <sys/time.h>
69# include <sys/filio.h>
70# include <sys/utsname.h>
71# include <sys/systeminfo.h>
72# include <sys/socket.h>
73# include <sys/trap.h>
74# include <sys/lwp.h>
75# include <pwd.h>
76# include <poll.h>
77# include <sys/lwp.h>
78# include <procfs.h>     //  see comment in <sys/procfs.h>
79
80#ifndef AMD64
81// QQQ seems useless at this point
82# define _STRUCTURED_PROC 1  //  this gets us the new structured proc interfaces of 5.6 & later
83#endif // AMD64
84# include <sys/procfs.h>     //  see comment in <sys/procfs.h>
85
86
87#define MAX_PATH (2 * K)
88
89// Minimum stack size for the VM.  It's easier to document a constant value
90// but it's different for x86 and sparc because the page sizes are different.
91#ifdef AMD64
92size_t os::Solaris::min_stack_allowed = 224*K;
93#define REG_SP REG_RSP
94#define REG_PC REG_RIP
95#define REG_FP REG_RBP
96#else
97size_t os::Solaris::min_stack_allowed = 64*K;
98#define REG_SP UESP
99#define REG_PC EIP
100#define REG_FP EBP
101// 4900493 counter to prevent runaway LDTR refresh attempt
102
103static volatile int ldtr_refresh = 0;
104// the libthread instruction that faults because of the stale LDTR
105
106static const unsigned char movlfs[] = { 0x8e, 0xe0    // movl %eax,%fs
107                       };
108#endif // AMD64
109
110char* os::non_memory_address_word() {
111  // Must never look like an address returned by reserve_memory,
112  // even in its subfields (as defined by the CPU immediate fields,
113  // if the CPU splits constants across multiple instructions).
114  return (char*) -1;
115}
116
117//
118// Validate a ucontext retrieved from walking a uc_link of a ucontext.
119// There are issues with libthread giving out uc_links for different threads
120// on the same uc_link chain and bad or circular links.
121//
122bool os::Solaris::valid_ucontext(Thread* thread, ucontext_t* valid, ucontext_t* suspect) {
123  if (valid >= suspect ||
124      valid->uc_stack.ss_flags != suspect->uc_stack.ss_flags ||
125      valid->uc_stack.ss_sp    != suspect->uc_stack.ss_sp    ||
126      valid->uc_stack.ss_size  != suspect->uc_stack.ss_size) {
127    DEBUG_ONLY(tty->print_cr("valid_ucontext: failed test 1");)
128    return false;
129  }
130
131  if (thread->is_Java_thread()) {
132    if (!valid_stack_address(thread, (address)suspect)) {
133      DEBUG_ONLY(tty->print_cr("valid_ucontext: uc_link not in thread stack");)
134      return false;
135    }
136    if (!valid_stack_address(thread,  (address) suspect->uc_mcontext.gregs[REG_SP])) {
137      DEBUG_ONLY(tty->print_cr("valid_ucontext: stackpointer not in thread stack");)
138      return false;
139    }
140  }
141  return true;
142}
143
144// We will only follow one level of uc_link since there are libthread
145// issues with ucontext linking and it is better to be safe and just
146// let caller retry later.
147ucontext_t* os::Solaris::get_valid_uc_in_signal_handler(Thread *thread,
148  ucontext_t *uc) {
149
150  ucontext_t *retuc = NULL;
151
152  if (uc != NULL) {
153    if (uc->uc_link == NULL) {
154      // cannot validate without uc_link so accept current ucontext
155      retuc = uc;
156    } else if (os::Solaris::valid_ucontext(thread, uc, uc->uc_link)) {
157      // first ucontext is valid so try the next one
158      uc = uc->uc_link;
159      if (uc->uc_link == NULL) {
160        // cannot validate without uc_link so accept current ucontext
161        retuc = uc;
162      } else if (os::Solaris::valid_ucontext(thread, uc, uc->uc_link)) {
163        // the ucontext one level down is also valid so return it
164        retuc = uc;
165      }
166    }
167  }
168  return retuc;
169}
170
171// Assumes ucontext is valid
172ExtendedPC os::Solaris::ucontext_get_ExtendedPC(ucontext_t *uc) {
173  return ExtendedPC((address)uc->uc_mcontext.gregs[REG_PC]);
174}
175
176// Assumes ucontext is valid
177intptr_t* os::Solaris::ucontext_get_sp(ucontext_t *uc) {
178  return (intptr_t*)uc->uc_mcontext.gregs[REG_SP];
179}
180
181// Assumes ucontext is valid
182intptr_t* os::Solaris::ucontext_get_fp(ucontext_t *uc) {
183  return (intptr_t*)uc->uc_mcontext.gregs[REG_FP];
184}
185
186address os::Solaris::ucontext_get_pc(ucontext_t *uc) {
187  return (address) uc->uc_mcontext.gregs[REG_PC];
188}
189
190// For Forte Analyzer AsyncGetCallTrace profiling support - thread
191// is currently interrupted by SIGPROF.
192//
193// The difference between this and os::fetch_frame_from_context() is that
194// here we try to skip nested signal frames.
195ExtendedPC os::Solaris::fetch_frame_from_ucontext(Thread* thread,
196  ucontext_t* uc, intptr_t** ret_sp, intptr_t** ret_fp) {
197
198  assert(thread != NULL, "just checking");
199  assert(ret_sp != NULL, "just checking");
200  assert(ret_fp != NULL, "just checking");
201
202  ucontext_t *luc = os::Solaris::get_valid_uc_in_signal_handler(thread, uc);
203  return os::fetch_frame_from_context(luc, ret_sp, ret_fp);
204}
205
206ExtendedPC os::fetch_frame_from_context(void* ucVoid,
207                    intptr_t** ret_sp, intptr_t** ret_fp) {
208
209  ExtendedPC  epc;
210  ucontext_t *uc = (ucontext_t*)ucVoid;
211
212  if (uc != NULL) {
213    epc = os::Solaris::ucontext_get_ExtendedPC(uc);
214    if (ret_sp) *ret_sp = os::Solaris::ucontext_get_sp(uc);
215    if (ret_fp) *ret_fp = os::Solaris::ucontext_get_fp(uc);
216  } else {
217    // construct empty ExtendedPC for return value checking
218    epc = ExtendedPC(NULL);
219    if (ret_sp) *ret_sp = (intptr_t *)NULL;
220    if (ret_fp) *ret_fp = (intptr_t *)NULL;
221  }
222
223  return epc;
224}
225
226frame os::fetch_frame_from_context(void* ucVoid) {
227  intptr_t* sp;
228  intptr_t* fp;
229  ExtendedPC epc = fetch_frame_from_context(ucVoid, &sp, &fp);
230  return frame(sp, fp, epc.pc());
231}
232
233frame os::get_sender_for_C_frame(frame* fr) {
234  return frame(fr->sender_sp(), fr->link(), fr->sender_pc());
235}
236
237extern "C" intptr_t *_get_current_sp();  // in .il file
238
239address os::current_stack_pointer() {
240  return (address)_get_current_sp();
241}
242
243extern "C" intptr_t *_get_current_fp();  // in .il file
244
245frame os::current_frame() {
246  intptr_t* fp = _get_current_fp();  // it's inlined so want current fp
247  frame myframe((intptr_t*)os::current_stack_pointer(),
248                (intptr_t*)fp,
249                CAST_FROM_FN_PTR(address, os::current_frame));
250  if (os::is_first_C_frame(&myframe)) {
251    // stack is not walkable
252    frame ret; // This will be a null useless frame
253    return ret;
254  } else {
255    return os::get_sender_for_C_frame(&myframe);
256  }
257}
258
259static int threadgetstate(thread_t tid, int *flags, lwpid_t *lwp, stack_t *ss, gregset_t rs, lwpstatus_t *lwpstatus) {
260  char lwpstatusfile[PROCFILE_LENGTH];
261  int lwpfd, err;
262
263  if (err = os::Solaris::thr_getstate(tid, flags, lwp, ss, rs))
264    return (err);
265  if (*flags == TRS_LWPID) {
266    sprintf(lwpstatusfile, "/proc/%d/lwp/%d/lwpstatus", getpid(),
267            *lwp);
268    if ((lwpfd = open(lwpstatusfile, O_RDONLY)) < 0) {
269      perror("thr_mutator_status: open lwpstatus");
270      return (EINVAL);
271    }
272    if (pread(lwpfd, lwpstatus, sizeof (lwpstatus_t), (off_t)0) !=
273        sizeof (lwpstatus_t)) {
274      perror("thr_mutator_status: read lwpstatus");
275      (void) close(lwpfd);
276      return (EINVAL);
277    }
278    (void) close(lwpfd);
279  }
280  return (0);
281}
282
283#ifndef AMD64
284
285// Detecting SSE support by OS
286// From solaris_i486.s
287extern "C" bool sse_check();
288extern "C" bool sse_unavailable();
289
290enum { SSE_UNKNOWN, SSE_NOT_SUPPORTED, SSE_SUPPORTED};
291static int sse_status = SSE_UNKNOWN;
292
293
294static void  check_for_sse_support() {
295  if (!VM_Version::supports_sse()) {
296    sse_status = SSE_NOT_SUPPORTED;
297    return;
298  }
299  // looking for _sse_hw in libc.so, if it does not exist or
300  // the value (int) is 0, OS has no support for SSE
301  int *sse_hwp;
302  void *h;
303
304  if ((h=dlopen("/usr/lib/libc.so", RTLD_LAZY)) == NULL) {
305    //open failed, presume no support for SSE
306    sse_status = SSE_NOT_SUPPORTED;
307    return;
308  }
309  if ((sse_hwp = (int *)dlsym(h, "_sse_hw")) == NULL) {
310    sse_status = SSE_NOT_SUPPORTED;
311  } else if (*sse_hwp == 0) {
312    sse_status = SSE_NOT_SUPPORTED;
313  }
314  dlclose(h);
315
316  if (sse_status == SSE_UNKNOWN) {
317    bool (*try_sse)() = (bool (*)())sse_check;
318    sse_status = (*try_sse)() ? SSE_SUPPORTED : SSE_NOT_SUPPORTED;
319  }
320
321}
322
323#endif // AMD64
324
325bool os::supports_sse() {
326#ifdef AMD64
327  return true;
328#else
329  if (sse_status == SSE_UNKNOWN)
330    check_for_sse_support();
331  return sse_status == SSE_SUPPORTED;
332#endif // AMD64
333}
334
335bool os::is_allocatable(size_t bytes) {
336#ifdef AMD64
337  return true;
338#else
339
340  if (bytes < 2 * G) {
341    return true;
342  }
343
344  char* addr = reserve_memory(bytes, NULL);
345
346  if (addr != NULL) {
347    release_memory(addr, bytes);
348  }
349
350  return addr != NULL;
351#endif // AMD64
352
353}
354
355extern "C" void Fetch32PFI () ;
356extern "C" void Fetch32Resume () ;
357#ifdef AMD64
358extern "C" void FetchNPFI () ;
359extern "C" void FetchNResume () ;
360#endif // AMD64
361
362extern "C" JNIEXPORT int
363JVM_handle_solaris_signal(int sig, siginfo_t* info, void* ucVoid,
364                          int abort_if_unrecognized) {
365  ucontext_t* uc = (ucontext_t*) ucVoid;
366
367#ifndef AMD64
368  if (sig == SIGILL && info->si_addr == (caddr_t)sse_check) {
369    // the SSE instruction faulted. supports_sse() need return false.
370    uc->uc_mcontext.gregs[EIP] = (greg_t)sse_unavailable;
371    return true;
372  }
373#endif // !AMD64
374
375  Thread* t = ThreadLocalStorage::get_thread_slow();  // slow & steady
376
377  // Must do this before SignalHandlerMark, if crash protection installed we will longjmp away
378  // (no destructors can be run)
379  os::WatcherThreadCrashProtection::check_crash_protection(sig, t);
380
381  SignalHandlerMark shm(t);
382
383  if(sig == SIGPIPE || sig == SIGXFSZ) {
384    if (os::Solaris::chained_handler(sig, info, ucVoid)) {
385      return true;
386    } else {
387      if (PrintMiscellaneous && (WizardMode || Verbose)) {
388        char buf[64];
389        warning("Ignoring %s - see 4229104 or 6499219",
390                os::exception_name(sig, buf, sizeof(buf)));
391
392      }
393      return true;
394    }
395  }
396
397  JavaThread* thread = NULL;
398  VMThread* vmthread = NULL;
399
400  if (os::Solaris::signal_handlers_are_installed) {
401    if (t != NULL ){
402      if(t->is_Java_thread()) {
403        thread = (JavaThread*)t;
404      }
405      else if(t->is_VM_thread()){
406        vmthread = (VMThread *)t;
407      }
408    }
409  }
410
411  guarantee(sig != os::Solaris::SIGinterrupt(), "Can not chain VM interrupt signal, try -XX:+UseAltSigs");
412
413  if (sig == os::Solaris::SIGasync()) {
414    if(thread || vmthread){
415      OSThread::SR_handler(t, uc);
416      return true;
417    } else if (os::Solaris::chained_handler(sig, info, ucVoid)) {
418      return true;
419    } else {
420      // If os::Solaris::SIGasync not chained, and this is a non-vm and
421      // non-java thread
422      return true;
423    }
424  }
425
426  if (info == NULL || info->si_code <= 0 || info->si_code == SI_NOINFO) {
427    // can't decode this kind of signal
428    info = NULL;
429  } else {
430    assert(sig == info->si_signo, "bad siginfo");
431  }
432
433  // decide if this trap can be handled by a stub
434  address stub = NULL;
435
436  address pc          = NULL;
437
438  //%note os_trap_1
439  if (info != NULL && uc != NULL && thread != NULL) {
440    // factor me: getPCfromContext
441    pc = (address) uc->uc_mcontext.gregs[REG_PC];
442
443    // SafeFetch32() support
444    if (pc == (address) Fetch32PFI) {
445      uc->uc_mcontext.gregs[REG_PC] = intptr_t(Fetch32Resume) ;
446      return true ;
447    }
448#ifdef AMD64
449    if (pc == (address) FetchNPFI) {
450       uc->uc_mcontext.gregs [REG_PC] = intptr_t(FetchNResume) ;
451       return true ;
452    }
453#endif // AMD64
454
455    // Handle ALL stack overflow variations here
456    if (sig == SIGSEGV && info->si_code == SEGV_ACCERR) {
457      address addr = (address) info->si_addr;
458      if (thread->in_stack_yellow_zone(addr)) {
459        thread->disable_stack_yellow_zone();
460        if (thread->thread_state() == _thread_in_Java) {
461          // Throw a stack overflow exception.  Guard pages will be reenabled
462          // while unwinding the stack.
463          stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW);
464        } else {
465          // Thread was in the vm or native code.  Return and try to finish.
466          return true;
467        }
468      } else if (thread->in_stack_red_zone(addr)) {
469        // Fatal red zone violation.  Disable the guard pages and fall through
470        // to handle_unexpected_exception way down below.
471        thread->disable_stack_red_zone();
472        tty->print_raw_cr("An irrecoverable stack overflow has occurred.");
473      }
474    }
475
476    if (thread->thread_state() == _thread_in_vm) {
477      if (sig == SIGBUS && info->si_code == BUS_OBJERR && thread->doing_unsafe_access()) {
478        stub = StubRoutines::handler_for_unsafe_access();
479      }
480    }
481
482    if (thread->thread_state() == _thread_in_Java) {
483      // Support Safepoint Polling
484      if ( sig == SIGSEGV && os::is_poll_address((address)info->si_addr)) {
485        stub = SharedRuntime::get_poll_stub(pc);
486      }
487      else if (sig == SIGBUS && info->si_code == BUS_OBJERR) {
488        // BugId 4454115: A read from a MappedByteBuffer can fault
489        // here if the underlying file has been truncated.
490        // Do not crash the VM in such a case.
491        CodeBlob* cb = CodeCache::find_blob_unsafe(pc);
492        nmethod* nm = cb->is_nmethod() ? (nmethod*)cb : NULL;
493        if (nm != NULL && nm->has_unsafe_access()) {
494          stub = StubRoutines::handler_for_unsafe_access();
495        }
496      }
497      else
498      if (sig == SIGFPE && info->si_code == FPE_INTDIV) {
499        // integer divide by zero
500        stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_DIVIDE_BY_ZERO);
501      }
502#ifndef AMD64
503      else if (sig == SIGFPE && info->si_code == FPE_FLTDIV) {
504        // floating-point divide by zero
505        stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_DIVIDE_BY_ZERO);
506      }
507      else if (sig == SIGFPE && info->si_code == FPE_FLTINV) {
508        // The encoding of D2I in i486.ad can cause an exception prior
509        // to the fist instruction if there was an invalid operation
510        // pending. We want to dismiss that exception. From the win_32
511        // side it also seems that if it really was the fist causing
512        // the exception that we do the d2i by hand with different
513        // rounding. Seems kind of weird. QQQ TODO
514        // Note that we take the exception at the NEXT floating point instruction.
515        if (pc[0] == 0xDB) {
516            assert(pc[0] == 0xDB, "not a FIST opcode");
517            assert(pc[1] == 0x14, "not a FIST opcode");
518            assert(pc[2] == 0x24, "not a FIST opcode");
519            return true;
520        } else {
521            assert(pc[-3] == 0xDB, "not an flt invalid opcode");
522            assert(pc[-2] == 0x14, "not an flt invalid opcode");
523            assert(pc[-1] == 0x24, "not an flt invalid opcode");
524        }
525      }
526      else if (sig == SIGFPE ) {
527        tty->print_cr("caught SIGFPE, info 0x%x.", info->si_code);
528      }
529#endif // !AMD64
530
531        // QQQ It doesn't seem that we need to do this on x86 because we should be able
532        // to return properly from the handler without this extra stuff on the back side.
533
534      else if (sig == SIGSEGV && info->si_code > 0 && !MacroAssembler::needs_explicit_null_check((intptr_t)info->si_addr)) {
535        // Determination of interpreter/vtable stub/compiled code null exception
536        stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
537      }
538    }
539
540    // jni_fast_Get<Primitive>Field can trap at certain pc's if a GC kicks in
541    // and the heap gets shrunk before the field access.
542    if ((sig == SIGSEGV) || (sig == SIGBUS)) {
543      address addr = JNI_FastGetField::find_slowcase_pc(pc);
544      if (addr != (address)-1) {
545        stub = addr;
546      }
547    }
548
549    // Check to see if we caught the safepoint code in the
550    // process of write protecting the memory serialization page.
551    // It write enables the page immediately after protecting it
552    // so we can just return to retry the write.
553    if ((sig == SIGSEGV) &&
554        os::is_memory_serialize_page(thread, (address)info->si_addr)) {
555      // Block current thread until the memory serialize page permission restored.
556      os::block_on_serialize_page_trap();
557      return true;
558    }
559  }
560
561  // Execution protection violation
562  //
563  // Preventative code for future versions of Solaris which may
564  // enable execution protection when running the 32-bit VM on AMD64.
565  //
566  // This should be kept as the last step in the triage.  We don't
567  // have a dedicated trap number for a no-execute fault, so be
568  // conservative and allow other handlers the first shot.
569  //
570  // Note: We don't test that info->si_code == SEGV_ACCERR here.
571  // this si_code is so generic that it is almost meaningless; and
572  // the si_code for this condition may change in the future.
573  // Furthermore, a false-positive should be harmless.
574  if (UnguardOnExecutionViolation > 0 &&
575      (sig == SIGSEGV || sig == SIGBUS) &&
576      uc->uc_mcontext.gregs[TRAPNO] == T_PGFLT) {  // page fault
577    int page_size = os::vm_page_size();
578    address addr = (address) info->si_addr;
579    address pc = (address) uc->uc_mcontext.gregs[REG_PC];
580    // Make sure the pc and the faulting address are sane.
581    //
582    // If an instruction spans a page boundary, and the page containing
583    // the beginning of the instruction is executable but the following
584    // page is not, the pc and the faulting address might be slightly
585    // different - we still want to unguard the 2nd page in this case.
586    //
587    // 15 bytes seems to be a (very) safe value for max instruction size.
588    bool pc_is_near_addr =
589      (pointer_delta((void*) addr, (void*) pc, sizeof(char)) < 15);
590    bool instr_spans_page_boundary =
591      (align_size_down((intptr_t) pc ^ (intptr_t) addr,
592                       (intptr_t) page_size) > 0);
593
594    if (pc == addr || (pc_is_near_addr && instr_spans_page_boundary)) {
595      static volatile address last_addr =
596        (address) os::non_memory_address_word();
597
598      // In conservative mode, don't unguard unless the address is in the VM
599      if (addr != last_addr &&
600          (UnguardOnExecutionViolation > 1 || os::address_is_in_vm(addr))) {
601
602        // Make memory rwx and retry
603        address page_start =
604          (address) align_size_down((intptr_t) addr, (intptr_t) page_size);
605        bool res = os::protect_memory((char*) page_start, page_size,
606                                      os::MEM_PROT_RWX);
607
608        if (PrintMiscellaneous && Verbose) {
609          char buf[256];
610          jio_snprintf(buf, sizeof(buf), "Execution protection violation "
611                       "at " INTPTR_FORMAT
612                       ", unguarding " INTPTR_FORMAT ": %s, errno=%d", addr,
613                       page_start, (res ? "success" : "failed"), errno);
614          tty->print_raw_cr(buf);
615        }
616        stub = pc;
617
618        // Set last_addr so if we fault again at the same address, we don't end
619        // up in an endless loop.
620        //
621        // There are two potential complications here.  Two threads trapping at
622        // the same address at the same time could cause one of the threads to
623        // think it already unguarded, and abort the VM.  Likely very rare.
624        //
625        // The other race involves two threads alternately trapping at
626        // different addresses and failing to unguard the page, resulting in
627        // an endless loop.  This condition is probably even more unlikely than
628        // the first.
629        //
630        // Although both cases could be avoided by using locks or thread local
631        // last_addr, these solutions are unnecessary complication: this
632        // handler is a best-effort safety net, not a complete solution.  It is
633        // disabled by default and should only be used as a workaround in case
634        // we missed any no-execute-unsafe VM code.
635
636        last_addr = addr;
637      }
638    }
639  }
640
641  if (stub != NULL) {
642    // save all thread context in case we need to restore it
643
644    if (thread != NULL) thread->set_saved_exception_pc(pc);
645    // 12/02/99: On Sparc it appears that the full context is also saved
646    // but as yet, no one looks at or restores that saved context
647    // factor me: setPC
648    uc->uc_mcontext.gregs[REG_PC] = (greg_t)stub;
649    return true;
650  }
651
652  // signal-chaining
653  if (os::Solaris::chained_handler(sig, info, ucVoid)) {
654    return true;
655  }
656
657#ifndef AMD64
658  // Workaround (bug 4900493) for Solaris kernel bug 4966651.
659  // Handle an undefined selector caused by an attempt to assign
660  // fs in libthread getipriptr(). With the current libthread design every 512
661  // thread creations the LDT for a private thread data structure is extended
662  // and thre is a hazard that and another thread attempting a thread creation
663  // will use a stale LDTR that doesn't reflect the structure's growth,
664  // causing a GP fault.
665  // Enforce the probable limit of passes through here to guard against an
666  // infinite loop if some other move to fs caused the GP fault. Note that
667  // this loop counter is ultimately a heuristic as it is possible for
668  // more than one thread to generate this fault at a time in an MP system.
669  // In the case of the loop count being exceeded or if the poll fails
670  // just fall through to a fatal error.
671  // If there is some other source of T_GPFLT traps and the text at EIP is
672  // unreadable this code will loop infinitely until the stack is exausted.
673  // The key to diagnosis in this case is to look for the bottom signal handler
674  // frame.
675
676  if(! IgnoreLibthreadGPFault) {
677    if (sig == SIGSEGV && uc->uc_mcontext.gregs[TRAPNO] == T_GPFLT) {
678      const unsigned char *p =
679                        (unsigned const char *) uc->uc_mcontext.gregs[EIP];
680
681      // Expected instruction?
682
683      if(p[0] == movlfs[0] && p[1] == movlfs[1]) {
684
685        Atomic::inc(&ldtr_refresh);
686
687        // Infinite loop?
688
689        if(ldtr_refresh < ((2 << 16) / PAGESIZE)) {
690
691          // No, force scheduling to get a fresh view of the LDTR
692
693          if(poll(NULL, 0, 10) == 0) {
694
695            // Retry the move
696
697            return false;
698          }
699        }
700      }
701    }
702  }
703#endif // !AMD64
704
705  if (!abort_if_unrecognized) {
706    // caller wants another chance, so give it to him
707    return false;
708  }
709
710  if (!os::Solaris::libjsig_is_loaded) {
711    struct sigaction oldAct;
712    sigaction(sig, (struct sigaction *)0, &oldAct);
713    if (oldAct.sa_sigaction != signalHandler) {
714      void* sighand = oldAct.sa_sigaction ? CAST_FROM_FN_PTR(void*,  oldAct.sa_sigaction)
715                                          : CAST_FROM_FN_PTR(void*, oldAct.sa_handler);
716      warning("Unexpected Signal %d occurred under user-defined signal handler %#lx", sig, (long)sighand);
717    }
718  }
719
720  if (pc == NULL && uc != NULL) {
721    pc = (address) uc->uc_mcontext.gregs[REG_PC];
722  }
723
724  // unmask current signal
725  sigset_t newset;
726  sigemptyset(&newset);
727  sigaddset(&newset, sig);
728  sigprocmask(SIG_UNBLOCK, &newset, NULL);
729
730  // Determine which sort of error to throw.  Out of swap may signal
731  // on the thread stack, which could get a mapping error when touched.
732  address addr = (address) info->si_addr;
733  if (sig == SIGBUS && info->si_code == BUS_OBJERR && info->si_errno == ENOMEM) {
734    vm_exit_out_of_memory(0, OOM_MMAP_ERROR, "Out of swap space to map in thread stack.");
735  }
736
737  VMError err(t, sig, pc, info, ucVoid);
738  err.report_and_die();
739
740  ShouldNotReachHere();
741}
742
743void os::print_context(outputStream *st, void *context) {
744  if (context == NULL) return;
745
746  ucontext_t *uc = (ucontext_t*)context;
747  st->print_cr("Registers:");
748#ifdef AMD64
749  st->print(  "RAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RAX]);
750  st->print(", RBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBX]);
751  st->print(", RCX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RCX]);
752  st->print(", RDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDX]);
753  st->cr();
754  st->print(  "RSP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSP]);
755  st->print(", RBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBP]);
756  st->print(", RSI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSI]);
757  st->print(", RDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDI]);
758  st->cr();
759  st->print(  "R8 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R8]);
760  st->print(", R9 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R9]);
761  st->print(", R10=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R10]);
762  st->print(", R11=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R11]);
763  st->cr();
764  st->print(  "R12=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R12]);
765  st->print(", R13=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R13]);
766  st->print(", R14=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R14]);
767  st->print(", R15=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R15]);
768  st->cr();
769  st->print(  "RIP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RIP]);
770  st->print(", RFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RFL]);
771#else
772  st->print(  "EAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EAX]);
773  st->print(", EBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EBX]);
774  st->print(", ECX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[ECX]);
775  st->print(", EDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EDX]);
776  st->cr();
777  st->print(  "ESP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[UESP]);
778  st->print(", EBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EBP]);
779  st->print(", ESI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[ESI]);
780  st->print(", EDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EDI]);
781  st->cr();
782  st->print(  "EIP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EIP]);
783  st->print(", EFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[EFL]);
784#endif // AMD64
785  st->cr();
786  st->cr();
787
788  intptr_t *sp = (intptr_t *)os::Solaris::ucontext_get_sp(uc);
789  st->print_cr("Top of Stack: (sp=" PTR_FORMAT ")", sp);
790  print_hex_dump(st, (address)sp, (address)(sp + 8*sizeof(intptr_t)), sizeof(intptr_t));
791  st->cr();
792
793  // Note: it may be unsafe to inspect memory near pc. For example, pc may
794  // point to garbage if entry point in an nmethod is corrupted. Leave
795  // this at the end, and hope for the best.
796  ExtendedPC epc = os::Solaris::ucontext_get_ExtendedPC(uc);
797  address pc = epc.pc();
798  st->print_cr("Instructions: (pc=" PTR_FORMAT ")", pc);
799  print_hex_dump(st, pc - 32, pc + 32, sizeof(char));
800}
801
802void os::print_register_info(outputStream *st, void *context) {
803  if (context == NULL) return;
804
805  ucontext_t *uc = (ucontext_t*)context;
806
807  st->print_cr("Register to memory mapping:");
808  st->cr();
809
810  // this is horrendously verbose but the layout of the registers in the
811  // context does not match how we defined our abstract Register set, so
812  // we can't just iterate through the gregs area
813
814  // this is only for the "general purpose" registers
815
816#ifdef AMD64
817  st->print("RAX="); print_location(st, uc->uc_mcontext.gregs[REG_RAX]);
818  st->print("RBX="); print_location(st, uc->uc_mcontext.gregs[REG_RBX]);
819  st->print("RCX="); print_location(st, uc->uc_mcontext.gregs[REG_RCX]);
820  st->print("RDX="); print_location(st, uc->uc_mcontext.gregs[REG_RDX]);
821  st->print("RSP="); print_location(st, uc->uc_mcontext.gregs[REG_RSP]);
822  st->print("RBP="); print_location(st, uc->uc_mcontext.gregs[REG_RBP]);
823  st->print("RSI="); print_location(st, uc->uc_mcontext.gregs[REG_RSI]);
824  st->print("RDI="); print_location(st, uc->uc_mcontext.gregs[REG_RDI]);
825  st->print("R8 ="); print_location(st, uc->uc_mcontext.gregs[REG_R8]);
826  st->print("R9 ="); print_location(st, uc->uc_mcontext.gregs[REG_R9]);
827  st->print("R10="); print_location(st, uc->uc_mcontext.gregs[REG_R10]);
828  st->print("R11="); print_location(st, uc->uc_mcontext.gregs[REG_R11]);
829  st->print("R12="); print_location(st, uc->uc_mcontext.gregs[REG_R12]);
830  st->print("R13="); print_location(st, uc->uc_mcontext.gregs[REG_R13]);
831  st->print("R14="); print_location(st, uc->uc_mcontext.gregs[REG_R14]);
832  st->print("R15="); print_location(st, uc->uc_mcontext.gregs[REG_R15]);
833#else
834  st->print("EAX="); print_location(st, uc->uc_mcontext.gregs[EAX]);
835  st->print("EBX="); print_location(st, uc->uc_mcontext.gregs[EBX]);
836  st->print("ECX="); print_location(st, uc->uc_mcontext.gregs[ECX]);
837  st->print("EDX="); print_location(st, uc->uc_mcontext.gregs[EDX]);
838  st->print("ESP="); print_location(st, uc->uc_mcontext.gregs[UESP]);
839  st->print("EBP="); print_location(st, uc->uc_mcontext.gregs[EBP]);
840  st->print("ESI="); print_location(st, uc->uc_mcontext.gregs[ESI]);
841  st->print("EDI="); print_location(st, uc->uc_mcontext.gregs[EDI]);
842#endif
843
844  st->cr();
845}
846
847
848#ifdef AMD64
849void os::Solaris::init_thread_fpu_state(void) {
850  // Nothing to do
851}
852#else
853// From solaris_i486.s
854extern "C" void fixcw();
855
856void os::Solaris::init_thread_fpu_state(void) {
857  // Set fpu to 53 bit precision. This happens too early to use a stub.
858  fixcw();
859}
860
861// These routines are the initial value of atomic_xchg_entry(),
862// atomic_cmpxchg_entry(), atomic_inc_entry() and fence_entry()
863// until initialization is complete.
864// TODO - replace with .il implementation when compiler supports it.
865
866typedef jint  xchg_func_t        (jint,  volatile jint*);
867typedef jint  cmpxchg_func_t     (jint,  volatile jint*,  jint);
868typedef jlong cmpxchg_long_func_t(jlong, volatile jlong*, jlong);
869typedef jint  add_func_t         (jint,  volatile jint*);
870
871jint os::atomic_xchg_bootstrap(jint exchange_value, volatile jint* dest) {
872  // try to use the stub:
873  xchg_func_t* func = CAST_TO_FN_PTR(xchg_func_t*, StubRoutines::atomic_xchg_entry());
874
875  if (func != NULL) {
876    os::atomic_xchg_func = func;
877    return (*func)(exchange_value, dest);
878  }
879  assert(Threads::number_of_threads() == 0, "for bootstrap only");
880
881  jint old_value = *dest;
882  *dest = exchange_value;
883  return old_value;
884}
885
886jint os::atomic_cmpxchg_bootstrap(jint exchange_value, volatile jint* dest, jint compare_value) {
887  // try to use the stub:
888  cmpxchg_func_t* func = CAST_TO_FN_PTR(cmpxchg_func_t*, StubRoutines::atomic_cmpxchg_entry());
889
890  if (func != NULL) {
891    os::atomic_cmpxchg_func = func;
892    return (*func)(exchange_value, dest, compare_value);
893  }
894  assert(Threads::number_of_threads() == 0, "for bootstrap only");
895
896  jint old_value = *dest;
897  if (old_value == compare_value)
898    *dest = exchange_value;
899  return old_value;
900}
901
902jlong os::atomic_cmpxchg_long_bootstrap(jlong exchange_value, volatile jlong* dest, jlong compare_value) {
903  // try to use the stub:
904  cmpxchg_long_func_t* func = CAST_TO_FN_PTR(cmpxchg_long_func_t*, StubRoutines::atomic_cmpxchg_long_entry());
905
906  if (func != NULL) {
907    os::atomic_cmpxchg_long_func = func;
908    return (*func)(exchange_value, dest, compare_value);
909  }
910  assert(Threads::number_of_threads() == 0, "for bootstrap only");
911
912  jlong old_value = *dest;
913  if (old_value == compare_value)
914    *dest = exchange_value;
915  return old_value;
916}
917
918jint os::atomic_add_bootstrap(jint add_value, volatile jint* dest) {
919  // try to use the stub:
920  add_func_t* func = CAST_TO_FN_PTR(add_func_t*, StubRoutines::atomic_add_entry());
921
922  if (func != NULL) {
923    os::atomic_add_func = func;
924    return (*func)(add_value, dest);
925  }
926  assert(Threads::number_of_threads() == 0, "for bootstrap only");
927
928  return (*dest) += add_value;
929}
930
931xchg_func_t*         os::atomic_xchg_func         = os::atomic_xchg_bootstrap;
932cmpxchg_func_t*      os::atomic_cmpxchg_func      = os::atomic_cmpxchg_bootstrap;
933cmpxchg_long_func_t* os::atomic_cmpxchg_long_func = os::atomic_cmpxchg_long_bootstrap;
934add_func_t*          os::atomic_add_func          = os::atomic_add_bootstrap;
935
936extern "C" void _solaris_raw_setup_fpu(address ptr);
937void os::setup_fpu() {
938  address fpu_cntrl = StubRoutines::addr_fpu_cntrl_wrd_std();
939  _solaris_raw_setup_fpu(fpu_cntrl);
940}
941#endif // AMD64
942
943#ifndef PRODUCT
944void os::verify_stack_alignment() {
945#ifdef AMD64
946  assert(((intptr_t)os::current_stack_pointer() & (StackAlignmentInBytes-1)) == 0, "incorrect stack alignment");
947#endif
948}
949#endif
950