prefetch_linux_x86.inline.hpp revision 1472:c18cbe5936b8 
1/*
2 * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25
26inline void Prefetch::read (void *loc, intx interval) {
27#ifdef AMD64
28  __asm__ ("prefetcht0 (%0,%1,1)" : : "r" (loc), "r" (interval));
29#endif // AMD64
30}
31
32inline void Prefetch::write(void *loc, intx interval) {
33#ifdef AMD64
34
35  // Do not use the 3dnow prefetchw instruction.  It isn't supported on em64t.
36  //  __asm__ ("prefetchw (%0,%1,1)" : : "r" (loc), "r" (interval));
37  __asm__ ("prefetcht0 (%0,%1,1)" : : "r" (loc), "r" (interval));
38
39#endif // AMD64
40}
41