globals_x86.hpp revision 9173:3f28db271235 
1/*
2 * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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5 * This code is free software; you can redistribute it and/or modify it
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7 * published by the Free Software Foundation.
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12 * version 2 for more details (a copy is included in the LICENSE file that
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14 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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23 */
24
25#ifndef CPU_X86_VM_GLOBALS_X86_HPP
26#define CPU_X86_VM_GLOBALS_X86_HPP
27
28#include "utilities/globalDefinitions.hpp"
29#include "utilities/macros.hpp"
30
31// Sets the default values for platform dependent flags used by the runtime system.
32// (see globals.hpp)
33
34define_pd_global(bool, ConvertSleepToYield,      true);
35define_pd_global(bool, ShareVtableStubs,         true);
36define_pd_global(bool, NeedsDeoptSuspend,        false); // only register window machines need this
37
38define_pd_global(bool, ImplicitNullChecks,       true);  // Generate code for implicit null checks
39define_pd_global(bool, TrapBasedNullChecks,      false); // Not needed on x86.
40define_pd_global(bool, UncommonNullCast,         true);  // Uncommon-trap NULLs passed to check cast
41
42// See 4827828 for this change. There is no globals_core_i486.hpp. I can't
43// assign a different value for C2 without touching a number of files. Use
44// #ifdef to minimize the change as it's late in Mantis. -- FIXME.
45// c1 doesn't have this problem because the fix to 4858033 assures us
46// the the vep is aligned at CodeEntryAlignment whereas c2 only aligns
47// the uep and the vep doesn't get real alignment but just slops on by
48// only assured that the entry instruction meets the 5 byte size requirement.
49#ifdef COMPILER2
50define_pd_global(intx, CodeEntryAlignment,       32);
51#else
52define_pd_global(intx, CodeEntryAlignment,       16);
53#endif // COMPILER2
54define_pd_global(intx, OptoLoopAlignment,        16);
55define_pd_global(intx, InlineFrequencyCount,     100);
56define_pd_global(intx, InlineSmallCode,          1000);
57
58#define DEFAULT_STACK_YELLOW_PAGES (NOT_WINDOWS(2) WINDOWS_ONLY(3))
59#define DEFAULT_STACK_RED_PAGES (1)
60
61#define MIN_STACK_YELLOW_PAGES DEFAULT_STACK_YELLOW_PAGES
62#define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES
63
64#ifdef AMD64
65// Very large C++ stack frames using solaris-amd64 optimized builds
66// due to lack of optimization caused by C++ compiler bugs
67#define DEFAULT_STACK_SHADOW_PAGES (NOT_WIN64(20) WIN64_ONLY(6) DEBUG_ONLY(+2))
68// For those clients that do not use write socket, we allow
69// the min range value to be below that of the default
70#define MIN_STACK_SHADOW_PAGES (NOT_WIN64(10) WIN64_ONLY(6) DEBUG_ONLY(+2))
71#else
72#define DEFAULT_STACK_SHADOW_PAGES (4 DEBUG_ONLY(+5))
73#define MIN_STACK_SHADOW_PAGES DEFAULT_STACK_SHADOW_PAGES
74#endif // AMD64
75
76define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES);
77define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES);
78define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES);
79
80define_pd_global(bool, RewriteBytecodes,     true);
81define_pd_global(bool, RewriteFrequentPairs, true);
82
83#ifdef _ALLBSD_SOURCE
84define_pd_global(bool, UseMembar,            true);
85#else
86define_pd_global(bool, UseMembar,            false);
87#endif
88
89// GC Ergo Flags
90define_pd_global(size_t, CMSYoungGenPerWorker, 64*M);  // default max size of CMS young gen, per GC worker thread
91
92define_pd_global(uintx, TypeProfileLevel, 111);
93
94define_pd_global(bool, PreserveFramePointer, false);
95
96#define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct, range, constraint) \
97                                                                            \
98  develop(bool, IEEEPrecision, true,                                        \
99          "Enables IEEE precision (for INTEL only)")                        \
100                                                                            \
101  product(bool, UseStoreImmI16, true,                                       \
102          "Use store immediate 16-bits value instruction on x86")           \
103                                                                            \
104  product(intx, UseAVX, 99,                                                 \
105          "Highest supported AVX instructions set on x86/x64")              \
106                                                                            \
107  product(bool, UseCLMUL, false,                                            \
108          "Control whether CLMUL instructions can be used on x86/x64")      \
109                                                                            \
110  diagnostic(bool, UseIncDec, true,                                         \
111          "Use INC, DEC instructions on x86")                               \
112                                                                            \
113  product(bool, UseNewLongLShift, false,                                    \
114          "Use optimized bitwise shift left")                               \
115                                                                            \
116  product(bool, UseAddressNop, false,                                       \
117          "Use '0F 1F [addr]' NOP instructions on x86 cpus")                \
118                                                                            \
119  product(bool, UseXmmLoadAndClearUpper, true,                              \
120          "Load low part of XMM register and clear upper part")             \
121                                                                            \
122  product(bool, UseXmmRegToRegMoveAll, false,                               \
123          "Copy all XMM register bits when moving value between registers") \
124                                                                            \
125  product(bool, UseXmmI2D, false,                                           \
126          "Use SSE2 CVTDQ2PD instruction to convert Integer to Double")     \
127                                                                            \
128  product(bool, UseXmmI2F, false,                                           \
129          "Use SSE2 CVTDQ2PS instruction to convert Integer to Float")      \
130                                                                            \
131  product(bool, UseUnalignedLoadStores, false,                              \
132          "Use SSE2 MOVDQU instruction for Arraycopy")                      \
133                                                                            \
134  product(bool, UseFastStosb, false,                                        \
135          "Use fast-string operation for zeroing: rep stosb")               \
136                                                                            \
137  /* Use Restricted Transactional Memory for lock eliding */                \
138  product(bool, UseRTMLocking, false,                                       \
139          "Enable RTM lock eliding for inflated locks in compiled code")    \
140                                                                            \
141  experimental(bool, UseRTMForStackLocks, false,                            \
142          "Enable RTM lock eliding for stack locks in compiled code")       \
143                                                                            \
144  product(bool, UseRTMDeopt, false,                                         \
145          "Perform deopt and recompilation based on RTM abort ratio")       \
146                                                                            \
147  product(uintx, RTMRetryCount, 5,                                          \
148          "Number of RTM retries on lock abort or busy")                    \
149          range(0, max_uintx)                                               \
150                                                                            \
151  experimental(intx, RTMSpinLoopCount, 100,                                 \
152          "Spin count for lock to become free before RTM retry")            \
153                                                                            \
154  experimental(intx, RTMAbortThreshold, 1000,                               \
155          "Calculate abort ratio after this number of aborts")              \
156                                                                            \
157  experimental(intx, RTMLockingThreshold, 10000,                            \
158          "Lock count at which to do RTM lock eliding without "             \
159          "abort ratio calculation")                                        \
160                                                                            \
161  experimental(intx, RTMAbortRatio, 50,                                     \
162          "Lock abort ratio at which to stop use RTM lock eliding")         \
163                                                                            \
164  experimental(intx, RTMTotalCountIncrRate, 64,                             \
165          "Increment total RTM attempted lock count once every n times")    \
166                                                                            \
167  experimental(intx, RTMLockingCalculationDelay, 0,                         \
168          "Number of milliseconds to wait before start calculating aborts " \
169          "for RTM locking")                                                \
170                                                                            \
171  experimental(bool, UseRTMXendForLockBusy, true,                           \
172          "Use RTM Xend instead of Xabort when lock busy")                  \
173                                                                            \
174  /* assembler */                                                           \
175  product(bool, Use486InstrsOnly, false,                                    \
176          "Use 80486 Compliant instruction subset")                         \
177                                                                            \
178  product(bool, UseCountLeadingZerosInstruction, false,                     \
179          "Use count leading zeros instruction")                            \
180                                                                            \
181  product(bool, UseCountTrailingZerosInstruction, false,                    \
182          "Use count trailing zeros instruction")                           \
183                                                                            \
184  product(bool, UseBMI1Instructions, false,                                 \
185          "Use BMI1 instructions")                                          \
186                                                                            \
187  product(bool, UseBMI2Instructions, false,                                 \
188          "Use BMI2 instructions")
189#endif // CPU_X86_VM_GLOBALS_X86_HPP
190