c1_LIRGenerator_x86.cpp revision 1499:e9ff18c4ace7
197403Sobrien/* 297403Sobrien * Copyright (c) 2005, 2009, Oracle and/or its affiliates. All rights reserved. 3169691Skan * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 497403Sobrien * 597403Sobrien * This code is free software; you can redistribute it and/or modify it 697403Sobrien * under the terms of the GNU General Public License version 2 only, as 797403Sobrien * published by the Free Software Foundation. 897403Sobrien * 997403Sobrien * This code is distributed in the hope that it will be useful, but WITHOUT 1097403Sobrien * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1197403Sobrien * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 1297403Sobrien * version 2 for more details (a copy is included in the LICENSE file that 1397403Sobrien * accompanied this code). 1497403Sobrien * 1597403Sobrien * You should have received a copy of the GNU General Public License version 1697403Sobrien * 2 along with this work; if not, write to the Free Software Foundation, 1797403Sobrien * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18169691Skan * 1997403Sobrien * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 2097403Sobrien * or visit www.oracle.com if you need additional information or have any 2197403Sobrien * questions. 2297403Sobrien * 2397403Sobrien */ 2497403Sobrien 2597403Sobrien# include "incls/_precompiled.incl" 2697403Sobrien# include "incls/_c1_LIRGenerator_x86.cpp.incl" 2797403Sobrien 2897403Sobrien#ifdef ASSERT 2997403Sobrien#define __ gen()->lir(__FILE__, __LINE__)-> 3097403Sobrien#else 3197403Sobrien#define __ gen()->lir()-> 3297403Sobrien#endif 3397403Sobrien 3497403Sobrien// Item will be loaded into a byte register; Intel only 3597403Sobrienvoid LIRItem::load_byte_item() { 3697403Sobrien load_item(); 3797403Sobrien LIR_Opr res = result(); 3897403Sobrien 3997403Sobrien if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { 4097403Sobrien // make sure that it is a byte register 4197403Sobrien assert(!value()->type()->is_float() && !value()->type()->is_double(), 4297403Sobrien "can't load floats in byte register"); 4397403Sobrien LIR_Opr reg = _gen->rlock_byte(T_BYTE); 4497403Sobrien __ move(res, reg); 4597403Sobrien 4697403Sobrien _result = reg; 4797403Sobrien } 4897403Sobrien} 4997403Sobrien 5097403Sobrien 5197403Sobrienvoid LIRItem::load_nonconstant() { 5297403Sobrien LIR_Opr r = value()->operand(); 5397403Sobrien if (r->is_constant()) { 5497403Sobrien _result = r; 5597403Sobrien } else { 5697403Sobrien load_item(); 5797403Sobrien } 58169691Skan} 5997403Sobrien 6097403Sobrien//-------------------------------------------------------------- 61132720Skan// LIRGenerator 62132720Skan//-------------------------------------------------------------- 6397403Sobrien 64169691Skan 65132720SkanLIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } 6697403SobrienLIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } 6797403SobrienLIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } 68169691SkanLIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } 69169691SkanLIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } 70132720SkanLIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } 71132720SkanLIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } 72132720SkanLIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } 73132720Skan 7497403Sobrien 75169691SkanLIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { 76169691Skan LIR_Opr opr; 77169691Skan switch (type->tag()) { 78169691Skan case intTag: opr = FrameMap::rax_opr; break; 79169691Skan case objectTag: opr = FrameMap::rax_oop_opr; break; 80169691Skan case longTag: opr = FrameMap::long0_opr; break; 81169691Skan case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; 82169691Skan case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; 83169691Skan 84169691Skan case addressTag: 85169691Skan default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 86169691Skan } 87169691Skan 8897403Sobrien assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); 89169691Skan return opr; 9097403Sobrien} 91169691Skan 92169691Skan 93169691SkanLIR_Opr LIRGenerator::rlock_byte(BasicType type) { 94169691Skan LIR_Opr reg = new_register(T_INT); 95169691Skan set_vreg_flag(reg, LIRGenerator::byte_reg); 96169691Skan return reg; 97169691Skan} 98169691Skan 99169691Skan 100169691Skan//--------- loading items into registers -------------------------------- 101169691Skan 102169691Skan 103169691Skan// i486 instructions can inline constants 104169691Skanbool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { 105169691Skan if (type == T_SHORT || type == T_CHAR) { 106169691Skan // there is no immediate move of word values in asembler_i486.?pp 107169691Skan return false; 108169691Skan } 109169691Skan Constant* c = v->as_Constant(); 110169691Skan if (c && c->state() == NULL) { 111169691Skan // constants of any type can be stored directly, except for 112169691Skan // unloaded object constants. 113169691Skan return true; 114132720Skan } 115169691Skan return false; 116169691Skan} 117169691Skan 11897403Sobrien 119169691Skanbool LIRGenerator::can_inline_as_constant(Value v) const { 120169691Skan if (v->type()->tag() == longTag) return false; 121169691Skan return v->type()->tag() != objectTag || 12297403Sobrien (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); 123169691Skan} 124169691Skan 125169691Skan 126169691Skanbool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { 127169691Skan if (c->type() == T_LONG) return false; 128169691Skan return c->type() != T_OBJECT || c->as_jobject() == NULL; 129169691Skan} 13097403Sobrien 131169691Skan 132169691SkanLIR_Opr LIRGenerator::safepoint_poll_register() { 13397403Sobrien return LIR_OprFact::illegalOpr; 134169691Skan} 135169691Skan 136169691Skan 13797403SobrienLIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, 138169691Skan int shift, int disp, BasicType type) { 139169691Skan assert(base->is_register(), "must be"); 140169691Skan if (index->is_constant()) { 141169691Skan return new LIR_Address(base, 14297403Sobrien (index->as_constant_ptr()->as_jint() << shift) + disp, 143169691Skan type); 144169691Skan } else { 145169691Skan return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); 146169691Skan } 14797403Sobrien} 148169691Skan 149169691Skan 150169691SkanLIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, 151169691Skan BasicType type, bool needs_card_mark) { 152169691Skan int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); 15397403Sobrien 154169691Skan LIR_Address* addr; 155169691Skan if (index_opr->is_constant()) { 156169691Skan int elem_size = type2aelembytes(type); 157169691Skan addr = new LIR_Address(array_opr, 158169691Skan offset_in_bytes + index_opr->as_jint() * elem_size, type); 159169691Skan } else { 16097403Sobrien#ifdef _LP64 161169691Skan if (index_opr->type() == T_INT) { 162169691Skan LIR_Opr tmp = new_register(T_LONG); 163169691Skan __ convert(Bytecodes::_i2l, index_opr, tmp); 164169691Skan index_opr = tmp; 165169691Skan } 166169691Skan#endif // _LP64 167169691Skan addr = new LIR_Address(array_opr, 168169691Skan index_opr, 169169691Skan LIR_Address::scale(type), 170169691Skan offset_in_bytes, type); 171169691Skan } 172169691Skan if (needs_card_mark) { 173169691Skan // This store will need a precise card mark, so go ahead and 174169691Skan // compute the full adddres instead of computing once for the 175169691Skan // store and again for the card mark. 176169691Skan LIR_Opr tmp = new_pointer_register(); 17797403Sobrien __ leal(LIR_OprFact::address(addr), tmp); 178169691Skan return new LIR_Address(tmp, type); 179169691Skan } else { 180169691Skan return addr; 181169691Skan } 18297403Sobrien} 183169691Skan 184169691Skan 185169691Skanvoid LIRGenerator::increment_counter(address counter, int step) { 18697403Sobrien LIR_Opr pointer = new_pointer_register(); 187169691Skan __ move(LIR_OprFact::intptrConst(counter), pointer); 188169691Skan LIR_Address* addr = new LIR_Address(pointer, T_INT); 189169691Skan increment_counter(addr, step); 190132720Skan} 191169691Skan 192169691Skan 193169691Skanvoid LIRGenerator::increment_counter(LIR_Address* addr, int step) { 19497403Sobrien __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); 195169691Skan} 196169691Skan 197169691Skan 19897403Sobrienvoid LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 199169691Skan __ cmp_mem_int(condition, base, disp, c, info); 200169691Skan} 201169691Skan 202169691Skan 20397403Sobrienvoid LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { 204169691Skan __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 205169691Skan} 206169691Skan 207169691Skan 20897403Sobrienvoid LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { 209169691Skan __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 210169691Skan} 211169691Skan 21297403Sobrien 213169691Skanbool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { 214169691Skan if (tmp->is_valid()) { 215169691Skan if (is_power_of_2(c + 1)) { 21697403Sobrien __ move(left, tmp); 217169691Skan __ shift_left(left, log2_intptr(c + 1), left); 218169691Skan __ sub(left, tmp, result); 219169691Skan return true; 22097403Sobrien } else if (is_power_of_2(c - 1)) { 221169691Skan __ move(left, tmp); 222169691Skan __ shift_left(left, log2_intptr(c - 1), left); 223169691Skan __ add(left, tmp, result); 22497403Sobrien return true; 225169691Skan } 226169691Skan } 227169691Skan return false; 22897403Sobrien} 229169691Skan 230169691Skan 231169691Skanvoid LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { 23297403Sobrien BasicType type = item->type(); 233169691Skan __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); 234169691Skan} 235169691Skan 236169691Skan//---------------------------------------------------------------------- 237169691Skan// visitor functions 238169691Skan//---------------------------------------------------------------------- 239169691Skan 240169691Skan 241169691Skanvoid LIRGenerator::do_StoreIndexed(StoreIndexed* x) { 242169691Skan assert(x->is_root(),""); 243169691Skan bool needs_range_check = true; 244169691Skan bool use_length = x->length() != NULL; 245169691Skan bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; 246169691Skan bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || 247169691Skan !get_jobject_constant(x->value())->is_null_object()); 248169691Skan 249169691Skan LIRItem array(x->array(), this); 250169691Skan LIRItem index(x->index(), this); 251169691Skan LIRItem value(x->value(), this); 252169691Skan LIRItem length(this); 253169691Skan 254169691Skan array.load_item(); 255169691Skan index.load_nonconstant(); 256169691Skan 257169691Skan if (use_length) { 258169691Skan needs_range_check = x->compute_needs_range_check(); 259169691Skan if (needs_range_check) { 260169691Skan length.set_instruction(x->length()); 261169691Skan length.load_item(); 262169691Skan } 263169691Skan } 264169691Skan if (needs_store_check) { 265169691Skan value.load_item(); 266169691Skan } else { 267169691Skan value.load_for_store(x->elt_type()); 268169691Skan } 269169691Skan 270169691Skan set_no_result(x); 271169691Skan 272169691Skan // the CodeEmitInfo must be duplicated for each different 273169691Skan // LIR-instruction because spilling can occur anywhere between two 274169691Skan // instructions and so the debug information must be different 275169691Skan CodeEmitInfo* range_check_info = state_for(x); 276169691Skan CodeEmitInfo* null_check_info = NULL; 277169691Skan if (x->needs_null_check()) { 278169691Skan null_check_info = new CodeEmitInfo(range_check_info); 279169691Skan } 280169691Skan 281169691Skan // emit array address setup early so it schedules better 282169691Skan LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); 283169691Skan 284169691Skan if (GenerateRangeChecks && needs_range_check) { 285169691Skan if (use_length) { 286169691Skan __ cmp(lir_cond_belowEqual, length.result(), index.result()); 287169691Skan __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); 288169691Skan } else { 289169691Skan array_range_check(array.result(), index.result(), null_check_info, range_check_info); 290169691Skan // range_check also does the null check 291169691Skan null_check_info = NULL; 292169691Skan } 293169691Skan } 294169691Skan 295169691Skan if (GenerateArrayStoreCheck && needs_store_check) { 296169691Skan LIR_Opr tmp1 = new_register(objectType); 297169691Skan LIR_Opr tmp2 = new_register(objectType); 298169691Skan LIR_Opr tmp3 = new_register(objectType); 299169691Skan 300169691Skan CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); 301169691Skan __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info); 302169691Skan } 303169691Skan 304169691Skan if (obj_store) { 305169691Skan // Needs GC write barriers. 306169691Skan pre_barrier(LIR_OprFact::address(array_addr), false, NULL); 307169691Skan __ move(value.result(), array_addr, null_check_info); 308169691Skan // Seems to be a precise 30997403Sobrien post_barrier(LIR_OprFact::address(array_addr), value.result()); 31097403Sobrien } else { 311169691Skan __ move(value.result(), array_addr, null_check_info); 31297403Sobrien } 313169691Skan} 314169691Skan 315169691Skan 316169691Skanvoid LIRGenerator::do_MonitorEnter(MonitorEnter* x) { 317169691Skan assert(x->is_root(),""); 318169691Skan LIRItem obj(x->obj(), this); 319169691Skan obj.load_item(); 320169691Skan 321169691Skan set_no_result(x); 322169691Skan 323169691Skan // "lock" stores the address of the monitor stack slot, so this is not an oop 324169691Skan LIR_Opr lock = new_register(T_INT); 325169691Skan // Need a scratch register for biased locking on x86 326169691Skan LIR_Opr scratch = LIR_OprFact::illegalOpr; 327169691Skan if (UseBiasedLocking) { 328169691Skan scratch = new_register(T_INT); 329169691Skan } 330169691Skan 331169691Skan CodeEmitInfo* info_for_exception = NULL; 332169691Skan if (x->needs_null_check()) { 333169691Skan info_for_exception = state_for(x, x->lock_stack_before()); 334169691Skan } 335169691Skan // this CodeEmitInfo must not have the xhandlers because here the 33697403Sobrien // object is already locked (xhandlers expect object to be unlocked) 337169691Skan CodeEmitInfo* info = state_for(x, x->state(), true); 338169691Skan monitor_enter(obj.result(), lock, syncTempOpr(), scratch, 339169691Skan x->monitor_no(), info_for_exception, info); 34097403Sobrien} 341169691Skan 342169691Skan 343169691Skanvoid LIRGenerator::do_MonitorExit(MonitorExit* x) { 34497403Sobrien assert(x->is_root(),""); 345169691Skan 346169691Skan LIRItem obj(x->obj(), this); 347169691Skan obj.dont_load_item(); 34897403Sobrien 349169691Skan LIR_Opr lock = new_register(T_INT); 350169691Skan LIR_Opr obj_temp = new_register(T_INT); 351169691Skan set_no_result(x); 35297403Sobrien monitor_exit(obj_temp, lock, syncTempOpr(), x->monitor_no()); 353169691Skan} 354169691Skan 35597403Sobrien 356169691Skan// _ineg, _lneg, _fneg, _dneg 357169691Skanvoid LIRGenerator::do_NegateOp(NegateOp* x) { 358169691Skan LIRItem value(x->x(), this); 35997403Sobrien value.set_destroys_register(); 360169691Skan value.load_item(); 361169691Skan LIR_Opr reg = rlock(x); 362169691Skan __ negate(value.result(), reg); 363169691Skan 36497403Sobrien set_result(x, round_item(reg)); 365169691Skan} 366169691Skan 367169691Skan 368169691Skan// for _fadd, _fmul, _fsub, _fdiv, _frem 36997403Sobrien// _dadd, _dmul, _dsub, _ddiv, _drem 370169691Skanvoid LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { 371169691Skan LIRItem left(x->x(), this); 372169691Skan LIRItem right(x->y(), this); 373169691Skan LIRItem* left_arg = &left; 374169691Skan LIRItem* right_arg = &right; 37597403Sobrien assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); 376169691Skan bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); 377169691Skan if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { 378169691Skan left.load_item(); 379169691Skan } else { 380169691Skan left.dont_load_item(); 381169691Skan } 38297403Sobrien 383169691Skan // do not load right operand if it is a constant. only 0 and 1 are 384169691Skan // loaded because there are special instructions for loading them 385169691Skan // without memory access (not needed for SSE2 instructions) 386169691Skan bool must_load_right = false; 387132720Skan if (right.is_constant()) { 388169691Skan LIR_Const* c = right.result()->as_constant_ptr(); 389169691Skan assert(c != NULL, "invalid constant"); 390169691Skan assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); 39197403Sobrien 392169691Skan if (c->type() == T_FLOAT) { 393169691Skan must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); 394169691Skan } else { 39597403Sobrien must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); 396169691Skan } 397169691Skan } 398169691Skan 39997403Sobrien if (must_load_both) { 400169691Skan // frem and drem destroy also right operand, so move it to a new register 401169691Skan right.set_destroys_register(); 402169691Skan right.load_item(); 403169691Skan } else if (right.is_register() || must_load_right) { 40497403Sobrien right.load_item(); 405169691Skan } else { 406169691Skan right.dont_load_item(); 407169691Skan } 40897403Sobrien LIR_Opr reg = rlock(x); 409169691Skan LIR_Opr tmp = LIR_OprFact::illegalOpr; 410169691Skan if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) { 411169691Skan tmp = new_register(T_DOUBLE); 41297403Sobrien } 413169691Skan 414169691Skan if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { 415169691Skan // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots 41697403Sobrien LIR_Opr fpu0, fpu1; 417169691Skan if (x->op() == Bytecodes::_frem) { 418169691Skan fpu0 = LIR_OprFact::single_fpu(0); 419169691Skan fpu1 = LIR_OprFact::single_fpu(1); 42097403Sobrien } else { 421169691Skan fpu0 = LIR_OprFact::double_fpu(0); 422169691Skan fpu1 = LIR_OprFact::double_fpu(1); 423169691Skan } 424169691Skan __ move(right.result(), fpu1); // order of left and right operand is important! 42597403Sobrien __ move(left.result(), fpu0); 426169691Skan __ rem (fpu0, fpu1, fpu0); 427169691Skan __ move(fpu0, reg); 428169691Skan 429169691Skan } else { 43097403Sobrien arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); 431169691Skan } 432169691Skan 433169691Skan set_result(x, round_item(reg)); 43497403Sobrien} 435169691Skan 436169691Skan 437169691Skan// for _ladd, _lmul, _lsub, _ldiv, _lrem 43897403Sobrienvoid LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { 439169691Skan if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { 440169691Skan // long division is implemented as a direct call into the runtime 441169691Skan LIRItem left(x->x(), this); 442169691Skan LIRItem right(x->y(), this); 443169691Skan 444169691Skan // the check for division by zero destroys the right operand 445169691Skan right.set_destroys_register(); 446169691Skan 447169691Skan BasicTypeList signature(2); 448169691Skan signature.append(T_LONG); 449169691Skan signature.append(T_LONG); 450169691Skan CallingConvention* cc = frame_map()->c_calling_convention(&signature); 451169691Skan 452169691Skan // check for division by zero (destroys registers of right operand!) 453169691Skan CodeEmitInfo* info = state_for(x); 454169691Skan 455169691Skan const LIR_Opr result_reg = result_register_for(x->type()); 456169691Skan left.load_item_force(cc->at(1)); 457169691Skan right.load_item(); 458169691Skan 459169691Skan __ move(right.result(), cc->at(0)); 460169691Skan 461169691Skan __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); 462169691Skan __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); 463169691Skan 464169691Skan address entry; 465169691Skan switch (x->op()) { 466169691Skan case Bytecodes::_lrem: 467169691Skan entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); 468169691Skan break; // check if dividend is 0 is done elsewhere 469169691Skan case Bytecodes::_ldiv: 470169691Skan entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); 471169691Skan break; // check if dividend is 0 is done elsewhere 472169691Skan case Bytecodes::_lmul: 473169691Skan entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); 474169691Skan break; 475169691Skan default: 476169691Skan ShouldNotReachHere(); 477169691Skan } 478169691Skan 479169691Skan LIR_Opr result = rlock_result(x); 480169691Skan __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); 481169691Skan __ move(result_reg, result); 482169691Skan } else if (x->op() == Bytecodes::_lmul) { 483169691Skan // missing test if instr is commutative and if we should swap 484169691Skan LIRItem left(x->x(), this); 485169691Skan LIRItem right(x->y(), this); 486169691Skan 487169691Skan // right register is destroyed by the long mul, so it must be 488169691Skan // copied to a new register. 489169691Skan right.set_destroys_register(); 490169691Skan 491169691Skan left.load_item(); 492169691Skan right.load_item(); 493169691Skan 494169691Skan LIR_Opr reg = FrameMap::long0_opr; 495169691Skan arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); 496169691Skan LIR_Opr result = rlock_result(x); 497169691Skan __ move(reg, result); 498169691Skan } else { 499169691Skan // missing test if instr is commutative and if we should swap 500169691Skan LIRItem left(x->x(), this); 501169691Skan LIRItem right(x->y(), this); 502169691Skan 503169691Skan left.load_item(); 504169691Skan // don't load constants to save register 505169691Skan right.load_nonconstant(); 506169691Skan rlock_result(x); 507169691Skan arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); 508169691Skan } 509169691Skan} 510169691Skan 511132720Skan 512169691Skan 513169691Skan// for: _iadd, _imul, _isub, _idiv, _irem 514169691Skanvoid LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { 515169691Skan if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { 516169691Skan // The requirements for division and modulo 517169691Skan // input : rax,: dividend min_int 518169691Skan // reg: divisor (may not be rax,/rdx) -1 519169691Skan // 520169691Skan // output: rax,: quotient (= rax, idiv reg) min_int 521169691Skan // rdx: remainder (= rax, irem reg) 0 522169691Skan 523169691Skan // rax, and rdx will be destroyed 524169691Skan 525169691Skan // Note: does this invalidate the spec ??? 526169691Skan LIRItem right(x->y(), this); 527169691Skan LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid 528169691Skan 529169691Skan // call state_for before load_item_force because state_for may 530169691Skan // force the evaluation of other instructions that are needed for 531169691Skan // correct debug info. Otherwise the live range of the fix 532169691Skan // register might be too long. 533169691Skan CodeEmitInfo* info = state_for(x); 534169691Skan 535169691Skan left.load_item_force(divInOpr()); 536169691Skan 537169691Skan right.load_item(); 538169691Skan 539169691Skan LIR_Opr result = rlock_result(x); 540169691Skan LIR_Opr result_reg; 541169691Skan if (x->op() == Bytecodes::_idiv) { 542169691Skan result_reg = divOutOpr(); 543169691Skan } else { 544169691Skan result_reg = remOutOpr(); 545169691Skan } 546169691Skan 547169691Skan if (!ImplicitDiv0Checks) { 548169691Skan __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); 549169691Skan __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); 550169691Skan } 551169691Skan LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation 552169691Skan if (x->op() == Bytecodes::_irem) { 553169691Skan __ irem(left.result(), right.result(), result_reg, tmp, info); 554169691Skan } else if (x->op() == Bytecodes::_idiv) { 555169691Skan __ idiv(left.result(), right.result(), result_reg, tmp, info); 556169691Skan } else { 557169691Skan ShouldNotReachHere(); 558169691Skan } 559169691Skan 560169691Skan __ move(result_reg, result); 561169691Skan } else { 562169691Skan // missing test if instr is commutative and if we should swap 563169691Skan LIRItem left(x->x(), this); 564169691Skan LIRItem right(x->y(), this); 565169691Skan LIRItem* left_arg = &left; 566169691Skan LIRItem* right_arg = &right; 567169691Skan if (x->is_commutative() && left.is_stack() && right.is_register()) { 568169691Skan // swap them if left is real stack (or cached) and right is real register(not cached) 569169691Skan left_arg = &right; 570169691Skan right_arg = &left; 571169691Skan } 572169691Skan 573169691Skan left_arg->load_item(); 574169691Skan 575169691Skan // do not need to load right, as we can handle stack and constants 576169691Skan if (x->op() == Bytecodes::_imul ) { 577169691Skan // check if we can use shift instead 578169691Skan bool use_constant = false; 579169691Skan bool use_tmp = false; 580169691Skan if (right_arg->is_constant()) { 581169691Skan int iconst = right_arg->get_jint_constant(); 582169691Skan if (iconst > 0) { 583169691Skan if (is_power_of_2(iconst)) { 584169691Skan use_constant = true; 585169691Skan } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { 586169691Skan use_constant = true; 587169691Skan use_tmp = true; 588169691Skan } 589169691Skan } 590169691Skan } 591169691Skan if (use_constant) { 592169691Skan right_arg->dont_load_item(); 593169691Skan } else { 594169691Skan right_arg->load_item(); 595169691Skan } 596169691Skan LIR_Opr tmp = LIR_OprFact::illegalOpr; 597169691Skan if (use_tmp) { 598169691Skan tmp = new_register(T_INT); 599169691Skan } 600169691Skan rlock_result(x); 601169691Skan 602169691Skan arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 603169691Skan } else { 604169691Skan right_arg->dont_load_item(); 605169691Skan rlock_result(x); 606 LIR_Opr tmp = LIR_OprFact::illegalOpr; 607 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 608 } 609 } 610} 611 612 613void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { 614 // when an operand with use count 1 is the left operand, then it is 615 // likely that no move for 2-operand-LIR-form is necessary 616 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 617 x->swap_operands(); 618 } 619 620 ValueTag tag = x->type()->tag(); 621 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); 622 switch (tag) { 623 case floatTag: 624 case doubleTag: do_ArithmeticOp_FPU(x); return; 625 case longTag: do_ArithmeticOp_Long(x); return; 626 case intTag: do_ArithmeticOp_Int(x); return; 627 } 628 ShouldNotReachHere(); 629} 630 631 632// _ishl, _lshl, _ishr, _lshr, _iushr, _lushr 633void LIRGenerator::do_ShiftOp(ShiftOp* x) { 634 // count must always be in rcx 635 LIRItem value(x->x(), this); 636 LIRItem count(x->y(), this); 637 638 ValueTag elemType = x->type()->tag(); 639 bool must_load_count = !count.is_constant() || elemType == longTag; 640 if (must_load_count) { 641 // count for long must be in register 642 count.load_item_force(shiftCountOpr()); 643 } else { 644 count.dont_load_item(); 645 } 646 value.load_item(); 647 LIR_Opr reg = rlock_result(x); 648 649 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); 650} 651 652 653// _iand, _land, _ior, _lor, _ixor, _lxor 654void LIRGenerator::do_LogicOp(LogicOp* x) { 655 // when an operand with use count 1 is the left operand, then it is 656 // likely that no move for 2-operand-LIR-form is necessary 657 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 658 x->swap_operands(); 659 } 660 661 LIRItem left(x->x(), this); 662 LIRItem right(x->y(), this); 663 664 left.load_item(); 665 right.load_nonconstant(); 666 LIR_Opr reg = rlock_result(x); 667 668 logic_op(x->op(), reg, left.result(), right.result()); 669} 670 671 672 673// _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg 674void LIRGenerator::do_CompareOp(CompareOp* x) { 675 LIRItem left(x->x(), this); 676 LIRItem right(x->y(), this); 677 ValueTag tag = x->x()->type()->tag(); 678 if (tag == longTag) { 679 left.set_destroys_register(); 680 } 681 left.load_item(); 682 right.load_item(); 683 LIR_Opr reg = rlock_result(x); 684 685 if (x->x()->type()->is_float_kind()) { 686 Bytecodes::Code code = x->op(); 687 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); 688 } else if (x->x()->type()->tag() == longTag) { 689 __ lcmp2int(left.result(), right.result(), reg); 690 } else { 691 Unimplemented(); 692 } 693} 694 695 696void LIRGenerator::do_AttemptUpdate(Intrinsic* x) { 697 assert(x->number_of_arguments() == 3, "wrong type"); 698 LIRItem obj (x->argument_at(0), this); // AtomicLong object 699 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field 700 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value 701 702 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction 703 cmp_value.load_item_force(FrameMap::long0_opr); 704 705 // new value must be in rcx,ebx (hi,lo) 706 new_value.load_item_force(FrameMap::long1_opr); 707 708 // object pointer register is overwritten with field address 709 obj.load_item(); 710 711 // generate compare-and-swap; produces zero condition if swap occurs 712 int value_offset = sun_misc_AtomicLongCSImpl::value_offset(); 713 LIR_Opr addr = obj.result(); 714 __ add(addr, LIR_OprFact::intConst(value_offset), addr); 715 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed 716 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed 717 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2); 718 719 // generate conditional move of boolean result 720 LIR_Opr result = rlock_result(x); 721 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result); 722} 723 724 725void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { 726 assert(x->number_of_arguments() == 4, "wrong type"); 727 LIRItem obj (x->argument_at(0), this); // object 728 LIRItem offset(x->argument_at(1), this); // offset of field 729 LIRItem cmp (x->argument_at(2), this); // value to compare with field 730 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp 731 732 assert(obj.type()->tag() == objectTag, "invalid type"); 733 734 // In 64bit the type can be long, sparc doesn't have this assert 735 // assert(offset.type()->tag() == intTag, "invalid type"); 736 737 assert(cmp.type()->tag() == type->tag(), "invalid type"); 738 assert(val.type()->tag() == type->tag(), "invalid type"); 739 740 // get address of field 741 obj.load_item(); 742 offset.load_nonconstant(); 743 744 if (type == objectType) { 745 cmp.load_item_force(FrameMap::rax_oop_opr); 746 val.load_item(); 747 } else if (type == intType) { 748 cmp.load_item_force(FrameMap::rax_opr); 749 val.load_item(); 750 } else if (type == longType) { 751 cmp.load_item_force(FrameMap::long0_opr); 752 val.load_item_force(FrameMap::long1_opr); 753 } else { 754 ShouldNotReachHere(); 755 } 756 757 LIR_Opr addr = new_pointer_register(); 758 LIR_Address* a; 759 if(offset.result()->is_constant()) { 760 a = new LIR_Address(obj.result(), 761 NOT_LP64(offset.result()->as_constant_ptr()->as_jint()) LP64_ONLY((int)offset.result()->as_constant_ptr()->as_jlong()), 762 as_BasicType(type)); 763 } else { 764 a = new LIR_Address(obj.result(), 765 offset.result(), 766 LIR_Address::times_1, 767 0, 768 as_BasicType(type)); 769 } 770 __ leal(LIR_OprFact::address(a), addr); 771 772 if (type == objectType) { // Write-barrier needed for Object fields. 773 // Do the pre-write barrier, if any. 774 pre_barrier(addr, false, NULL); 775 } 776 777 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience 778 if (type == objectType) 779 __ cas_obj(addr, cmp.result(), val.result(), ill, ill); 780 else if (type == intType) 781 __ cas_int(addr, cmp.result(), val.result(), ill, ill); 782 else if (type == longType) 783 __ cas_long(addr, cmp.result(), val.result(), ill, ill); 784 else { 785 ShouldNotReachHere(); 786 } 787 788 // generate conditional move of boolean result 789 LIR_Opr result = rlock_result(x); 790 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result); 791 if (type == objectType) { // Write-barrier needed for Object fields. 792 // Seems to be precise 793 post_barrier(addr, val.result()); 794 } 795} 796 797 798void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { 799 assert(x->number_of_arguments() == 1, "wrong type"); 800 LIRItem value(x->argument_at(0), this); 801 802 bool use_fpu = false; 803 if (UseSSE >= 2) { 804 switch(x->id()) { 805 case vmIntrinsics::_dsin: 806 case vmIntrinsics::_dcos: 807 case vmIntrinsics::_dtan: 808 case vmIntrinsics::_dlog: 809 case vmIntrinsics::_dlog10: 810 use_fpu = true; 811 } 812 } else { 813 value.set_destroys_register(); 814 } 815 816 value.load_item(); 817 818 LIR_Opr calc_input = value.result(); 819 LIR_Opr calc_result = rlock_result(x); 820 821 // sin and cos need two free fpu stack slots, so register two temporary operands 822 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0); 823 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1); 824 825 if (use_fpu) { 826 LIR_Opr tmp = FrameMap::fpu0_double_opr; 827 __ move(calc_input, tmp); 828 829 calc_input = tmp; 830 calc_result = tmp; 831 tmp1 = FrameMap::caller_save_fpu_reg_at(1); 832 tmp2 = FrameMap::caller_save_fpu_reg_at(2); 833 } 834 835 switch(x->id()) { 836 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break; 837 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break; 838 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break; 839 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break; 840 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break; 841 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break; 842 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break; 843 default: ShouldNotReachHere(); 844 } 845 846 if (use_fpu) { 847 __ move(calc_result, x->operand()); 848 } 849} 850 851 852void LIRGenerator::do_ArrayCopy(Intrinsic* x) { 853 assert(x->number_of_arguments() == 5, "wrong type"); 854 LIRItem src(x->argument_at(0), this); 855 LIRItem src_pos(x->argument_at(1), this); 856 LIRItem dst(x->argument_at(2), this); 857 LIRItem dst_pos(x->argument_at(3), this); 858 LIRItem length(x->argument_at(4), this); 859 860 // operands for arraycopy must use fixed registers, otherwise 861 // LinearScan will fail allocation (because arraycopy always needs a 862 // call) 863 864#ifndef _LP64 865 src.load_item_force (FrameMap::rcx_oop_opr); 866 src_pos.load_item_force (FrameMap::rdx_opr); 867 dst.load_item_force (FrameMap::rax_oop_opr); 868 dst_pos.load_item_force (FrameMap::rbx_opr); 869 length.load_item_force (FrameMap::rdi_opr); 870 LIR_Opr tmp = (FrameMap::rsi_opr); 871#else 872 873 // The java calling convention will give us enough registers 874 // so that on the stub side the args will be perfect already. 875 // On the other slow/special case side we call C and the arg 876 // positions are not similar enough to pick one as the best. 877 // Also because the java calling convention is a "shifted" version 878 // of the C convention we can process the java args trivially into C 879 // args without worry of overwriting during the xfer 880 881 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); 882 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); 883 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); 884 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); 885 length.load_item_force (FrameMap::as_opr(j_rarg4)); 886 887 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); 888#endif // LP64 889 890 set_no_result(x); 891 892 int flags; 893 ciArrayKlass* expected_type; 894 arraycopy_helper(x, &flags, &expected_type); 895 896 CodeEmitInfo* info = state_for(x, x->state()); // we may want to have stack (deoptimization?) 897 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint 898} 899 900 901// _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f 902// _i2b, _i2c, _i2s 903LIR_Opr fixed_register_for(BasicType type) { 904 switch (type) { 905 case T_FLOAT: return FrameMap::fpu0_float_opr; 906 case T_DOUBLE: return FrameMap::fpu0_double_opr; 907 case T_INT: return FrameMap::rax_opr; 908 case T_LONG: return FrameMap::long0_opr; 909 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 910 } 911} 912 913void LIRGenerator::do_Convert(Convert* x) { 914 // flags that vary for the different operations and different SSE-settings 915 bool fixed_input, fixed_result, round_result, needs_stub; 916 917 switch (x->op()) { 918 case Bytecodes::_i2l: // fall through 919 case Bytecodes::_l2i: // fall through 920 case Bytecodes::_i2b: // fall through 921 case Bytecodes::_i2c: // fall through 922 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 923 924 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; 925 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; 926 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; 927 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 928 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 929 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 930 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; 931 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; 932 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 933 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 934 default: ShouldNotReachHere(); 935 } 936 937 LIRItem value(x->value(), this); 938 value.load_item(); 939 LIR_Opr input = value.result(); 940 LIR_Opr result = rlock(x); 941 942 // arguments of lir_convert 943 LIR_Opr conv_input = input; 944 LIR_Opr conv_result = result; 945 ConversionStub* stub = NULL; 946 947 if (fixed_input) { 948 conv_input = fixed_register_for(input->type()); 949 __ move(input, conv_input); 950 } 951 952 assert(fixed_result == false || round_result == false, "cannot set both"); 953 if (fixed_result) { 954 conv_result = fixed_register_for(result->type()); 955 } else if (round_result) { 956 result = new_register(result->type()); 957 set_vreg_flag(result, must_start_in_memory); 958 } 959 960 if (needs_stub) { 961 stub = new ConversionStub(x->op(), conv_input, conv_result); 962 } 963 964 __ convert(x->op(), conv_input, conv_result, stub); 965 966 if (result != conv_result) { 967 __ move(conv_result, result); 968 } 969 970 assert(result->is_virtual(), "result must be virtual register"); 971 set_result(x, result); 972} 973 974 975void LIRGenerator::do_NewInstance(NewInstance* x) { 976 if (PrintNotLoaded && !x->klass()->is_loaded()) { 977 tty->print_cr(" ###class not loaded at new bci %d", x->bci()); 978 } 979 CodeEmitInfo* info = state_for(x, x->state()); 980 LIR_Opr reg = result_register_for(x->type()); 981 LIR_Opr klass_reg = new_register(objectType); 982 new_instance(reg, x->klass(), 983 FrameMap::rcx_oop_opr, 984 FrameMap::rdi_oop_opr, 985 FrameMap::rsi_oop_opr, 986 LIR_OprFact::illegalOpr, 987 FrameMap::rdx_oop_opr, info); 988 LIR_Opr result = rlock_result(x); 989 __ move(reg, result); 990} 991 992 993void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { 994 CodeEmitInfo* info = state_for(x, x->state()); 995 996 LIRItem length(x->length(), this); 997 length.load_item_force(FrameMap::rbx_opr); 998 999 LIR_Opr reg = result_register_for(x->type()); 1000 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1001 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1002 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1003 LIR_Opr tmp4 = reg; 1004 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; 1005 LIR_Opr len = length.result(); 1006 BasicType elem_type = x->elt_type(); 1007 1008 __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); 1009 1010 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); 1011 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); 1012 1013 LIR_Opr result = rlock_result(x); 1014 __ move(reg, result); 1015} 1016 1017 1018void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { 1019 LIRItem length(x->length(), this); 1020 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction 1021 // and therefore provide the state before the parameters have been consumed 1022 CodeEmitInfo* patching_info = NULL; 1023 if (!x->klass()->is_loaded() || PatchALot) { 1024 patching_info = state_for(x, x->state_before()); 1025 } 1026 1027 CodeEmitInfo* info = state_for(x, x->state()); 1028 1029 const LIR_Opr reg = result_register_for(x->type()); 1030 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1031 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1032 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1033 LIR_Opr tmp4 = reg; 1034 LIR_Opr klass_reg = FrameMap::rdx_oop_opr; 1035 1036 length.load_item_force(FrameMap::rbx_opr); 1037 LIR_Opr len = length.result(); 1038 1039 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); 1040 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass()); 1041 if (obj == ciEnv::unloaded_ciobjarrayklass()) { 1042 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); 1043 } 1044 jobject2reg_with_patching(klass_reg, obj, patching_info); 1045 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); 1046 1047 LIR_Opr result = rlock_result(x); 1048 __ move(reg, result); 1049} 1050 1051 1052void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { 1053 Values* dims = x->dims(); 1054 int i = dims->length(); 1055 LIRItemList* items = new LIRItemList(dims->length(), NULL); 1056 while (i-- > 0) { 1057 LIRItem* size = new LIRItem(dims->at(i), this); 1058 items->at_put(i, size); 1059 } 1060 1061 // Evaluate state_for early since it may emit code. 1062 CodeEmitInfo* patching_info = NULL; 1063 if (!x->klass()->is_loaded() || PatchALot) { 1064 patching_info = state_for(x, x->state_before()); 1065 1066 // cannot re-use same xhandlers for multiple CodeEmitInfos, so 1067 // clone all handlers. This is handled transparently in other 1068 // places by the CodeEmitInfo cloning logic but is handled 1069 // specially here because a stub isn't being used. 1070 x->set_exception_handlers(new XHandlers(x->exception_handlers())); 1071 } 1072 CodeEmitInfo* info = state_for(x, x->state()); 1073 1074 i = dims->length(); 1075 while (i-- > 0) { 1076 LIRItem* size = items->at(i); 1077 size->load_nonconstant(); 1078 1079 store_stack_parameter(size->result(), in_ByteSize(i*4)); 1080 } 1081 1082 LIR_Opr reg = result_register_for(x->type()); 1083 jobject2reg_with_patching(reg, x->klass(), patching_info); 1084 1085 LIR_Opr rank = FrameMap::rbx_opr; 1086 __ move(LIR_OprFact::intConst(x->rank()), rank); 1087 LIR_Opr varargs = FrameMap::rcx_opr; 1088 __ move(FrameMap::rsp_opr, varargs); 1089 LIR_OprList* args = new LIR_OprList(3); 1090 args->append(reg); 1091 args->append(rank); 1092 args->append(varargs); 1093 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), 1094 LIR_OprFact::illegalOpr, 1095 reg, args, info); 1096 1097 LIR_Opr result = rlock_result(x); 1098 __ move(reg, result); 1099} 1100 1101 1102void LIRGenerator::do_BlockBegin(BlockBegin* x) { 1103 // nothing to do for now 1104} 1105 1106 1107void LIRGenerator::do_CheckCast(CheckCast* x) { 1108 LIRItem obj(x->obj(), this); 1109 1110 CodeEmitInfo* patching_info = NULL; 1111 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { 1112 // must do this before locking the destination register as an oop register, 1113 // and before the obj is loaded (the latter is for deoptimization) 1114 patching_info = state_for(x, x->state_before()); 1115 } 1116 obj.load_item(); 1117 1118 // info for exceptions 1119 CodeEmitInfo* info_for_exception = state_for(x, x->state()->copy_locks()); 1120 1121 CodeStub* stub; 1122 if (x->is_incompatible_class_change_check()) { 1123 assert(patching_info == NULL, "can't patch this"); 1124 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); 1125 } else { 1126 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); 1127 } 1128 LIR_Opr reg = rlock_result(x); 1129 __ checkcast(reg, obj.result(), x->klass(), 1130 new_register(objectType), new_register(objectType), 1131 !x->klass()->is_loaded() ? new_register(objectType) : LIR_OprFact::illegalOpr, 1132 x->direct_compare(), info_for_exception, patching_info, stub, 1133 x->profiled_method(), x->profiled_bci()); 1134} 1135 1136 1137void LIRGenerator::do_InstanceOf(InstanceOf* x) { 1138 LIRItem obj(x->obj(), this); 1139 1140 // result and test object may not be in same register 1141 LIR_Opr reg = rlock_result(x); 1142 CodeEmitInfo* patching_info = NULL; 1143 if ((!x->klass()->is_loaded() || PatchALot)) { 1144 // must do this before locking the destination register as an oop register 1145 patching_info = state_for(x, x->state_before()); 1146 } 1147 obj.load_item(); 1148 LIR_Opr tmp = new_register(objectType); 1149 __ instanceof(reg, obj.result(), x->klass(), 1150 tmp, new_register(objectType), LIR_OprFact::illegalOpr, 1151 x->direct_compare(), patching_info); 1152} 1153 1154 1155void LIRGenerator::do_If(If* x) { 1156 assert(x->number_of_sux() == 2, "inconsistency"); 1157 ValueTag tag = x->x()->type()->tag(); 1158 bool is_safepoint = x->is_safepoint(); 1159 1160 If::Condition cond = x->cond(); 1161 1162 LIRItem xitem(x->x(), this); 1163 LIRItem yitem(x->y(), this); 1164 LIRItem* xin = &xitem; 1165 LIRItem* yin = &yitem; 1166 1167 if (tag == longTag) { 1168 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; 1169 // mirror for other conditions 1170 if (cond == If::gtr || cond == If::leq) { 1171 cond = Instruction::mirror(cond); 1172 xin = &yitem; 1173 yin = &xitem; 1174 } 1175 xin->set_destroys_register(); 1176 } 1177 xin->load_item(); 1178 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { 1179 // inline long zero 1180 yin->dont_load_item(); 1181 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { 1182 // longs cannot handle constants at right side 1183 yin->load_item(); 1184 } else { 1185 yin->dont_load_item(); 1186 } 1187 1188 // add safepoint before generating condition code so it can be recomputed 1189 if (x->is_safepoint()) { 1190 // increment backedge counter if needed 1191 increment_backedge_counter(state_for(x, x->state_before())); 1192 1193 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); 1194 } 1195 set_no_result(x); 1196 1197 LIR_Opr left = xin->result(); 1198 LIR_Opr right = yin->result(); 1199 __ cmp(lir_cond(cond), left, right); 1200 profile_branch(x, cond); 1201 move_to_phi(x->state()); 1202 if (x->x()->type()->is_float_kind()) { 1203 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); 1204 } else { 1205 __ branch(lir_cond(cond), right->type(), x->tsux()); 1206 } 1207 assert(x->default_sux() == x->fsux(), "wrong destination above"); 1208 __ jump(x->default_sux()); 1209} 1210 1211 1212LIR_Opr LIRGenerator::getThreadPointer() { 1213#ifdef _LP64 1214 return FrameMap::as_pointer_opr(r15_thread); 1215#else 1216 LIR_Opr result = new_register(T_INT); 1217 __ get_thread(result); 1218 return result; 1219#endif // 1220} 1221 1222void LIRGenerator::trace_block_entry(BlockBegin* block) { 1223 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); 1224 LIR_OprList* args = new LIR_OprList(); 1225 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); 1226 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); 1227} 1228 1229 1230void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, 1231 CodeEmitInfo* info) { 1232 if (address->type() == T_LONG) { 1233 address = new LIR_Address(address->base(), 1234 address->index(), address->scale(), 1235 address->disp(), T_DOUBLE); 1236 // Transfer the value atomically by using FP moves. This means 1237 // the value has to be moved between CPU and FPU registers. It 1238 // always has to be moved through spill slot since there's no 1239 // quick way to pack the value into an SSE register. 1240 LIR_Opr temp_double = new_register(T_DOUBLE); 1241 LIR_Opr spill = new_register(T_LONG); 1242 set_vreg_flag(spill, must_start_in_memory); 1243 __ move(value, spill); 1244 __ volatile_move(spill, temp_double, T_LONG); 1245 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); 1246 } else { 1247 __ store(value, address, info); 1248 } 1249} 1250 1251 1252 1253void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, 1254 CodeEmitInfo* info) { 1255 if (address->type() == T_LONG) { 1256 address = new LIR_Address(address->base(), 1257 address->index(), address->scale(), 1258 address->disp(), T_DOUBLE); 1259 // Transfer the value atomically by using FP moves. This means 1260 // the value has to be moved between CPU and FPU registers. In 1261 // SSE0 and SSE1 mode it has to be moved through spill slot but in 1262 // SSE2+ mode it can be moved directly. 1263 LIR_Opr temp_double = new_register(T_DOUBLE); 1264 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); 1265 __ volatile_move(temp_double, result, T_LONG); 1266 if (UseSSE < 2) { 1267 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible 1268 set_vreg_flag(result, must_start_in_memory); 1269 } 1270 } else { 1271 __ load(address, result, info); 1272 } 1273} 1274 1275void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, 1276 BasicType type, bool is_volatile) { 1277 if (is_volatile && type == T_LONG) { 1278 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); 1279 LIR_Opr tmp = new_register(T_DOUBLE); 1280 __ load(addr, tmp); 1281 LIR_Opr spill = new_register(T_LONG); 1282 set_vreg_flag(spill, must_start_in_memory); 1283 __ move(tmp, spill); 1284 __ move(spill, dst); 1285 } else { 1286 LIR_Address* addr = new LIR_Address(src, offset, type); 1287 __ load(addr, dst); 1288 } 1289} 1290 1291 1292void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, 1293 BasicType type, bool is_volatile) { 1294 if (is_volatile && type == T_LONG) { 1295 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); 1296 LIR_Opr tmp = new_register(T_DOUBLE); 1297 LIR_Opr spill = new_register(T_DOUBLE); 1298 set_vreg_flag(spill, must_start_in_memory); 1299 __ move(data, spill); 1300 __ move(spill, tmp); 1301 __ move(tmp, addr); 1302 } else { 1303 LIR_Address* addr = new LIR_Address(src, offset, type); 1304 bool is_obj = (type == T_ARRAY || type == T_OBJECT); 1305 if (is_obj) { 1306 // Do the pre-write barrier, if any. 1307 pre_barrier(LIR_OprFact::address(addr), false, NULL); 1308 __ move(data, addr); 1309 assert(src->is_register(), "must be register"); 1310 // Seems to be a precise address 1311 post_barrier(LIR_OprFact::address(addr), data); 1312 } else { 1313 __ move(data, addr); 1314 } 1315 } 1316} 1317