c1_FrameMap_x86.hpp revision 337:9ee9cf798b59
1107120Sjulian/*
2107120Sjulian * Copyright 1999-2008 Sun Microsystems, Inc.  All Rights Reserved.
3139823Simp * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4139823Simp *
5139823Simp * This code is free software; you can redistribute it and/or modify it
6107120Sjulian * under the terms of the GNU General Public License version 2 only, as
7107120Sjulian * published by the Free Software Foundation.
8107120Sjulian *
9107120Sjulian * This code is distributed in the hope that it will be useful, but WITHOUT
10107120Sjulian * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11107120Sjulian * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12107120Sjulian * version 2 for more details (a copy is included in the LICENSE file that
13107120Sjulian * accompanied this code).
14107120Sjulian *
15107120Sjulian * You should have received a copy of the GNU General Public License version
16107120Sjulian * 2 along with this work; if not, write to the Free Software Foundation,
17107120Sjulian * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18107120Sjulian *
19107120Sjulian * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20107120Sjulian * CA 95054 USA or visit www.sun.com if you need additional information or
21107120Sjulian * have any questions.
22107120Sjulian *
23107120Sjulian */
24107120Sjulian
25107120Sjulian//  On i486 the frame looks as follows:
26107120Sjulian//
27107120Sjulian//  +-----------------------------+---------+----------------------------------------+----------------+-----------
28107120Sjulian//  | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling .
29107120Sjulian//  +-----------------------------+---------+----------------------------------------+----------------+-----------
30114878Sjulian//
31107120Sjulian//  The FPU registers are mapped with their offset from TOS; therefore the
32107120Sjulian//  status of FPU stack must be updated during code emission.
33107120Sjulian
34107120Sjulian public:
35122634Semax  static const int pd_c_runtime_reserved_arg_size;
36107120Sjulian
37107120Sjulian  enum {
38107120Sjulian    nof_xmm_regs = pd_nof_xmm_regs_frame_map,
39107120Sjulian    nof_caller_save_xmm_regs = pd_nof_caller_save_xmm_regs_frame_map,
40107120Sjulian    first_available_sp_in_frame = 0,
41107120Sjulian#ifndef _LP64
42107120Sjulian    frame_pad_in_bytes = 8,
43107120Sjulian    nof_reg_args = 2
44107120Sjulian#else
45107120Sjulian    frame_pad_in_bytes = 16,
46107120Sjulian    nof_reg_args = 6
47107120Sjulian#endif // _LP64
48107120Sjulian  };
49107120Sjulian
50107120Sjulian private:
51107120Sjulian  static LIR_Opr      _caller_save_xmm_regs [nof_caller_save_xmm_regs];
52107120Sjulian
53107120Sjulian  static XMMRegister _xmm_regs[nof_xmm_regs];
54107120Sjulian
55107120Sjulian public:
56128076Semax  static LIR_Opr receiver_opr;
57107120Sjulian
58107120Sjulian  static LIR_Opr rsi_opr;
59107120Sjulian  static LIR_Opr rdi_opr;
60107120Sjulian  static LIR_Opr rbx_opr;
61107120Sjulian  static LIR_Opr rax_opr;
62107120Sjulian  static LIR_Opr rdx_opr;
63107120Sjulian  static LIR_Opr rcx_opr;
64107120Sjulian  static LIR_Opr rsp_opr;
65107120Sjulian  static LIR_Opr rbp_opr;
66107120Sjulian
67107120Sjulian  static LIR_Opr rsi_oop_opr;
68107120Sjulian  static LIR_Opr rdi_oop_opr;
69107120Sjulian  static LIR_Opr rbx_oop_opr;
70107120Sjulian  static LIR_Opr rax_oop_opr;
71107120Sjulian  static LIR_Opr rdx_oop_opr;
72107120Sjulian  static LIR_Opr rcx_oop_opr;
73107120Sjulian#ifdef _LP64
74107120Sjulian
75107120Sjulian  static LIR_Opr  r8_opr;
76107120Sjulian  static LIR_Opr  r9_opr;
77107120Sjulian  static LIR_Opr r10_opr;
78107120Sjulian  static LIR_Opr r11_opr;
79107120Sjulian  static LIR_Opr r12_opr;
80107120Sjulian  static LIR_Opr r13_opr;
81107120Sjulian  static LIR_Opr r14_opr;
82107120Sjulian  static LIR_Opr r15_opr;
83107120Sjulian
84107120Sjulian  static LIR_Opr  r8_oop_opr;
85107120Sjulian  static LIR_Opr  r9_oop_opr;
86107120Sjulian
87107120Sjulian  static LIR_Opr r11_oop_opr;
88107120Sjulian  static LIR_Opr r12_oop_opr;
89107120Sjulian  static LIR_Opr r13_oop_opr;
90107120Sjulian  static LIR_Opr r14_oop_opr;
91107120Sjulian
92107120Sjulian#endif // _LP64
93107120Sjulian
94107120Sjulian  static LIR_Opr long0_opr;
95107120Sjulian  static LIR_Opr long1_opr;
96107120Sjulian  static LIR_Opr fpu0_float_opr;
97107120Sjulian  static LIR_Opr fpu0_double_opr;
98107120Sjulian  static LIR_Opr xmm0_float_opr;
99107120Sjulian  static LIR_Opr xmm0_double_opr;
100107120Sjulian
101107120Sjulian#ifdef _LP64
102107120Sjulian  static LIR_Opr as_long_opr(Register r) {
103107120Sjulian    return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
104107120Sjulian  }
105107120Sjulian  static LIR_Opr as_pointer_opr(Register r) {
106107120Sjulian    return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
107107120Sjulian  }
108107120Sjulian#else
109107120Sjulian  static LIR_Opr as_long_opr(Register r, Register r2) {
110107120Sjulian    return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2));
111107120Sjulian  }
112107120Sjulian  static LIR_Opr as_pointer_opr(Register r) {
113107120Sjulian    return LIR_OprFact::single_cpu(cpu_reg2rnr(r));
114107120Sjulian  }
115107120Sjulian#endif // _LP64
116107120Sjulian
117107120Sjulian  // VMReg name for spilled physical FPU stack slot n
118107120Sjulian  static VMReg fpu_regname (int n);
119107120Sjulian
120107120Sjulian  static XMMRegister nr2xmmreg(int rnr);
121107120Sjulian
122107120Sjulian  static bool is_caller_save_register (LIR_Opr opr) { return true; }
123107120Sjulian  static bool is_caller_save_register (Register r) { return true; }
124107120Sjulian
125107120Sjulian  static LIR_Opr caller_save_xmm_reg_at(int i) {
126107120Sjulian    assert(i >= 0 && i < nof_caller_save_xmm_regs, "out of bounds");
127107120Sjulian    return _caller_save_xmm_regs[i];
128107120Sjulian  }
129107120Sjulian