relocInfo_sparc.cpp revision 304:dc7f315e41f7 
1/*
2 * Copyright 1998-2008 Sun Microsystems, Inc.  All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25# include "incls/_precompiled.incl"
26# include "incls/_relocInfo_sparc.cpp.incl"
27
28void Relocation::pd_set_data_value(address x, intptr_t o) {
29  NativeInstruction* ip = nativeInstruction_at(addr());
30  jint inst = ip->long_at(0);
31  assert(inst != NativeInstruction::illegal_instruction(), "no breakpoint");
32  switch (Assembler::inv_op(inst)) {
33
34  case Assembler::ldst_op:
35    #ifdef ASSERT
36      switch (Assembler::inv_op3(inst)) {
37        case Assembler::lduw_op3:
38        case Assembler::ldub_op3:
39        case Assembler::lduh_op3:
40        case Assembler::ldd_op3:
41        case Assembler::ldsw_op3:
42        case Assembler::ldsb_op3:
43        case Assembler::ldsh_op3:
44        case Assembler::ldx_op3:
45        case Assembler::ldf_op3:
46        case Assembler::lddf_op3:
47        case Assembler::stw_op3:
48        case Assembler::stb_op3:
49        case Assembler::sth_op3:
50        case Assembler::std_op3:
51        case Assembler::stx_op3:
52        case Assembler::stf_op3:
53        case Assembler::stdf_op3:
54        case Assembler::casa_op3:
55        case Assembler::casxa_op3:
56          break;
57        default:
58          ShouldNotReachHere();
59      }
60      goto do_non_sethi;
61    #endif
62
63  case Assembler::arith_op:
64    #ifdef ASSERT
65      switch (Assembler::inv_op3(inst)) {
66        case Assembler::or_op3:
67        case Assembler::add_op3:
68        case Assembler::jmpl_op3:
69          break;
70        default:
71          ShouldNotReachHere();
72      }
73    do_non_sethi:;
74    #endif
75    {
76    guarantee(Assembler::inv_immed(inst), "must have a simm13 field");
77    int simm13 = Assembler::low10((intptr_t)x) + o;
78    guarantee(Assembler::is_simm13(simm13), "offset can't overflow simm13");
79    inst &= ~Assembler::simm(    -1, 13);
80    inst |=  Assembler::simm(simm13, 13);
81    ip->set_long_at(0, inst);
82    }
83    break;
84
85  case Assembler::branch_op:
86    {
87#ifdef _LP64
88    jint inst2;
89    guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi");
90    if (format() != 0) {
91      assert(type() == relocInfo::oop_type, "only narrow oops case");
92      jint np = oopDesc::encode_heap_oop((oop)x);
93      inst &= ~Assembler::hi22(-1);
94      inst |=  Assembler::hi22((intptr_t)np);
95      ip->set_long_at(0, inst);
96      inst2 = ip->long_at( NativeInstruction::nop_instruction_size );
97      guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
98      ip->set_long_at(NativeInstruction::nop_instruction_size, ip->set_data32_simm13( inst2, (intptr_t)np));
99      break;
100    }
101    ip->set_data64_sethi( ip->addr_at(0), (intptr_t)x );
102#ifdef COMPILER2
103    // [RGV] Someone must have missed putting in a reloc entry for the
104    // add in compiler2.
105    inst2 = ip->long_at( NativeMovConstReg::add_offset );
106    guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
107    ip->set_long_at(NativeMovConstReg::add_offset,ip->set_data32_simm13( inst2, (intptr_t)x+o));
108#endif
109#else
110    guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi");
111    inst &= ~Assembler::hi22(     -1);
112    inst |=  Assembler::hi22((intptr_t)x);
113    // (ignore offset; it doesn't play into the sethi)
114    ip->set_long_at(0, inst);
115#endif
116    }
117    break;
118
119  default:
120    guarantee(false, "instruction must perform arithmetic or memory access");
121  }
122}
123
124
125address Relocation::pd_call_destination(address orig_addr) {
126  intptr_t adj = 0;
127  if (orig_addr != NULL) {
128    // We just moved this call instruction from orig_addr to addr().
129    // This means its target will appear to have grown by addr() - orig_addr.
130    adj = -( addr() - orig_addr );
131  }
132  if (NativeCall::is_call_at(addr())) {
133    NativeCall* call = nativeCall_at(addr());
134    return call->destination() + adj;
135  }
136  if (NativeFarCall::is_call_at(addr())) {
137    NativeFarCall* call = nativeFarCall_at(addr());
138    return call->destination() + adj;
139  }
140  // Special case:  Patchable branch local to the code cache.
141  // This will break badly if the code cache grows larger than a few Mb.
142  NativeGeneralJump* br = nativeGeneralJump_at(addr());
143  return br->jump_destination() + adj;
144}
145
146
147void Relocation::pd_set_call_destination(address x) {
148  if (NativeCall::is_call_at(addr())) {
149    NativeCall* call = nativeCall_at(addr());
150    call->set_destination(x);
151    return;
152  }
153  if (NativeFarCall::is_call_at(addr())) {
154    NativeFarCall* call = nativeFarCall_at(addr());
155    call->set_destination(x);
156    return;
157  }
158  // Special case:  Patchable branch local to the code cache.
159  // This will break badly if the code cache grows larger than a few Mb.
160  NativeGeneralJump* br = nativeGeneralJump_at(addr());
161  br->set_jump_destination(x);
162}
163
164
165address* Relocation::pd_address_in_code() {
166  // SPARC never embeds addresses in code, at present.
167  //assert(type() == relocInfo::oop_type, "only oops are inlined at present");
168  return (address*)addr();
169}
170
171
172address Relocation::pd_get_address_from_code() {
173  // SPARC never embeds addresses in code, at present.
174  //assert(type() == relocInfo::oop_type, "only oops are inlined at present");
175  return *(address*)addr();
176}
177
178
179int Relocation::pd_breakpoint_size() {
180  // minimum breakpoint size, in short words
181  return NativeIllegalInstruction::instruction_size / sizeof(short);
182}
183
184void Relocation::pd_swap_in_breakpoint(address x, short* instrs, int instrlen) {
185  Untested("pd_swap_in_breakpoint");
186  // %%% probably do not need a general instrlen; just use the trap size
187  if (instrs != NULL) {
188    assert(instrlen * sizeof(short) == NativeIllegalInstruction::instruction_size, "enough instrlen in reloc. data");
189    for (int i = 0; i < instrlen; i++) {
190      instrs[i] = ((short*)x)[i];
191    }
192  }
193  NativeIllegalInstruction::insert(x);
194}
195
196
197void Relocation::pd_swap_out_breakpoint(address x, short* instrs, int instrlen) {
198  Untested("pd_swap_out_breakpoint");
199  assert(instrlen * sizeof(short) == sizeof(int), "enough buf");
200  union { int l; short s[1]; } u;
201  for (int i = 0; i < instrlen; i++) {
202    u.s[i] = instrs[i];
203  }
204  NativeInstruction* ni = nativeInstruction_at(x);
205  ni->set_long_at(0, u.l);
206}
207
208void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
209}
210
211void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
212}
213