interp_masm_sparc.cpp revision 0:a61af66fc99e
1/* 2 * Copyright 1997-2007 Sun Microsystems, Inc. All Rights Reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 20 * CA 95054 USA or visit www.sun.com if you need additional information or 21 * have any questions. 22 * 23 */ 24 25#include "incls/_precompiled.incl" 26#include "incls/_interp_masm_sparc.cpp.incl" 27 28#ifndef CC_INTERP 29#ifndef FAST_DISPATCH 30#define FAST_DISPATCH 1 31#endif 32#undef FAST_DISPATCH 33 34// Implementation of InterpreterMacroAssembler 35 36// This file specializes the assember with interpreter-specific macros 37 38const Address InterpreterMacroAssembler::l_tmp( FP, 0, (frame::interpreter_frame_l_scratch_fp_offset * wordSize ) + STACK_BIAS); 39const Address InterpreterMacroAssembler::d_tmp( FP, 0, (frame::interpreter_frame_d_scratch_fp_offset * wordSize) + STACK_BIAS); 40 41#else // CC_INTERP 42#ifndef STATE 43#define STATE(field_name) Lstate, in_bytes(byte_offset_of(BytecodeInterpreter, field_name)) 44#endif // STATE 45 46#endif // CC_INTERP 47 48void InterpreterMacroAssembler::compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta) { 49 // Note: this algorithm is also used by C1's OSR entry sequence. 50 // Any changes should also be applied to CodeEmitter::emit_osr_entry(). 51 assert_different_registers(args_size, locals_size); 52 // max_locals*2 for TAGS. Assumes that args_size has already been adjusted. 53 if (TaggedStackInterpreter) sll(locals_size, 1, locals_size); 54 subcc(locals_size, args_size, delta);// extra space for non-arguments locals in words 55 // Use br/mov combination because it works on both V8 and V9 and is 56 // faster. 57 Label skip_move; 58 br(Assembler::negative, true, Assembler::pt, skip_move); 59 delayed()->mov(G0, delta); 60 bind(skip_move); 61 round_to(delta, WordsPerLong); // make multiple of 2 (SP must be 2-word aligned) 62 sll(delta, LogBytesPerWord, delta); // extra space for locals in bytes 63} 64 65#ifndef CC_INTERP 66 67// Dispatch code executed in the prolog of a bytecode which does not do it's 68// own dispatch. The dispatch address is computed and placed in IdispatchAddress 69void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) { 70 assert_not_delayed(); 71#ifdef FAST_DISPATCH 72 // FAST_DISPATCH and ProfileInterpreter are mutually exclusive since 73 // they both use I2. 74 assert(!ProfileInterpreter, "FAST_DISPATCH and +ProfileInterpreter are mutually exclusive"); 75 ldub(Lbcp, bcp_incr, Lbyte_code); // load next bytecode 76 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code); 77 // add offset to correct dispatch table 78 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize 79 ld_ptr(IdispatchTables, Lbyte_code, IdispatchAddress);// get entry addr 80#else 81 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode 82 // dispatch table to use 83 Address tbl(G3_scratch, (address)Interpreter::dispatch_table(state)); 84 85 sethi(tbl); 86 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize 87 add(tbl, tbl.base(), 0); 88 ld_ptr( G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr 89#endif 90} 91 92 93// Dispatch code executed in the epilog of a bytecode which does not do it's 94// own dispatch. The dispatch address in IdispatchAddress is used for the 95// dispatch. 96void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) { 97 assert_not_delayed(); 98 verify_FPU(1, state); 99 interp_verify_oop(Otos_i, state, __FILE__, __LINE__); 100 jmp( IdispatchAddress, 0 ); 101 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr); 102 else delayed()->nop(); 103} 104 105 106void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) { 107 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr) 108 assert_not_delayed(); 109 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode 110 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr); 111} 112 113 114void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) { 115 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr) 116 assert_not_delayed(); 117 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode 118 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false); 119} 120 121 122void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) { 123 // load current bytecode 124 assert_not_delayed(); 125 ldub( Lbcp, 0, Lbyte_code); // load next bytecode 126 dispatch_base(state, table); 127} 128 129 130void InterpreterMacroAssembler::call_VM_leaf_base( 131 Register java_thread, 132 address entry_point, 133 int number_of_arguments 134) { 135 if (!java_thread->is_valid()) 136 java_thread = L7_thread_cache; 137 // super call 138 MacroAssembler::call_VM_leaf_base(java_thread, entry_point, number_of_arguments); 139} 140 141 142void InterpreterMacroAssembler::call_VM_base( 143 Register oop_result, 144 Register java_thread, 145 Register last_java_sp, 146 address entry_point, 147 int number_of_arguments, 148 bool check_exception 149) { 150 if (!java_thread->is_valid()) 151 java_thread = L7_thread_cache; 152 // See class ThreadInVMfromInterpreter, which assumes that the interpreter 153 // takes responsibility for setting its own thread-state on call-out. 154 // However, ThreadInVMfromInterpreter resets the state to "in_Java". 155 156 //save_bcp(); // save bcp 157 MacroAssembler::call_VM_base(oop_result, java_thread, last_java_sp, entry_point, number_of_arguments, check_exception); 158 //restore_bcp(); // restore bcp 159 //restore_locals(); // restore locals pointer 160} 161 162 163void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg) { 164 if (JvmtiExport::can_pop_frame()) { 165 Label L; 166 167 // Check the "pending popframe condition" flag in the current thread 168 Address popframe_condition_addr(G2_thread, 0, in_bytes(JavaThread::popframe_condition_offset())); 169 ld(popframe_condition_addr, scratch_reg); 170 171 // Initiate popframe handling only if it is not already being processed. If the flag 172 // has the popframe_processing bit set, it means that this code is called *during* popframe 173 // handling - we don't want to reenter. 174 btst(JavaThread::popframe_pending_bit, scratch_reg); 175 br(zero, false, pt, L); 176 delayed()->nop(); 177 btst(JavaThread::popframe_processing_bit, scratch_reg); 178 br(notZero, false, pt, L); 179 delayed()->nop(); 180 181 // Call Interpreter::remove_activation_preserving_args_entry() to get the 182 // address of the same-named entrypoint in the generated interpreter code. 183 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry)); 184 185 // Jump to Interpreter::_remove_activation_preserving_args_entry 186 jmpl(O0, G0, G0); 187 delayed()->nop(); 188 bind(L); 189 } 190} 191 192 193void InterpreterMacroAssembler::load_earlyret_value(TosState state) { 194 Register thr_state = G4_scratch; 195 ld_ptr(Address(G2_thread, 0, in_bytes(JavaThread::jvmti_thread_state_offset())), 196 thr_state); 197 const Address tos_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_tos_offset())); 198 const Address oop_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_oop_offset())); 199 const Address val_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_value_offset())); 200 switch (state) { 201 case ltos: ld_long(val_addr, Otos_l); break; 202 case atos: ld_ptr(oop_addr, Otos_l); 203 st_ptr(G0, oop_addr); break; 204 case btos: // fall through 205 case ctos: // fall through 206 case stos: // fall through 207 case itos: ld(val_addr, Otos_l1); break; 208 case ftos: ldf(FloatRegisterImpl::S, val_addr, Ftos_f); break; 209 case dtos: ldf(FloatRegisterImpl::D, val_addr, Ftos_d); break; 210 case vtos: /* nothing to do */ break; 211 default : ShouldNotReachHere(); 212 } 213 // Clean up tos value in the jvmti thread state 214 or3(G0, ilgl, G3_scratch); 215 stw(G3_scratch, tos_addr); 216 st_long(G0, val_addr); 217 interp_verify_oop(Otos_i, state, __FILE__, __LINE__); 218} 219 220 221void InterpreterMacroAssembler::check_and_handle_earlyret(Register scratch_reg) { 222 if (JvmtiExport::can_force_early_return()) { 223 Label L; 224 Register thr_state = G3_scratch; 225 ld_ptr(Address(G2_thread, 0, in_bytes(JavaThread::jvmti_thread_state_offset())), 226 thr_state); 227 tst(thr_state); 228 br(zero, false, pt, L); // if (thread->jvmti_thread_state() == NULL) exit; 229 delayed()->nop(); 230 231 // Initiate earlyret handling only if it is not already being processed. 232 // If the flag has the earlyret_processing bit set, it means that this code 233 // is called *during* earlyret handling - we don't want to reenter. 234 ld(Address(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_state_offset())), 235 G4_scratch); 236 cmp(G4_scratch, JvmtiThreadState::earlyret_pending); 237 br(Assembler::notEqual, false, pt, L); 238 delayed()->nop(); 239 240 // Call Interpreter::remove_activation_early_entry() to get the address of the 241 // same-named entrypoint in the generated interpreter code 242 Address tos_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_tos_offset())); 243 ld(tos_addr, Otos_l1); 244 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry), Otos_l1); 245 246 // Jump to Interpreter::_remove_activation_early_entry 247 jmpl(O0, G0, G0); 248 delayed()->nop(); 249 bind(L); 250 } 251} 252 253 254void InterpreterMacroAssembler::super_call_VM_leaf(Register thread_cache, address entry_point, Register arg_1) { 255 mov(arg_1, O0); 256 MacroAssembler::call_VM_leaf_base(thread_cache, entry_point, 1); 257} 258#endif /* CC_INTERP */ 259 260 261#ifndef CC_INTERP 262 263void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) { 264 assert_not_delayed(); 265 dispatch_Lbyte_code(state, table); 266} 267 268 269void InterpreterMacroAssembler::dispatch_normal(TosState state) { 270 dispatch_base(state, Interpreter::normal_table(state)); 271} 272 273 274void InterpreterMacroAssembler::dispatch_only(TosState state) { 275 dispatch_base(state, Interpreter::dispatch_table(state)); 276} 277 278 279// common code to dispatch and dispatch_only 280// dispatch value in Lbyte_code and increment Lbcp 281 282void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify) { 283 verify_FPU(1, state); 284 // %%%%% maybe implement +VerifyActivationFrameSize here 285 //verify_thread(); //too slow; we will just verify on method entry & exit 286 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__); 287#ifdef FAST_DISPATCH 288 if (table == Interpreter::dispatch_table(state)) { 289 // use IdispatchTables 290 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code); 291 // add offset to correct dispatch table 292 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize 293 ld_ptr(IdispatchTables, Lbyte_code, G3_scratch); // get entry addr 294 } else { 295#endif 296 // dispatch table to use 297 Address tbl(G3_scratch, (address)table); 298 299 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize 300 load_address(tbl); // compute addr of table 301 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr 302#ifdef FAST_DISPATCH 303 } 304#endif 305 jmp( G3_scratch, 0 ); 306 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr); 307 else delayed()->nop(); 308} 309 310 311// Helpers for expression stack 312 313// Longs and doubles are Category 2 computational types in the 314// JVM specification (section 3.11.1) and take 2 expression stack or 315// local slots. 316// Aligning them on 32 bit with tagged stacks is hard because the code generated 317// for the dup* bytecodes depends on what types are already on the stack. 318// If the types are split into the two stack/local slots, that is much easier 319// (and we can use 0 for non-reference tags). 320 321// Known good alignment in _LP64 but unknown otherwise 322void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) { 323 assert_not_delayed(); 324 325#ifdef _LP64 326 ldf(FloatRegisterImpl::D, r1, offset, d); 327#else 328 ldf(FloatRegisterImpl::S, r1, offset, d); 329 ldf(FloatRegisterImpl::S, r1, offset + Interpreter::stackElementSize(), d->successor()); 330#endif 331} 332 333// Known good alignment in _LP64 but unknown otherwise 334void InterpreterMacroAssembler::store_unaligned_double(FloatRegister d, Register r1, int offset) { 335 assert_not_delayed(); 336 337#ifdef _LP64 338 stf(FloatRegisterImpl::D, d, r1, offset); 339 // store something more useful here 340 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize());) 341#else 342 stf(FloatRegisterImpl::S, d, r1, offset); 343 stf(FloatRegisterImpl::S, d->successor(), r1, offset + Interpreter::stackElementSize()); 344#endif 345} 346 347 348// Known good alignment in _LP64 but unknown otherwise 349void InterpreterMacroAssembler::load_unaligned_long(Register r1, int offset, Register rd) { 350 assert_not_delayed(); 351#ifdef _LP64 352 ldx(r1, offset, rd); 353#else 354 ld(r1, offset, rd); 355 ld(r1, offset + Interpreter::stackElementSize(), rd->successor()); 356#endif 357} 358 359// Known good alignment in _LP64 but unknown otherwise 360void InterpreterMacroAssembler::store_unaligned_long(Register l, Register r1, int offset) { 361 assert_not_delayed(); 362 363#ifdef _LP64 364 stx(l, r1, offset); 365 // store something more useful here 366 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize());) 367#else 368 st(l, r1, offset); 369 st(l->successor(), r1, offset + Interpreter::stackElementSize()); 370#endif 371} 372 373#ifdef ASSERT 374void InterpreterMacroAssembler::verify_stack_tag(frame::Tag t, 375 Register r, 376 Register scratch) { 377 if (TaggedStackInterpreter) { 378 Label ok, long_ok; 379 ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(0), r); 380 if (t == frame::TagCategory2) { 381 cmp(r, G0); 382 brx(Assembler::equal, false, Assembler::pt, long_ok); 383 delayed()->ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(1), r); 384 stop("stack long/double tag value bad"); 385 bind(long_ok); 386 cmp(r, G0); 387 } else if (t == frame::TagValue) { 388 cmp(r, G0); 389 } else { 390 assert_different_registers(r, scratch); 391 mov(t, scratch); 392 cmp(r, scratch); 393 } 394 brx(Assembler::equal, false, Assembler::pt, ok); 395 delayed()->nop(); 396 // Also compare if the stack value is zero, then the tag might 397 // not have been set coming from deopt. 398 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r); 399 cmp(r, G0); 400 brx(Assembler::equal, false, Assembler::pt, ok); 401 delayed()->nop(); 402 stop("Stack tag value is bad"); 403 bind(ok); 404 } 405} 406#endif // ASSERT 407 408void InterpreterMacroAssembler::pop_i(Register r) { 409 assert_not_delayed(); 410 // Uses destination register r for scratch 411 debug_only(verify_stack_tag(frame::TagValue, r)); 412 ld(Lesp, Interpreter::expr_offset_in_bytes(0), r); 413 inc(Lesp, Interpreter::stackElementSize()); 414 debug_only(verify_esp(Lesp)); 415} 416 417void InterpreterMacroAssembler::pop_ptr(Register r, Register scratch) { 418 assert_not_delayed(); 419 // Uses destination register r for scratch 420 debug_only(verify_stack_tag(frame::TagReference, r, scratch)); 421 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r); 422 inc(Lesp, Interpreter::stackElementSize()); 423 debug_only(verify_esp(Lesp)); 424} 425 426void InterpreterMacroAssembler::pop_l(Register r) { 427 assert_not_delayed(); 428 // Uses destination register r for scratch 429 debug_only(verify_stack_tag(frame::TagCategory2, r)); 430 load_unaligned_long(Lesp, Interpreter::expr_offset_in_bytes(0), r); 431 inc(Lesp, 2*Interpreter::stackElementSize()); 432 debug_only(verify_esp(Lesp)); 433} 434 435 436void InterpreterMacroAssembler::pop_f(FloatRegister f, Register scratch) { 437 assert_not_delayed(); 438 debug_only(verify_stack_tag(frame::TagValue, scratch)); 439 ldf(FloatRegisterImpl::S, Lesp, Interpreter::expr_offset_in_bytes(0), f); 440 inc(Lesp, Interpreter::stackElementSize()); 441 debug_only(verify_esp(Lesp)); 442} 443 444 445void InterpreterMacroAssembler::pop_d(FloatRegister f, Register scratch) { 446 assert_not_delayed(); 447 debug_only(verify_stack_tag(frame::TagCategory2, scratch)); 448 load_unaligned_double(Lesp, Interpreter::expr_offset_in_bytes(0), f); 449 inc(Lesp, 2*Interpreter::stackElementSize()); 450 debug_only(verify_esp(Lesp)); 451} 452 453 454// (Note use register first, then decrement so dec can be done during store stall) 455void InterpreterMacroAssembler::tag_stack(Register r) { 456 if (TaggedStackInterpreter) { 457 st_ptr(r, Lesp, Interpreter::tag_offset_in_bytes()); 458 } 459} 460 461void InterpreterMacroAssembler::tag_stack(frame::Tag t, Register r) { 462 if (TaggedStackInterpreter) { 463 assert (frame::TagValue == 0, "TagValue must be zero"); 464 if (t == frame::TagValue) { 465 st_ptr(G0, Lesp, Interpreter::tag_offset_in_bytes()); 466 } else if (t == frame::TagCategory2) { 467 st_ptr(G0, Lesp, Interpreter::tag_offset_in_bytes()); 468 // Tag next slot down too 469 st_ptr(G0, Lesp, -Interpreter::stackElementSize() + Interpreter::tag_offset_in_bytes()); 470 } else { 471 assert_different_registers(r, O3); 472 mov(t, O3); 473 st_ptr(O3, Lesp, Interpreter::tag_offset_in_bytes()); 474 } 475 } 476} 477 478void InterpreterMacroAssembler::push_i(Register r) { 479 assert_not_delayed(); 480 debug_only(verify_esp(Lesp)); 481 tag_stack(frame::TagValue, r); 482 st( r, Lesp, Interpreter::value_offset_in_bytes()); 483 dec( Lesp, Interpreter::stackElementSize()); 484} 485 486void InterpreterMacroAssembler::push_ptr(Register r) { 487 assert_not_delayed(); 488 tag_stack(frame::TagReference, r); 489 st_ptr( r, Lesp, Interpreter::value_offset_in_bytes()); 490 dec( Lesp, Interpreter::stackElementSize()); 491} 492 493void InterpreterMacroAssembler::push_ptr(Register r, Register tag) { 494 assert_not_delayed(); 495 tag_stack(tag); 496 st_ptr(r, Lesp, Interpreter::value_offset_in_bytes()); 497 dec( Lesp, Interpreter::stackElementSize()); 498} 499 500// remember: our convention for longs in SPARC is: 501// O0 (Otos_l1) has high-order part in first word, 502// O1 (Otos_l2) has low-order part in second word 503 504void InterpreterMacroAssembler::push_l(Register r) { 505 assert_not_delayed(); 506 debug_only(verify_esp(Lesp)); 507 tag_stack(frame::TagCategory2, r); 508 // Longs are in stored in memory-correct order, even if unaligned. 509 // and may be separated by stack tags. 510 int offset = -Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes(); 511 store_unaligned_long(r, Lesp, offset); 512 dec(Lesp, 2 * Interpreter::stackElementSize()); 513} 514 515 516void InterpreterMacroAssembler::push_f(FloatRegister f) { 517 assert_not_delayed(); 518 debug_only(verify_esp(Lesp)); 519 tag_stack(frame::TagValue, Otos_i); 520 stf(FloatRegisterImpl::S, f, Lesp, Interpreter::value_offset_in_bytes()); 521 dec(Lesp, Interpreter::stackElementSize()); 522} 523 524 525void InterpreterMacroAssembler::push_d(FloatRegister d) { 526 assert_not_delayed(); 527 debug_only(verify_esp(Lesp)); 528 tag_stack(frame::TagCategory2, Otos_i); 529 // Longs are in stored in memory-correct order, even if unaligned. 530 // and may be separated by stack tags. 531 int offset = -Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes(); 532 store_unaligned_double(d, Lesp, offset); 533 dec(Lesp, 2 * Interpreter::stackElementSize()); 534} 535 536 537void InterpreterMacroAssembler::push(TosState state) { 538 interp_verify_oop(Otos_i, state, __FILE__, __LINE__); 539 switch (state) { 540 case atos: push_ptr(); break; 541 case btos: push_i(); break; 542 case ctos: 543 case stos: push_i(); break; 544 case itos: push_i(); break; 545 case ltos: push_l(); break; 546 case ftos: push_f(); break; 547 case dtos: push_d(); break; 548 case vtos: /* nothing to do */ break; 549 default : ShouldNotReachHere(); 550 } 551} 552 553 554void InterpreterMacroAssembler::pop(TosState state) { 555 switch (state) { 556 case atos: pop_ptr(); break; 557 case btos: pop_i(); break; 558 case ctos: 559 case stos: pop_i(); break; 560 case itos: pop_i(); break; 561 case ltos: pop_l(); break; 562 case ftos: pop_f(); break; 563 case dtos: pop_d(); break; 564 case vtos: /* nothing to do */ break; 565 default : ShouldNotReachHere(); 566 } 567 interp_verify_oop(Otos_i, state, __FILE__, __LINE__); 568} 569 570 571// Tagged stack helpers for swap and dup 572void InterpreterMacroAssembler::load_ptr_and_tag(int n, Register val, 573 Register tag) { 574 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(n), val); 575 if (TaggedStackInterpreter) { 576 ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(n), tag); 577 } 578} 579void InterpreterMacroAssembler::store_ptr_and_tag(int n, Register val, 580 Register tag) { 581 st_ptr(val, Lesp, Interpreter::expr_offset_in_bytes(n)); 582 if (TaggedStackInterpreter) { 583 st_ptr(tag, Lesp, Interpreter::expr_tag_offset_in_bytes(n)); 584 } 585} 586 587 588void InterpreterMacroAssembler::load_receiver(Register param_count, 589 Register recv) { 590 591 sll(param_count, Interpreter::logStackElementSize(), param_count); 592 if (TaggedStackInterpreter) { 593 add(param_count, Interpreter::value_offset_in_bytes(), param_count); // get obj address 594 } 595 ld_ptr(Lesp, param_count, recv); // gets receiver Oop 596} 597 598void InterpreterMacroAssembler::empty_expression_stack() { 599 // Reset Lesp. 600 sub( Lmonitors, wordSize, Lesp ); 601 602 // Reset SP by subtracting more space from Lesp. 603 Label done; 604 605 const Address max_stack (Lmethod, 0, in_bytes(methodOopDesc::max_stack_offset())); 606 const Address access_flags(Lmethod, 0, in_bytes(methodOopDesc::access_flags_offset())); 607 608 verify_oop(Lmethod); 609 610 611 assert( G4_scratch != Gframe_size, 612 "Only you can prevent register aliasing!"); 613 614 // A native does not need to do this, since its callee does not change SP. 615 ld(access_flags, Gframe_size); 616 btst(JVM_ACC_NATIVE, Gframe_size); 617 br(Assembler::notZero, false, Assembler::pt, done); 618 delayed()->nop(); 619 620 // 621 // Compute max expression stack+register save area 622 // 623 lduh( max_stack, Gframe_size ); 624 if (TaggedStackInterpreter) sll ( Gframe_size, 1, Gframe_size); // max_stack * 2 for TAGS 625 add( Gframe_size, frame::memory_parameter_word_sp_offset, Gframe_size ); 626 627 // 628 // now set up a stack frame with the size computed above 629 // 630 //round_to( Gframe_size, WordsPerLong ); // -- moved down to the "and" below 631 sll( Gframe_size, LogBytesPerWord, Gframe_size ); 632 sub( Lesp, Gframe_size, Gframe_size ); 633 and3( Gframe_size, -(2 * wordSize), Gframe_size ); // align SP (downwards) to an 8/16-byte boundary 634 debug_only(verify_sp(Gframe_size, G4_scratch)); 635#ifdef _LP64 636 sub(Gframe_size, STACK_BIAS, Gframe_size ); 637#endif 638 mov(Gframe_size, SP); 639 640 bind(done); 641} 642 643 644#ifdef ASSERT 645void InterpreterMacroAssembler::verify_sp(Register Rsp, Register Rtemp) { 646 Label Bad, OK; 647 648 // Saved SP must be aligned. 649#ifdef _LP64 650 btst(2*BytesPerWord-1, Rsp); 651#else 652 btst(LongAlignmentMask, Rsp); 653#endif 654 br(Assembler::notZero, false, Assembler::pn, Bad); 655 delayed()->nop(); 656 657 // Saved SP, plus register window size, must not be above FP. 658 add(Rsp, frame::register_save_words * wordSize, Rtemp); 659#ifdef _LP64 660 sub(Rtemp, STACK_BIAS, Rtemp); // Bias Rtemp before cmp to FP 661#endif 662 cmp(Rtemp, FP); 663 brx(Assembler::greaterUnsigned, false, Assembler::pn, Bad); 664 delayed()->nop(); 665 666 // Saved SP must not be ridiculously below current SP. 667 size_t maxstack = MAX2(JavaThread::stack_size_at_create(), (size_t) 4*K*K); 668 set(maxstack, Rtemp); 669 sub(SP, Rtemp, Rtemp); 670#ifdef _LP64 671 add(Rtemp, STACK_BIAS, Rtemp); // Unbias Rtemp before cmp to Rsp 672#endif 673 cmp(Rsp, Rtemp); 674 brx(Assembler::lessUnsigned, false, Assembler::pn, Bad); 675 delayed()->nop(); 676 677 br(Assembler::always, false, Assembler::pn, OK); 678 delayed()->nop(); 679 680 bind(Bad); 681 stop("on return to interpreted call, restored SP is corrupted"); 682 683 bind(OK); 684} 685 686 687void InterpreterMacroAssembler::verify_esp(Register Resp) { 688 // about to read or write Resp[0] 689 // make sure it is not in the monitors or the register save area 690 Label OK1, OK2; 691 692 cmp(Resp, Lmonitors); 693 brx(Assembler::lessUnsigned, true, Assembler::pt, OK1); 694 delayed()->sub(Resp, frame::memory_parameter_word_sp_offset * wordSize, Resp); 695 stop("too many pops: Lesp points into monitor area"); 696 bind(OK1); 697#ifdef _LP64 698 sub(Resp, STACK_BIAS, Resp); 699#endif 700 cmp(Resp, SP); 701 brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, OK2); 702 delayed()->add(Resp, STACK_BIAS + frame::memory_parameter_word_sp_offset * wordSize, Resp); 703 stop("too many pushes: Lesp points into register window"); 704 bind(OK2); 705} 706#endif // ASSERT 707 708// Load compiled (i2c) or interpreter entry when calling from interpreted and 709// do the call. Centralized so that all interpreter calls will do the same actions. 710// If jvmti single stepping is on for a thread we must not call compiled code. 711void InterpreterMacroAssembler::call_from_interpreter(Register target, Register scratch, Register Rret) { 712 713 // Assume we want to go compiled if available 714 715 ld_ptr(G5_method, in_bytes(methodOopDesc::from_interpreted_offset()), target); 716 717 if (JvmtiExport::can_post_interpreter_events()) { 718 // JVMTI events, such as single-stepping, are implemented partly by avoiding running 719 // compiled code in threads for which the event is enabled. Check here for 720 // interp_only_mode if these events CAN be enabled. 721 verify_thread(); 722 Label skip_compiled_code; 723 724 const Address interp_only (G2_thread, 0, in_bytes(JavaThread::interp_only_mode_offset())); 725 726 ld(interp_only, scratch); 727 tst(scratch); 728 br(Assembler::notZero, true, Assembler::pn, skip_compiled_code); 729 delayed()->ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), target); 730 bind(skip_compiled_code); 731 } 732 733 // the i2c_adapters need methodOop in G5_method (right? %%%) 734 // do the call 735#ifdef ASSERT 736 { 737 Label ok; 738 br_notnull(target, false, Assembler::pt, ok); 739 delayed()->nop(); 740 stop("null entry point"); 741 bind(ok); 742 } 743#endif // ASSERT 744 745 // Adjust Rret first so Llast_SP can be same as Rret 746 add(Rret, -frame::pc_return_offset, O7); 747 add(Lesp, BytesPerWord, Gargs); // setup parameter pointer 748 // Record SP so we can remove any stack space allocated by adapter transition 749 jmp(target, 0); 750 delayed()->mov(SP, Llast_SP); 751} 752 753void InterpreterMacroAssembler::if_cmp(Condition cc, bool ptr_compare) { 754 assert_not_delayed(); 755 756 Label not_taken; 757 if (ptr_compare) brx(cc, false, Assembler::pn, not_taken); 758 else br (cc, false, Assembler::pn, not_taken); 759 delayed()->nop(); 760 761 TemplateTable::branch(false,false); 762 763 bind(not_taken); 764 765 profile_not_taken_branch(G3_scratch); 766} 767 768 769void InterpreterMacroAssembler::get_2_byte_integer_at_bcp( 770 int bcp_offset, 771 Register Rtmp, 772 Register Rdst, 773 signedOrNot is_signed, 774 setCCOrNot should_set_CC ) { 775 assert(Rtmp != Rdst, "need separate temp register"); 776 assert_not_delayed(); 777 switch (is_signed) { 778 default: ShouldNotReachHere(); 779 780 case Signed: ldsb( Lbcp, bcp_offset, Rdst ); break; // high byte 781 case Unsigned: ldub( Lbcp, bcp_offset, Rdst ); break; // high byte 782 } 783 ldub( Lbcp, bcp_offset + 1, Rtmp ); // low byte 784 sll( Rdst, BitsPerByte, Rdst); 785 switch (should_set_CC ) { 786 default: ShouldNotReachHere(); 787 788 case set_CC: orcc( Rdst, Rtmp, Rdst ); break; 789 case dont_set_CC: or3( Rdst, Rtmp, Rdst ); break; 790 } 791} 792 793 794void InterpreterMacroAssembler::get_4_byte_integer_at_bcp( 795 int bcp_offset, 796 Register Rtmp, 797 Register Rdst, 798 setCCOrNot should_set_CC ) { 799 assert(Rtmp != Rdst, "need separate temp register"); 800 assert_not_delayed(); 801 add( Lbcp, bcp_offset, Rtmp); 802 andcc( Rtmp, 3, G0); 803 Label aligned; 804 switch (should_set_CC ) { 805 default: ShouldNotReachHere(); 806 807 case set_CC: break; 808 case dont_set_CC: break; 809 } 810 811 br(Assembler::zero, true, Assembler::pn, aligned); 812#ifdef _LP64 813 delayed()->ldsw(Rtmp, 0, Rdst); 814#else 815 delayed()->ld(Rtmp, 0, Rdst); 816#endif 817 818 ldub(Lbcp, bcp_offset + 3, Rdst); 819 ldub(Lbcp, bcp_offset + 2, Rtmp); sll(Rtmp, 8, Rtmp); or3(Rtmp, Rdst, Rdst); 820 ldub(Lbcp, bcp_offset + 1, Rtmp); sll(Rtmp, 16, Rtmp); or3(Rtmp, Rdst, Rdst); 821#ifdef _LP64 822 ldsb(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp); 823#else 824 // Unsigned load is faster than signed on some implementations 825 ldub(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp); 826#endif 827 or3(Rtmp, Rdst, Rdst ); 828 829 bind(aligned); 830 if (should_set_CC == set_CC) tst(Rdst); 831} 832 833 834void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register tmp, int bcp_offset) { 835 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode"); 836 assert_different_registers(cache, tmp); 837 assert_not_delayed(); 838 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned); 839 // convert from field index to ConstantPoolCacheEntry index 840 // and from word index to byte offset 841 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp); 842 add(LcpoolCache, tmp, cache); 843} 844 845 846void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset) { 847 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode"); 848 assert_different_registers(cache, tmp); 849 assert_not_delayed(); 850 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned); 851 // convert from field index to ConstantPoolCacheEntry index 852 // and from word index to byte offset 853 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp); 854 // skip past the header 855 add(tmp, in_bytes(constantPoolCacheOopDesc::base_offset()), tmp); 856 // construct pointer to cache entry 857 add(LcpoolCache, tmp, cache); 858} 859 860 861// Generate a subtype check: branch to ok_is_subtype if sub_klass is 862// a subtype of super_klass. Blows registers Rsub_klass, tmp1, tmp2. 863void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass, 864 Register Rsuper_klass, 865 Register Rtmp1, 866 Register Rtmp2, 867 Register Rtmp3, 868 Label &ok_is_subtype ) { 869 Label not_subtype, loop; 870 871 // Profile the not-null value's klass. 872 profile_typecheck(Rsub_klass, Rtmp1); 873 874 // Load the super-klass's check offset into Rtmp1 875 ld( Rsuper_klass, sizeof(oopDesc) + Klass::super_check_offset_offset_in_bytes(), Rtmp1 ); 876 // Load from the sub-klass's super-class display list, or a 1-word cache of 877 // the secondary superclass list, or a failing value with a sentinel offset 878 // if the super-klass is an interface or exceptionally deep in the Java 879 // hierarchy and we have to scan the secondary superclass list the hard way. 880 ld_ptr( Rsub_klass, Rtmp1, Rtmp2 ); 881 // See if we get an immediate positive hit 882 cmp( Rtmp2, Rsuper_klass ); 883 brx( Assembler::equal, false, Assembler::pt, ok_is_subtype ); 884 // In the delay slot, check for immediate negative hit 885 delayed()->cmp( Rtmp1, sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes() ); 886 br( Assembler::notEqual, false, Assembler::pt, not_subtype ); 887 // In the delay slot, check for self 888 delayed()->cmp( Rsub_klass, Rsuper_klass ); 889 brx( Assembler::equal, false, Assembler::pt, ok_is_subtype ); 890 891 // Now do a linear scan of the secondary super-klass chain. 892 delayed()->ld_ptr( Rsub_klass, sizeof(oopDesc) + Klass::secondary_supers_offset_in_bytes(), Rtmp2 ); 893 894 // Rtmp2 holds the objArrayOop of secondary supers. 895 ld( Rtmp2, arrayOopDesc::length_offset_in_bytes(), Rtmp1 );// Load the array length 896 // Check for empty secondary super list 897 tst(Rtmp1); 898 899 // Top of search loop 900 bind( loop ); 901 br( Assembler::equal, false, Assembler::pn, not_subtype ); 902 delayed()->nop(); 903 // load next super to check 904 ld_ptr( Rtmp2, arrayOopDesc::base_offset_in_bytes(T_OBJECT), Rtmp3 ); 905 906 // Bump array pointer forward one oop 907 add( Rtmp2, wordSize, Rtmp2 ); 908 // Look for Rsuper_klass on Rsub_klass's secondary super-class-overflow list 909 cmp( Rtmp3, Rsuper_klass ); 910 // A miss means we are NOT a subtype and need to keep looping 911 brx( Assembler::notEqual, false, Assembler::pt, loop ); 912 delayed()->deccc( Rtmp1 ); // dec trip counter in delay slot 913 // Falling out the bottom means we found a hit; we ARE a subtype 914 br( Assembler::always, false, Assembler::pt, ok_is_subtype ); 915 // Update the cache 916 delayed()->st_ptr( Rsuper_klass, Rsub_klass, sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes() ); 917 918 bind(not_subtype); 919 profile_typecheck_failed(Rtmp1); 920} 921 922// Separate these two to allow for delay slot in middle 923// These are used to do a test and full jump to exception-throwing code. 924 925// %%%%% Could possibly reoptimize this by testing to see if could use 926// a single conditional branch (i.e. if span is small enough. 927// If you go that route, than get rid of the split and give up 928// on the delay-slot hack. 929 930void InterpreterMacroAssembler::throw_if_not_1_icc( Condition ok_condition, 931 Label& ok ) { 932 assert_not_delayed(); 933 br(ok_condition, true, pt, ok); 934 // DELAY SLOT 935} 936 937void InterpreterMacroAssembler::throw_if_not_1_xcc( Condition ok_condition, 938 Label& ok ) { 939 assert_not_delayed(); 940 bp( ok_condition, true, Assembler::xcc, pt, ok); 941 // DELAY SLOT 942} 943 944void InterpreterMacroAssembler::throw_if_not_1_x( Condition ok_condition, 945 Label& ok ) { 946 assert_not_delayed(); 947 brx(ok_condition, true, pt, ok); 948 // DELAY SLOT 949} 950 951void InterpreterMacroAssembler::throw_if_not_2( address throw_entry_point, 952 Register Rscratch, 953 Label& ok ) { 954 assert(throw_entry_point != NULL, "entry point must be generated by now"); 955 Address dest(Rscratch, throw_entry_point); 956 jump_to(dest); 957 delayed()->nop(); 958 bind(ok); 959} 960 961 962// And if you cannot use the delay slot, here is a shorthand: 963 964void InterpreterMacroAssembler::throw_if_not_icc( Condition ok_condition, 965 address throw_entry_point, 966 Register Rscratch ) { 967 Label ok; 968 if (ok_condition != never) { 969 throw_if_not_1_icc( ok_condition, ok); 970 delayed()->nop(); 971 } 972 throw_if_not_2( throw_entry_point, Rscratch, ok); 973} 974void InterpreterMacroAssembler::throw_if_not_xcc( Condition ok_condition, 975 address throw_entry_point, 976 Register Rscratch ) { 977 Label ok; 978 if (ok_condition != never) { 979 throw_if_not_1_xcc( ok_condition, ok); 980 delayed()->nop(); 981 } 982 throw_if_not_2( throw_entry_point, Rscratch, ok); 983} 984void InterpreterMacroAssembler::throw_if_not_x( Condition ok_condition, 985 address throw_entry_point, 986 Register Rscratch ) { 987 Label ok; 988 if (ok_condition != never) { 989 throw_if_not_1_x( ok_condition, ok); 990 delayed()->nop(); 991 } 992 throw_if_not_2( throw_entry_point, Rscratch, ok); 993} 994 995// Check that index is in range for array, then shift index by index_shift, and put arrayOop + shifted_index into res 996// Note: res is still shy of address by array offset into object. 997 998void InterpreterMacroAssembler::index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res) { 999 assert_not_delayed(); 1000 1001 verify_oop(array); 1002#ifdef _LP64 1003 // sign extend since tos (index) can be a 32bit value 1004 sra(index, G0, index); 1005#endif // _LP64 1006 1007 // check array 1008 Label ptr_ok; 1009 tst(array); 1010 throw_if_not_1_x( notZero, ptr_ok ); 1011 delayed()->ld( array, arrayOopDesc::length_offset_in_bytes(), tmp ); // check index 1012 throw_if_not_2( Interpreter::_throw_NullPointerException_entry, G3_scratch, ptr_ok); 1013 1014 Label index_ok; 1015 cmp(index, tmp); 1016 throw_if_not_1_icc( lessUnsigned, index_ok ); 1017 if (index_shift > 0) delayed()->sll(index, index_shift, index); 1018 else delayed()->add(array, index, res); // addr - const offset in index 1019 // convention: move aberrant index into G3_scratch for exception message 1020 mov(index, G3_scratch); 1021 throw_if_not_2( Interpreter::_throw_ArrayIndexOutOfBoundsException_entry, G4_scratch, index_ok); 1022 1023 // add offset if didn't do it in delay slot 1024 if (index_shift > 0) add(array, index, res); // addr - const offset in index 1025} 1026 1027 1028void InterpreterMacroAssembler::index_check(Register array, Register index, int index_shift, Register tmp, Register res) { 1029 assert_not_delayed(); 1030 1031 // pop array 1032 pop_ptr(array); 1033 1034 // check array 1035 index_check_without_pop(array, index, index_shift, tmp, res); 1036} 1037 1038 1039void InterpreterMacroAssembler::get_constant_pool(Register Rdst) { 1040 ld_ptr(Lmethod, in_bytes(methodOopDesc::constants_offset()), Rdst); 1041} 1042 1043 1044void InterpreterMacroAssembler::get_constant_pool_cache(Register Rdst) { 1045 get_constant_pool(Rdst); 1046 ld_ptr(Rdst, constantPoolOopDesc::cache_offset_in_bytes(), Rdst); 1047} 1048 1049 1050void InterpreterMacroAssembler::get_cpool_and_tags(Register Rcpool, Register Rtags) { 1051 get_constant_pool(Rcpool); 1052 ld_ptr(Rcpool, constantPoolOopDesc::tags_offset_in_bytes(), Rtags); 1053} 1054 1055 1056// unlock if synchronized method 1057// 1058// Unlock the receiver if this is a synchronized method. 1059// Unlock any Java monitors from syncronized blocks. 1060// 1061// If there are locked Java monitors 1062// If throw_monitor_exception 1063// throws IllegalMonitorStateException 1064// Else if install_monitor_exception 1065// installs IllegalMonitorStateException 1066// Else 1067// no error processing 1068void InterpreterMacroAssembler::unlock_if_synchronized_method(TosState state, 1069 bool throw_monitor_exception, 1070 bool install_monitor_exception) { 1071 Label unlocked, unlock, no_unlock; 1072 1073 // get the value of _do_not_unlock_if_synchronized into G1_scratch 1074 const Address do_not_unlock_if_synchronized(G2_thread, 0, 1075 in_bytes(JavaThread::do_not_unlock_if_synchronized_offset())); 1076 ldbool(do_not_unlock_if_synchronized, G1_scratch); 1077 stbool(G0, do_not_unlock_if_synchronized); // reset the flag 1078 1079 // check if synchronized method 1080 const Address access_flags(Lmethod, 0, in_bytes(methodOopDesc::access_flags_offset())); 1081 interp_verify_oop(Otos_i, state, __FILE__, __LINE__); 1082 push(state); // save tos 1083 ld(access_flags, G3_scratch); 1084 btst(JVM_ACC_SYNCHRONIZED, G3_scratch); 1085 br( zero, false, pt, unlocked); 1086 delayed()->nop(); 1087 1088 // Don't unlock anything if the _do_not_unlock_if_synchronized flag 1089 // is set. 1090 tstbool(G1_scratch); 1091 br(Assembler::notZero, false, pn, no_unlock); 1092 delayed()->nop(); 1093 1094 // BasicObjectLock will be first in list, since this is a synchronized method. However, need 1095 // to check that the object has not been unlocked by an explicit monitorexit bytecode. 1096 1097 //Intel: if (throw_monitor_exception) ... else ... 1098 // Entry already unlocked, need to throw exception 1099 //... 1100 1101 // pass top-most monitor elem 1102 add( top_most_monitor(), O1 ); 1103 1104 ld_ptr(O1, BasicObjectLock::obj_offset_in_bytes(), G3_scratch); 1105 br_notnull(G3_scratch, false, pt, unlock); 1106 delayed()->nop(); 1107 1108 if (throw_monitor_exception) { 1109 // Entry already unlocked need to throw an exception 1110 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception)); 1111 should_not_reach_here(); 1112 } else { 1113 // Monitor already unlocked during a stack unroll. 1114 // If requested, install an illegal_monitor_state_exception. 1115 // Continue with stack unrolling. 1116 if (install_monitor_exception) { 1117 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception)); 1118 } 1119 ba(false, unlocked); 1120 delayed()->nop(); 1121 } 1122 1123 bind(unlock); 1124 1125 unlock_object(O1); 1126 1127 bind(unlocked); 1128 1129 // I0, I1: Might contain return value 1130 1131 // Check that all monitors are unlocked 1132 { Label loop, exception, entry, restart; 1133 1134 Register Rmptr = O0; 1135 Register Rtemp = O1; 1136 Register Rlimit = Lmonitors; 1137 const jint delta = frame::interpreter_frame_monitor_size() * wordSize; 1138 assert( (delta & LongAlignmentMask) == 0, 1139 "sizeof BasicObjectLock must be even number of doublewords"); 1140 1141 #ifdef ASSERT 1142 add(top_most_monitor(), Rmptr, delta); 1143 { Label L; 1144 // ensure that Rmptr starts out above (or at) Rlimit 1145 cmp(Rmptr, Rlimit); 1146 brx(Assembler::greaterEqualUnsigned, false, pn, L); 1147 delayed()->nop(); 1148 stop("monitor stack has negative size"); 1149 bind(L); 1150 } 1151 #endif 1152 bind(restart); 1153 ba(false, entry); 1154 delayed()-> 1155 add(top_most_monitor(), Rmptr, delta); // points to current entry, starting with bottom-most entry 1156 1157 // Entry is still locked, need to throw exception 1158 bind(exception); 1159 if (throw_monitor_exception) { 1160 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception)); 1161 should_not_reach_here(); 1162 } else { 1163 // Stack unrolling. Unlock object and if requested, install illegal_monitor_exception. 1164 // Unlock does not block, so don't have to worry about the frame 1165 unlock_object(Rmptr); 1166 if (install_monitor_exception) { 1167 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception)); 1168 } 1169 ba(false, restart); 1170 delayed()->nop(); 1171 } 1172 1173 bind(loop); 1174 cmp(Rtemp, G0); // check if current entry is used 1175 brx(Assembler::notEqual, false, pn, exception); 1176 delayed()-> 1177 dec(Rmptr, delta); // otherwise advance to next entry 1178 #ifdef ASSERT 1179 { Label L; 1180 // ensure that Rmptr has not somehow stepped below Rlimit 1181 cmp(Rmptr, Rlimit); 1182 brx(Assembler::greaterEqualUnsigned, false, pn, L); 1183 delayed()->nop(); 1184 stop("ran off the end of the monitor stack"); 1185 bind(L); 1186 } 1187 #endif 1188 bind(entry); 1189 cmp(Rmptr, Rlimit); // check if bottom reached 1190 brx(Assembler::notEqual, true, pn, loop); // if not at bottom then check this entry 1191 delayed()-> 1192 ld_ptr(Rmptr, BasicObjectLock::obj_offset_in_bytes() - delta, Rtemp); 1193 } 1194 1195 bind(no_unlock); 1196 pop(state); 1197 interp_verify_oop(Otos_i, state, __FILE__, __LINE__); 1198} 1199 1200 1201// remove activation 1202// 1203// Unlock the receiver if this is a synchronized method. 1204// Unlock any Java monitors from syncronized blocks. 1205// Remove the activation from the stack. 1206// 1207// If there are locked Java monitors 1208// If throw_monitor_exception 1209// throws IllegalMonitorStateException 1210// Else if install_monitor_exception 1211// installs IllegalMonitorStateException 1212// Else 1213// no error processing 1214void InterpreterMacroAssembler::remove_activation(TosState state, 1215 bool throw_monitor_exception, 1216 bool install_monitor_exception) { 1217 1218 unlock_if_synchronized_method(state, throw_monitor_exception, install_monitor_exception); 1219 1220 // save result (push state before jvmti call and pop it afterwards) and notify jvmti 1221 notify_method_exit(false, state, NotifyJVMTI); 1222 1223 interp_verify_oop(Otos_i, state, __FILE__, __LINE__); 1224 verify_oop(Lmethod); 1225 verify_thread(); 1226 1227 // return tos 1228 assert(Otos_l1 == Otos_i, "adjust code below"); 1229 switch (state) { 1230#ifdef _LP64 1231 case ltos: mov(Otos_l, Otos_l->after_save()); break; // O0 -> I0 1232#else 1233 case ltos: mov(Otos_l2, Otos_l2->after_save()); // fall through // O1 -> I1 1234#endif 1235 case btos: // fall through 1236 case ctos: 1237 case stos: // fall through 1238 case atos: // fall through 1239 case itos: mov(Otos_l1, Otos_l1->after_save()); break; // O0 -> I0 1240 case ftos: // fall through 1241 case dtos: // fall through 1242 case vtos: /* nothing to do */ break; 1243 default : ShouldNotReachHere(); 1244 } 1245 1246#if defined(COMPILER2) && !defined(_LP64) 1247 if (state == ltos) { 1248 // C2 expects long results in G1 we can't tell if we're returning to interpreted 1249 // or compiled so just be safe use G1 and O0/O1 1250 1251 // Shift bits into high (msb) of G1 1252 sllx(Otos_l1->after_save(), 32, G1); 1253 // Zero extend low bits 1254 srl (Otos_l2->after_save(), 0, Otos_l2->after_save()); 1255 or3 (Otos_l2->after_save(), G1, G1); 1256 } 1257#endif /* COMPILER2 */ 1258 1259} 1260#endif /* CC_INTERP */ 1261 1262 1263// Lock object 1264// 1265// Argument - lock_reg points to the BasicObjectLock to be used for locking, 1266// it must be initialized with the object to lock 1267void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object) { 1268 if (UseHeavyMonitors) { 1269 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg); 1270 } 1271 else { 1272 Register obj_reg = Object; 1273 Register mark_reg = G4_scratch; 1274 Register temp_reg = G1_scratch; 1275 Address lock_addr = Address(lock_reg, 0, BasicObjectLock::lock_offset_in_bytes()); 1276 Address mark_addr = Address(obj_reg, 0, oopDesc::mark_offset_in_bytes()); 1277 Label done; 1278 1279 Label slow_case; 1280 1281 assert_different_registers(lock_reg, obj_reg, mark_reg, temp_reg); 1282 1283 // load markOop from object into mark_reg 1284 ld_ptr(mark_addr, mark_reg); 1285 1286 if (UseBiasedLocking) { 1287 biased_locking_enter(obj_reg, mark_reg, temp_reg, done, &slow_case); 1288 } 1289 1290 // get the address of basicLock on stack that will be stored in the object 1291 // we need a temporary register here as we do not want to clobber lock_reg 1292 // (cas clobbers the destination register) 1293 mov(lock_reg, temp_reg); 1294 // set mark reg to be (markOop of object | UNLOCK_VALUE) 1295 or3(mark_reg, markOopDesc::unlocked_value, mark_reg); 1296 // initialize the box (Must happen before we update the object mark!) 1297 st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes()); 1298 // compare and exchange object_addr, markOop | 1, stack address of basicLock 1299 assert(mark_addr.disp() == 0, "cas must take a zero displacement"); 1300 casx_under_lock(mark_addr.base(), mark_reg, temp_reg, 1301 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr()); 1302 1303 // if the compare and exchange succeeded we are done (we saw an unlocked object) 1304 cmp(mark_reg, temp_reg); 1305 brx(Assembler::equal, true, Assembler::pt, done); 1306 delayed()->nop(); 1307 1308 // We did not see an unlocked object so try the fast recursive case 1309 1310 // Check if owner is self by comparing the value in the markOop of object 1311 // with the stack pointer 1312 sub(temp_reg, SP, temp_reg); 1313#ifdef _LP64 1314 sub(temp_reg, STACK_BIAS, temp_reg); 1315#endif 1316 assert(os::vm_page_size() > 0xfff, "page size too small - change the constant"); 1317 1318 // Composite "andcc" test: 1319 // (a) %sp -vs- markword proximity check, and, 1320 // (b) verify mark word LSBs == 0 (Stack-locked). 1321 // 1322 // FFFFF003/FFFFFFFFFFFF003 is (markOopDesc::lock_mask_in_place | -os::vm_page_size()) 1323 // Note that the page size used for %sp proximity testing is arbitrary and is 1324 // unrelated to the actual MMU page size. We use a 'logical' page size of 1325 // 4096 bytes. F..FFF003 is designed to fit conveniently in the SIMM13 immediate 1326 // field of the andcc instruction. 1327 andcc (temp_reg, 0xFFFFF003, G0) ; 1328 1329 // if condition is true we are done and hence we can store 0 in the displaced 1330 // header indicating it is a recursive lock and be done 1331 brx(Assembler::zero, true, Assembler::pt, done); 1332 delayed()->st_ptr(G0, lock_addr, BasicLock::displaced_header_offset_in_bytes()); 1333 1334 // none of the above fast optimizations worked so we have to get into the 1335 // slow case of monitor enter 1336 bind(slow_case); 1337 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg); 1338 1339 bind(done); 1340 } 1341} 1342 1343// Unlocks an object. Used in monitorexit bytecode and remove_activation. 1344// 1345// Argument - lock_reg points to the BasicObjectLock for lock 1346// Throw IllegalMonitorException if object is not locked by current thread 1347void InterpreterMacroAssembler::unlock_object(Register lock_reg) { 1348 if (UseHeavyMonitors) { 1349 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg); 1350 } else { 1351 Register obj_reg = G3_scratch; 1352 Register mark_reg = G4_scratch; 1353 Register displaced_header_reg = G1_scratch; 1354 Address lock_addr = Address(lock_reg, 0, BasicObjectLock::lock_offset_in_bytes()); 1355 Address lockobj_addr = Address(lock_reg, 0, BasicObjectLock::obj_offset_in_bytes()); 1356 Address mark_addr = Address(obj_reg, 0, oopDesc::mark_offset_in_bytes()); 1357 Label done; 1358 1359 if (UseBiasedLocking) { 1360 // load the object out of the BasicObjectLock 1361 ld_ptr(lockobj_addr, obj_reg); 1362 biased_locking_exit(mark_addr, mark_reg, done, true); 1363 st_ptr(G0, lockobj_addr); // free entry 1364 } 1365 1366 // Test first if we are in the fast recursive case 1367 ld_ptr(lock_addr, displaced_header_reg, BasicLock::displaced_header_offset_in_bytes()); 1368 br_null(displaced_header_reg, true, Assembler::pn, done); 1369 delayed()->st_ptr(G0, lockobj_addr); // free entry 1370 1371 // See if it is still a light weight lock, if so we just unlock 1372 // the object and we are done 1373 1374 if (!UseBiasedLocking) { 1375 // load the object out of the BasicObjectLock 1376 ld_ptr(lockobj_addr, obj_reg); 1377 } 1378 1379 // we have the displaced header in displaced_header_reg 1380 // we expect to see the stack address of the basicLock in case the 1381 // lock is still a light weight lock (lock_reg) 1382 assert(mark_addr.disp() == 0, "cas must take a zero displacement"); 1383 casx_under_lock(mark_addr.base(), lock_reg, displaced_header_reg, 1384 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr()); 1385 cmp(lock_reg, displaced_header_reg); 1386 brx(Assembler::equal, true, Assembler::pn, done); 1387 delayed()->st_ptr(G0, lockobj_addr); // free entry 1388 1389 // The lock has been converted into a heavy lock and hence 1390 // we need to get into the slow case 1391 1392 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg); 1393 1394 bind(done); 1395 } 1396} 1397 1398#ifndef CC_INTERP 1399 1400// Get the method data pointer from the methodOop and set the 1401// specified register to its value. 1402 1403void InterpreterMacroAssembler::set_method_data_pointer_offset(Register Roff) { 1404 assert(ProfileInterpreter, "must be profiling interpreter"); 1405 Label get_continue; 1406 1407 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr); 1408 test_method_data_pointer(get_continue); 1409 add(ImethodDataPtr, in_bytes(methodDataOopDesc::data_offset()), ImethodDataPtr); 1410 if (Roff != noreg) 1411 // Roff contains a method data index ("mdi"). It defaults to zero. 1412 add(ImethodDataPtr, Roff, ImethodDataPtr); 1413 bind(get_continue); 1414} 1415 1416// Set the method data pointer for the current bcp. 1417 1418void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() { 1419 assert(ProfileInterpreter, "must be profiling interpreter"); 1420 Label zero_continue; 1421 1422 // Test MDO to avoid the call if it is NULL. 1423 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr); 1424 test_method_data_pointer(zero_continue); 1425 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::bcp_to_di), Lmethod, Lbcp); 1426 set_method_data_pointer_offset(O0); 1427 bind(zero_continue); 1428} 1429 1430// Test ImethodDataPtr. If it is null, continue at the specified label 1431 1432void InterpreterMacroAssembler::test_method_data_pointer(Label& zero_continue) { 1433 assert(ProfileInterpreter, "must be profiling interpreter"); 1434#ifdef _LP64 1435 bpr(Assembler::rc_z, false, Assembler::pn, ImethodDataPtr, zero_continue); 1436#else 1437 tst(ImethodDataPtr); 1438 br(Assembler::zero, false, Assembler::pn, zero_continue); 1439#endif 1440 delayed()->nop(); 1441} 1442 1443void InterpreterMacroAssembler::verify_method_data_pointer() { 1444 assert(ProfileInterpreter, "must be profiling interpreter"); 1445#ifdef ASSERT 1446 Label verify_continue; 1447 test_method_data_pointer(verify_continue); 1448 1449 // If the mdp is valid, it will point to a DataLayout header which is 1450 // consistent with the bcp. The converse is highly probable also. 1451 lduh(ImethodDataPtr, in_bytes(DataLayout::bci_offset()), G3_scratch); 1452 ld_ptr(Address(Lmethod, 0, in_bytes(methodOopDesc::const_offset())), O5); 1453 add(G3_scratch, in_bytes(constMethodOopDesc::codes_offset()), G3_scratch); 1454 add(G3_scratch, O5, G3_scratch); 1455 cmp(Lbcp, G3_scratch); 1456 brx(Assembler::equal, false, Assembler::pt, verify_continue); 1457 1458 Register temp_reg = O5; 1459 delayed()->mov(ImethodDataPtr, temp_reg); 1460 // %%% should use call_VM_leaf here? 1461 //call_VM_leaf(noreg, ..., Lmethod, Lbcp, ImethodDataPtr); 1462 save_frame_and_mov(sizeof(jdouble) / wordSize, Lmethod, O0, Lbcp, O1); 1463 Address d_save(FP, 0, -sizeof(jdouble) + STACK_BIAS); 1464 stf(FloatRegisterImpl::D, Ftos_d, d_save); 1465 mov(temp_reg->after_save(), O2); 1466 save_thread(L7_thread_cache); 1467 call(CAST_FROM_FN_PTR(address, InterpreterRuntime::verify_mdp), relocInfo::none); 1468 delayed()->nop(); 1469 restore_thread(L7_thread_cache); 1470 ldf(FloatRegisterImpl::D, d_save, Ftos_d); 1471 restore(); 1472 bind(verify_continue); 1473#endif // ASSERT 1474} 1475 1476void InterpreterMacroAssembler::test_invocation_counter_for_mdp(Register invocation_count, 1477 Register cur_bcp, 1478 Register Rtmp, 1479 Label &profile_continue) { 1480 assert(ProfileInterpreter, "must be profiling interpreter"); 1481 // Control will flow to "profile_continue" if the counter is less than the 1482 // limit or if we call profile_method() 1483 1484 Label done; 1485 1486 // if no method data exists, and the counter is high enough, make one 1487#ifdef _LP64 1488 bpr(Assembler::rc_nz, false, Assembler::pn, ImethodDataPtr, done); 1489#else 1490 tst(ImethodDataPtr); 1491 br(Assembler::notZero, false, Assembler::pn, done); 1492#endif 1493 1494 // Test to see if we should create a method data oop 1495 Address profile_limit(Rtmp, (address)&InvocationCounter::InterpreterProfileLimit); 1496#ifdef _LP64 1497 delayed()->nop(); 1498 sethi(profile_limit); 1499#else 1500 delayed()->sethi(profile_limit); 1501#endif 1502 ld(profile_limit, Rtmp); 1503 cmp(invocation_count, Rtmp); 1504 br(Assembler::lessUnsigned, false, Assembler::pn, profile_continue); 1505 delayed()->nop(); 1506 1507 // Build it now. 1508 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::profile_method), cur_bcp); 1509 set_method_data_pointer_offset(O0); 1510 ba(false, profile_continue); 1511 delayed()->nop(); 1512 bind(done); 1513} 1514 1515// Store a value at some constant offset from the method data pointer. 1516 1517void InterpreterMacroAssembler::set_mdp_data_at(int constant, Register value) { 1518 assert(ProfileInterpreter, "must be profiling interpreter"); 1519 st_ptr(value, ImethodDataPtr, constant); 1520} 1521 1522void InterpreterMacroAssembler::increment_mdp_data_at(Address counter, 1523 Register bumped_count, 1524 bool decrement) { 1525 assert(ProfileInterpreter, "must be profiling interpreter"); 1526 1527 // Load the counter. 1528 ld_ptr(counter, bumped_count); 1529 1530 if (decrement) { 1531 // Decrement the register. Set condition codes. 1532 subcc(bumped_count, DataLayout::counter_increment, bumped_count); 1533 1534 // If the decrement causes the counter to overflow, stay negative 1535 Label L; 1536 brx(Assembler::negative, true, Assembler::pn, L); 1537 1538 // Store the decremented counter, if it is still negative. 1539 delayed()->st_ptr(bumped_count, counter); 1540 bind(L); 1541 } else { 1542 // Increment the register. Set carry flag. 1543 addcc(bumped_count, DataLayout::counter_increment, bumped_count); 1544 1545 // If the increment causes the counter to overflow, pull back by 1. 1546 assert(DataLayout::counter_increment == 1, "subc works"); 1547 subc(bumped_count, G0, bumped_count); 1548 1549 // Store the incremented counter. 1550 st_ptr(bumped_count, counter); 1551 } 1552} 1553 1554// Increment the value at some constant offset from the method data pointer. 1555 1556void InterpreterMacroAssembler::increment_mdp_data_at(int constant, 1557 Register bumped_count, 1558 bool decrement) { 1559 // Locate the counter at a fixed offset from the mdp: 1560 Address counter(ImethodDataPtr, 0, constant); 1561 increment_mdp_data_at(counter, bumped_count, decrement); 1562} 1563 1564// Increment the value at some non-fixed (reg + constant) offset from 1565// the method data pointer. 1566 1567void InterpreterMacroAssembler::increment_mdp_data_at(Register reg, 1568 int constant, 1569 Register bumped_count, 1570 Register scratch2, 1571 bool decrement) { 1572 // Add the constant to reg to get the offset. 1573 add(ImethodDataPtr, reg, scratch2); 1574 Address counter(scratch2, 0, constant); 1575 increment_mdp_data_at(counter, bumped_count, decrement); 1576} 1577 1578// Set a flag value at the current method data pointer position. 1579// Updates a single byte of the header, to avoid races with other header bits. 1580 1581void InterpreterMacroAssembler::set_mdp_flag_at(int flag_constant, 1582 Register scratch) { 1583 assert(ProfileInterpreter, "must be profiling interpreter"); 1584 // Load the data header 1585 ldub(ImethodDataPtr, in_bytes(DataLayout::flags_offset()), scratch); 1586 1587 // Set the flag 1588 or3(scratch, flag_constant, scratch); 1589 1590 // Store the modified header. 1591 stb(scratch, ImethodDataPtr, in_bytes(DataLayout::flags_offset())); 1592} 1593 1594// Test the location at some offset from the method data pointer. 1595// If it is not equal to value, branch to the not_equal_continue Label. 1596// Set condition codes to match the nullness of the loaded value. 1597 1598void InterpreterMacroAssembler::test_mdp_data_at(int offset, 1599 Register value, 1600 Label& not_equal_continue, 1601 Register scratch) { 1602 assert(ProfileInterpreter, "must be profiling interpreter"); 1603 ld_ptr(ImethodDataPtr, offset, scratch); 1604 cmp(value, scratch); 1605 brx(Assembler::notEqual, false, Assembler::pn, not_equal_continue); 1606 delayed()->tst(scratch); 1607} 1608 1609// Update the method data pointer by the displacement located at some fixed 1610// offset from the method data pointer. 1611 1612void InterpreterMacroAssembler::update_mdp_by_offset(int offset_of_disp, 1613 Register scratch) { 1614 assert(ProfileInterpreter, "must be profiling interpreter"); 1615 ld_ptr(ImethodDataPtr, offset_of_disp, scratch); 1616 add(ImethodDataPtr, scratch, ImethodDataPtr); 1617} 1618 1619// Update the method data pointer by the displacement located at the 1620// offset (reg + offset_of_disp). 1621 1622void InterpreterMacroAssembler::update_mdp_by_offset(Register reg, 1623 int offset_of_disp, 1624 Register scratch) { 1625 assert(ProfileInterpreter, "must be profiling interpreter"); 1626 add(reg, offset_of_disp, scratch); 1627 ld_ptr(ImethodDataPtr, scratch, scratch); 1628 add(ImethodDataPtr, scratch, ImethodDataPtr); 1629} 1630 1631// Update the method data pointer by a simple constant displacement. 1632 1633void InterpreterMacroAssembler::update_mdp_by_constant(int constant) { 1634 assert(ProfileInterpreter, "must be profiling interpreter"); 1635 add(ImethodDataPtr, constant, ImethodDataPtr); 1636} 1637 1638// Update the method data pointer for a _ret bytecode whose target 1639// was not among our cached targets. 1640 1641void InterpreterMacroAssembler::update_mdp_for_ret(TosState state, 1642 Register return_bci) { 1643 assert(ProfileInterpreter, "must be profiling interpreter"); 1644 push(state); 1645 st_ptr(return_bci, l_tmp); // protect return_bci, in case it is volatile 1646 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::update_mdp_for_ret), return_bci); 1647 ld_ptr(l_tmp, return_bci); 1648 pop(state); 1649} 1650 1651// Count a taken branch in the bytecodes. 1652 1653void InterpreterMacroAssembler::profile_taken_branch(Register scratch, Register bumped_count) { 1654 if (ProfileInterpreter) { 1655 Label profile_continue; 1656 1657 // If no method data exists, go to profile_continue. 1658 test_method_data_pointer(profile_continue); 1659 1660 // We are taking a branch. Increment the taken count. 1661 increment_mdp_data_at(in_bytes(JumpData::taken_offset()), bumped_count); 1662 1663 // The method data pointer needs to be updated to reflect the new target. 1664 update_mdp_by_offset(in_bytes(JumpData::displacement_offset()), scratch); 1665 bind (profile_continue); 1666 } 1667} 1668 1669 1670// Count a not-taken branch in the bytecodes. 1671 1672void InterpreterMacroAssembler::profile_not_taken_branch(Register scratch) { 1673 if (ProfileInterpreter) { 1674 Label profile_continue; 1675 1676 // If no method data exists, go to profile_continue. 1677 test_method_data_pointer(profile_continue); 1678 1679 // We are taking a branch. Increment the not taken count. 1680 increment_mdp_data_at(in_bytes(BranchData::not_taken_offset()), scratch); 1681 1682 // The method data pointer needs to be updated to correspond to the 1683 // next bytecode. 1684 update_mdp_by_constant(in_bytes(BranchData::branch_data_size())); 1685 bind (profile_continue); 1686 } 1687} 1688 1689 1690// Count a non-virtual call in the bytecodes. 1691 1692void InterpreterMacroAssembler::profile_call(Register scratch) { 1693 if (ProfileInterpreter) { 1694 Label profile_continue; 1695 1696 // If no method data exists, go to profile_continue. 1697 test_method_data_pointer(profile_continue); 1698 1699 // We are making a call. Increment the count. 1700 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch); 1701 1702 // The method data pointer needs to be updated to reflect the new target. 1703 update_mdp_by_constant(in_bytes(CounterData::counter_data_size())); 1704 bind (profile_continue); 1705 } 1706} 1707 1708 1709// Count a final call in the bytecodes. 1710 1711void InterpreterMacroAssembler::profile_final_call(Register scratch) { 1712 if (ProfileInterpreter) { 1713 Label profile_continue; 1714 1715 // If no method data exists, go to profile_continue. 1716 test_method_data_pointer(profile_continue); 1717 1718 // We are making a call. Increment the count. 1719 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch); 1720 1721 // The method data pointer needs to be updated to reflect the new target. 1722 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size())); 1723 bind (profile_continue); 1724 } 1725} 1726 1727 1728// Count a virtual call in the bytecodes. 1729 1730void InterpreterMacroAssembler::profile_virtual_call(Register receiver, 1731 Register scratch) { 1732 if (ProfileInterpreter) { 1733 Label profile_continue; 1734 1735 // If no method data exists, go to profile_continue. 1736 test_method_data_pointer(profile_continue); 1737 1738 // We are making a call. Increment the count. 1739 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch); 1740 1741 // Record the receiver type. 1742 record_klass_in_profile(receiver, scratch); 1743 1744 // The method data pointer needs to be updated to reflect the new target. 1745 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size())); 1746 bind (profile_continue); 1747 } 1748} 1749 1750void InterpreterMacroAssembler::record_klass_in_profile_helper( 1751 Register receiver, Register scratch, 1752 int start_row, Label& done) { 1753 int last_row = VirtualCallData::row_limit() - 1; 1754 assert(start_row <= last_row, "must be work left to do"); 1755 // Test this row for both the receiver and for null. 1756 // Take any of three different outcomes: 1757 // 1. found receiver => increment count and goto done 1758 // 2. found null => keep looking for case 1, maybe allocate this cell 1759 // 3. found something else => keep looking for cases 1 and 2 1760 // Case 3 is handled by a recursive call. 1761 for (int row = start_row; row <= last_row; row++) { 1762 Label next_test; 1763 bool test_for_null_also = (row == start_row); 1764 1765 // See if the receiver is receiver[n]. 1766 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(row)); 1767 test_mdp_data_at(recvr_offset, receiver, next_test, scratch); 1768 1769 // The receiver is receiver[n]. Increment count[n]. 1770 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(row)); 1771 increment_mdp_data_at(count_offset, scratch); 1772 ba(false, done); 1773 delayed()->nop(); 1774 bind(next_test); 1775 1776 if (test_for_null_also) { 1777 // Failed the equality check on receiver[n]... Test for null. 1778 if (start_row == last_row) { 1779 // The only thing left to do is handle the null case. 1780 brx(Assembler::notZero, false, Assembler::pt, done); 1781 delayed()->nop(); 1782 break; 1783 } 1784 // Since null is rare, make it be the branch-taken case. 1785 Label found_null; 1786 brx(Assembler::zero, false, Assembler::pn, found_null); 1787 delayed()->nop(); 1788 1789 // Put all the "Case 3" tests here. 1790 record_klass_in_profile_helper(receiver, scratch, start_row + 1, done); 1791 1792 // Found a null. Keep searching for a matching receiver, 1793 // but remember that this is an empty (unused) slot. 1794 bind(found_null); 1795 } 1796 } 1797 1798 // In the fall-through case, we found no matching receiver, but we 1799 // observed the receiver[start_row] is NULL. 1800 1801 // Fill in the receiver field and increment the count. 1802 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(start_row)); 1803 set_mdp_data_at(recvr_offset, receiver); 1804 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(start_row)); 1805 mov(DataLayout::counter_increment, scratch); 1806 set_mdp_data_at(count_offset, scratch); 1807 ba(false, done); 1808 delayed()->nop(); 1809} 1810 1811void InterpreterMacroAssembler::record_klass_in_profile(Register receiver, 1812 Register scratch) { 1813 assert(ProfileInterpreter, "must be profiling"); 1814 Label done; 1815 1816 record_klass_in_profile_helper(receiver, scratch, 0, done); 1817 1818 bind (done); 1819} 1820 1821 1822// Count a ret in the bytecodes. 1823 1824void InterpreterMacroAssembler::profile_ret(TosState state, 1825 Register return_bci, 1826 Register scratch) { 1827 if (ProfileInterpreter) { 1828 Label profile_continue; 1829 uint row; 1830 1831 // If no method data exists, go to profile_continue. 1832 test_method_data_pointer(profile_continue); 1833 1834 // Update the total ret count. 1835 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch); 1836 1837 for (row = 0; row < RetData::row_limit(); row++) { 1838 Label next_test; 1839 1840 // See if return_bci is equal to bci[n]: 1841 test_mdp_data_at(in_bytes(RetData::bci_offset(row)), 1842 return_bci, next_test, scratch); 1843 1844 // return_bci is equal to bci[n]. Increment the count. 1845 increment_mdp_data_at(in_bytes(RetData::bci_count_offset(row)), scratch); 1846 1847 // The method data pointer needs to be updated to reflect the new target. 1848 update_mdp_by_offset(in_bytes(RetData::bci_displacement_offset(row)), scratch); 1849 ba(false, profile_continue); 1850 delayed()->nop(); 1851 bind(next_test); 1852 } 1853 1854 update_mdp_for_ret(state, return_bci); 1855 1856 bind (profile_continue); 1857 } 1858} 1859 1860// Profile an unexpected null in the bytecodes. 1861void InterpreterMacroAssembler::profile_null_seen(Register scratch) { 1862 if (ProfileInterpreter) { 1863 Label profile_continue; 1864 1865 // If no method data exists, go to profile_continue. 1866 test_method_data_pointer(profile_continue); 1867 1868 set_mdp_flag_at(BitData::null_seen_byte_constant(), scratch); 1869 1870 // The method data pointer needs to be updated. 1871 int mdp_delta = in_bytes(BitData::bit_data_size()); 1872 if (TypeProfileCasts) { 1873 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size()); 1874 } 1875 update_mdp_by_constant(mdp_delta); 1876 1877 bind (profile_continue); 1878 } 1879} 1880 1881void InterpreterMacroAssembler::profile_typecheck(Register klass, 1882 Register scratch) { 1883 if (ProfileInterpreter) { 1884 Label profile_continue; 1885 1886 // If no method data exists, go to profile_continue. 1887 test_method_data_pointer(profile_continue); 1888 1889 int mdp_delta = in_bytes(BitData::bit_data_size()); 1890 if (TypeProfileCasts) { 1891 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size()); 1892 1893 // Record the object type. 1894 record_klass_in_profile(klass, scratch); 1895 } 1896 1897 // The method data pointer needs to be updated. 1898 update_mdp_by_constant(mdp_delta); 1899 1900 bind (profile_continue); 1901 } 1902} 1903 1904void InterpreterMacroAssembler::profile_typecheck_failed(Register scratch) { 1905 if (ProfileInterpreter && TypeProfileCasts) { 1906 Label profile_continue; 1907 1908 // If no method data exists, go to profile_continue. 1909 test_method_data_pointer(profile_continue); 1910 1911 int count_offset = in_bytes(CounterData::count_offset()); 1912 // Back up the address, since we have already bumped the mdp. 1913 count_offset -= in_bytes(VirtualCallData::virtual_call_data_size()); 1914 1915 // *Decrement* the counter. We expect to see zero or small negatives. 1916 increment_mdp_data_at(count_offset, scratch, true); 1917 1918 bind (profile_continue); 1919 } 1920} 1921 1922// Count the default case of a switch construct. 1923 1924void InterpreterMacroAssembler::profile_switch_default(Register scratch) { 1925 if (ProfileInterpreter) { 1926 Label profile_continue; 1927 1928 // If no method data exists, go to profile_continue. 1929 test_method_data_pointer(profile_continue); 1930 1931 // Update the default case count 1932 increment_mdp_data_at(in_bytes(MultiBranchData::default_count_offset()), 1933 scratch); 1934 1935 // The method data pointer needs to be updated. 1936 update_mdp_by_offset( 1937 in_bytes(MultiBranchData::default_displacement_offset()), 1938 scratch); 1939 1940 bind (profile_continue); 1941 } 1942} 1943 1944// Count the index'th case of a switch construct. 1945 1946void InterpreterMacroAssembler::profile_switch_case(Register index, 1947 Register scratch, 1948 Register scratch2, 1949 Register scratch3) { 1950 if (ProfileInterpreter) { 1951 Label profile_continue; 1952 1953 // If no method data exists, go to profile_continue. 1954 test_method_data_pointer(profile_continue); 1955 1956 // Build the base (index * per_case_size_in_bytes()) + case_array_offset_in_bytes() 1957 set(in_bytes(MultiBranchData::per_case_size()), scratch); 1958 smul(index, scratch, scratch); 1959 add(scratch, in_bytes(MultiBranchData::case_array_offset()), scratch); 1960 1961 // Update the case count 1962 increment_mdp_data_at(scratch, 1963 in_bytes(MultiBranchData::relative_count_offset()), 1964 scratch2, 1965 scratch3); 1966 1967 // The method data pointer needs to be updated. 1968 update_mdp_by_offset(scratch, 1969 in_bytes(MultiBranchData::relative_displacement_offset()), 1970 scratch2); 1971 1972 bind (profile_continue); 1973 } 1974} 1975 1976// add a InterpMonitorElem to stack (see frame_sparc.hpp) 1977 1978void InterpreterMacroAssembler::add_monitor_to_stack( bool stack_is_empty, 1979 Register Rtemp, 1980 Register Rtemp2 ) { 1981 1982 Register Rlimit = Lmonitors; 1983 const jint delta = frame::interpreter_frame_monitor_size() * wordSize; 1984 assert( (delta & LongAlignmentMask) == 0, 1985 "sizeof BasicObjectLock must be even number of doublewords"); 1986 1987 sub( SP, delta, SP); 1988 sub( Lesp, delta, Lesp); 1989 sub( Lmonitors, delta, Lmonitors); 1990 1991 if (!stack_is_empty) { 1992 1993 // must copy stack contents down 1994 1995 Label start_copying, next; 1996 1997 // untested("monitor stack expansion"); 1998 compute_stack_base(Rtemp); 1999 ba( false, start_copying ); 2000 delayed()->cmp( Rtemp, Rlimit); // done? duplicated below 2001 2002 // note: must copy from low memory upwards 2003 // On entry to loop, 2004 // Rtemp points to new base of stack, Lesp points to new end of stack (1 past TOS) 2005 // Loop mutates Rtemp 2006 2007 bind( next); 2008 2009 st_ptr(Rtemp2, Rtemp, 0); 2010 inc(Rtemp, wordSize); 2011 cmp(Rtemp, Rlimit); // are we done? (duplicated above) 2012 2013 bind( start_copying ); 2014 2015 brx( notEqual, true, pn, next ); 2016 delayed()->ld_ptr( Rtemp, delta, Rtemp2 ); 2017 2018 // done copying stack 2019 } 2020} 2021 2022// Locals 2023#ifdef ASSERT 2024void InterpreterMacroAssembler::verify_local_tag(frame::Tag t, 2025 Register base, 2026 Register scratch, 2027 int n) { 2028 if (TaggedStackInterpreter) { 2029 Label ok, long_ok; 2030 // Use dst for scratch 2031 assert_different_registers(base, scratch); 2032 ld_ptr(base, Interpreter::local_tag_offset_in_bytes(n), scratch); 2033 if (t == frame::TagCategory2) { 2034 cmp(scratch, G0); 2035 brx(Assembler::equal, false, Assembler::pt, long_ok); 2036 delayed()->ld_ptr(base, Interpreter::local_tag_offset_in_bytes(n+1), scratch); 2037 stop("local long/double tag value bad"); 2038 bind(long_ok); 2039 // compare second half tag 2040 cmp(scratch, G0); 2041 } else if (t == frame::TagValue) { 2042 cmp(scratch, G0); 2043 } else { 2044 assert_different_registers(O3, base, scratch); 2045 mov(t, O3); 2046 cmp(scratch, O3); 2047 } 2048 brx(Assembler::equal, false, Assembler::pt, ok); 2049 delayed()->nop(); 2050 // Also compare if the local value is zero, then the tag might 2051 // not have been set coming from deopt. 2052 ld_ptr(base, Interpreter::local_offset_in_bytes(n), scratch); 2053 cmp(scratch, G0); 2054 brx(Assembler::equal, false, Assembler::pt, ok); 2055 delayed()->nop(); 2056 stop("Local tag value is bad"); 2057 bind(ok); 2058 } 2059} 2060#endif // ASSERT 2061 2062void InterpreterMacroAssembler::access_local_ptr( Register index, Register dst ) { 2063 assert_not_delayed(); 2064 sll(index, Interpreter::logStackElementSize(), index); 2065 sub(Llocals, index, index); 2066 debug_only(verify_local_tag(frame::TagReference, index, dst)); 2067 ld_ptr(index, Interpreter::value_offset_in_bytes(), dst); 2068 // Note: index must hold the effective address--the iinc template uses it 2069} 2070 2071// Just like access_local_ptr but the tag is a returnAddress 2072void InterpreterMacroAssembler::access_local_returnAddress(Register index, 2073 Register dst ) { 2074 assert_not_delayed(); 2075 sll(index, Interpreter::logStackElementSize(), index); 2076 sub(Llocals, index, index); 2077 debug_only(verify_local_tag(frame::TagValue, index, dst)); 2078 ld_ptr(index, Interpreter::value_offset_in_bytes(), dst); 2079} 2080 2081void InterpreterMacroAssembler::access_local_int( Register index, Register dst ) { 2082 assert_not_delayed(); 2083 sll(index, Interpreter::logStackElementSize(), index); 2084 sub(Llocals, index, index); 2085 debug_only(verify_local_tag(frame::TagValue, index, dst)); 2086 ld(index, Interpreter::value_offset_in_bytes(), dst); 2087 // Note: index must hold the effective address--the iinc template uses it 2088} 2089 2090 2091void InterpreterMacroAssembler::access_local_long( Register index, Register dst ) { 2092 assert_not_delayed(); 2093 sll(index, Interpreter::logStackElementSize(), index); 2094 sub(Llocals, index, index); 2095 debug_only(verify_local_tag(frame::TagCategory2, index, dst)); 2096 // First half stored at index n+1 (which grows down from Llocals[n]) 2097 load_unaligned_long(index, Interpreter::local_offset_in_bytes(1), dst); 2098} 2099 2100 2101void InterpreterMacroAssembler::access_local_float( Register index, FloatRegister dst ) { 2102 assert_not_delayed(); 2103 sll(index, Interpreter::logStackElementSize(), index); 2104 sub(Llocals, index, index); 2105 debug_only(verify_local_tag(frame::TagValue, index, G1_scratch)); 2106 ldf(FloatRegisterImpl::S, index, Interpreter::value_offset_in_bytes(), dst); 2107} 2108 2109 2110void InterpreterMacroAssembler::access_local_double( Register index, FloatRegister dst ) { 2111 assert_not_delayed(); 2112 sll(index, Interpreter::logStackElementSize(), index); 2113 sub(Llocals, index, index); 2114 debug_only(verify_local_tag(frame::TagCategory2, index, G1_scratch)); 2115 load_unaligned_double(index, Interpreter::local_offset_in_bytes(1), dst); 2116} 2117 2118 2119#ifdef ASSERT 2120void InterpreterMacroAssembler::check_for_regarea_stomp(Register Rindex, int offset, Register Rlimit, Register Rscratch, Register Rscratch1) { 2121 Label L; 2122 2123 assert(Rindex != Rscratch, "Registers cannot be same"); 2124 assert(Rindex != Rscratch1, "Registers cannot be same"); 2125 assert(Rlimit != Rscratch, "Registers cannot be same"); 2126 assert(Rlimit != Rscratch1, "Registers cannot be same"); 2127 assert(Rscratch1 != Rscratch, "Registers cannot be same"); 2128 2129 // untested("reg area corruption"); 2130 add(Rindex, offset, Rscratch); 2131 add(Rlimit, 64 + STACK_BIAS, Rscratch1); 2132 cmp(Rscratch, Rscratch1); 2133 brx(Assembler::greaterEqualUnsigned, false, pn, L); 2134 delayed()->nop(); 2135 stop("regsave area is being clobbered"); 2136 bind(L); 2137} 2138#endif // ASSERT 2139 2140void InterpreterMacroAssembler::tag_local(frame::Tag t, 2141 Register base, 2142 Register src, 2143 int n) { 2144 if (TaggedStackInterpreter) { 2145 // have to store zero because local slots can be reused (rats!) 2146 if (t == frame::TagValue) { 2147 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n)); 2148 } else if (t == frame::TagCategory2) { 2149 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n)); 2150 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n+1)); 2151 } else { 2152 // assert that we don't stomp the value in 'src' 2153 // O3 is arbitrary because it's not used. 2154 assert_different_registers(src, base, O3); 2155 mov( t, O3); 2156 st_ptr(O3, base, Interpreter::local_tag_offset_in_bytes(n)); 2157 } 2158 } 2159} 2160 2161 2162void InterpreterMacroAssembler::store_local_int( Register index, Register src ) { 2163 assert_not_delayed(); 2164 sll(index, Interpreter::logStackElementSize(), index); 2165 sub(Llocals, index, index); 2166 debug_only(check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);) 2167 tag_local(frame::TagValue, index, src); 2168 st(src, index, Interpreter::value_offset_in_bytes()); 2169} 2170 2171void InterpreterMacroAssembler::store_local_ptr( Register index, Register src, 2172 Register tag ) { 2173 assert_not_delayed(); 2174 sll(index, Interpreter::logStackElementSize(), index); 2175 sub(Llocals, index, index); 2176 #ifdef ASSERT 2177 check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch); 2178 #endif 2179 st_ptr(src, index, Interpreter::value_offset_in_bytes()); 2180 // Store tag register directly 2181 if (TaggedStackInterpreter) { 2182 st_ptr(tag, index, Interpreter::tag_offset_in_bytes()); 2183 } 2184} 2185 2186 2187 2188void InterpreterMacroAssembler::store_local_ptr( int n, Register src, 2189 Register tag ) { 2190 st_ptr(src, Llocals, Interpreter::local_offset_in_bytes(n)); 2191 if (TaggedStackInterpreter) { 2192 st_ptr(tag, Llocals, Interpreter::local_tag_offset_in_bytes(n)); 2193 } 2194} 2195 2196void InterpreterMacroAssembler::store_local_long( Register index, Register src ) { 2197 assert_not_delayed(); 2198 sll(index, Interpreter::logStackElementSize(), index); 2199 sub(Llocals, index, index); 2200 #ifdef ASSERT 2201 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch); 2202 #endif 2203 tag_local(frame::TagCategory2, index, src); 2204 store_unaligned_long(src, index, Interpreter::local_offset_in_bytes(1)); // which is n+1 2205} 2206 2207 2208void InterpreterMacroAssembler::store_local_float( Register index, FloatRegister src ) { 2209 assert_not_delayed(); 2210 sll(index, Interpreter::logStackElementSize(), index); 2211 sub(Llocals, index, index); 2212 #ifdef ASSERT 2213 check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch); 2214 #endif 2215 tag_local(frame::TagValue, index, G1_scratch); 2216 stf(FloatRegisterImpl::S, src, index, Interpreter::value_offset_in_bytes()); 2217} 2218 2219 2220void InterpreterMacroAssembler::store_local_double( Register index, FloatRegister src ) { 2221 assert_not_delayed(); 2222 sll(index, Interpreter::logStackElementSize(), index); 2223 sub(Llocals, index, index); 2224 #ifdef ASSERT 2225 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch); 2226 #endif 2227 tag_local(frame::TagCategory2, index, G1_scratch); 2228 store_unaligned_double(src, index, Interpreter::local_offset_in_bytes(1)); 2229} 2230 2231 2232int InterpreterMacroAssembler::top_most_monitor_byte_offset() { 2233 const jint delta = frame::interpreter_frame_monitor_size() * wordSize; 2234 int rounded_vm_local_words = ::round_to(frame::interpreter_frame_vm_local_words, WordsPerLong); 2235 return ((-rounded_vm_local_words * wordSize) - delta ) + STACK_BIAS; 2236} 2237 2238 2239Address InterpreterMacroAssembler::top_most_monitor() { 2240 return Address(FP, 0, top_most_monitor_byte_offset()); 2241} 2242 2243 2244void InterpreterMacroAssembler::compute_stack_base( Register Rdest ) { 2245 add( Lesp, wordSize, Rdest ); 2246} 2247 2248#endif /* CC_INTERP */ 2249 2250void InterpreterMacroAssembler::increment_invocation_counter( Register Rtmp, Register Rtmp2 ) { 2251 assert(UseCompiler, "incrementing must be useful"); 2252#ifdef CC_INTERP 2253 Address inv_counter(G5_method, 0, in_bytes(methodOopDesc::invocation_counter_offset() 2254 + InvocationCounter::counter_offset())); 2255 Address be_counter(G5_method, 0, in_bytes(methodOopDesc::backedge_counter_offset() 2256 + InvocationCounter::counter_offset())); 2257#else 2258 Address inv_counter(Lmethod, 0, in_bytes(methodOopDesc::invocation_counter_offset() 2259 + InvocationCounter::counter_offset())); 2260 Address be_counter(Lmethod, 0, in_bytes(methodOopDesc::backedge_counter_offset() 2261 + InvocationCounter::counter_offset())); 2262#endif /* CC_INTERP */ 2263 int delta = InvocationCounter::count_increment; 2264 2265 // Load each counter in a register 2266 ld( inv_counter, Rtmp ); 2267 ld( be_counter, Rtmp2 ); 2268 2269 assert( is_simm13( delta ), " delta too large."); 2270 2271 // Add the delta to the invocation counter and store the result 2272 add( Rtmp, delta, Rtmp ); 2273 2274 // Mask the backedge counter 2275 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 ); 2276 2277 // Store value 2278 st( Rtmp, inv_counter); 2279 2280 // Add invocation counter + backedge counter 2281 add( Rtmp, Rtmp2, Rtmp); 2282 2283 // Note that this macro must leave the backedge_count + invocation_count in Rtmp! 2284} 2285 2286void InterpreterMacroAssembler::increment_backedge_counter( Register Rtmp, Register Rtmp2 ) { 2287 assert(UseCompiler, "incrementing must be useful"); 2288#ifdef CC_INTERP 2289 Address be_counter(G5_method, 0, in_bytes(methodOopDesc::backedge_counter_offset() 2290 + InvocationCounter::counter_offset())); 2291 Address inv_counter(G5_method, 0, in_bytes(methodOopDesc::invocation_counter_offset() 2292 + InvocationCounter::counter_offset())); 2293#else 2294 Address be_counter(Lmethod, 0, in_bytes(methodOopDesc::backedge_counter_offset() 2295 + InvocationCounter::counter_offset())); 2296 Address inv_counter(Lmethod, 0, in_bytes(methodOopDesc::invocation_counter_offset() 2297 + InvocationCounter::counter_offset())); 2298#endif /* CC_INTERP */ 2299 int delta = InvocationCounter::count_increment; 2300 // Load each counter in a register 2301 ld( be_counter, Rtmp ); 2302 ld( inv_counter, Rtmp2 ); 2303 2304 // Add the delta to the backedge counter 2305 add( Rtmp, delta, Rtmp ); 2306 2307 // Mask the invocation counter, add to backedge counter 2308 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 ); 2309 2310 // and store the result to memory 2311 st( Rtmp, be_counter ); 2312 2313 // Add backedge + invocation counter 2314 add( Rtmp, Rtmp2, Rtmp ); 2315 2316 // Note that this macro must leave backedge_count + invocation_count in Rtmp! 2317} 2318 2319#ifndef CC_INTERP 2320void InterpreterMacroAssembler::test_backedge_count_for_osr( Register backedge_count, 2321 Register branch_bcp, 2322 Register Rtmp ) { 2323 Label did_not_overflow; 2324 Label overflow_with_error; 2325 assert_different_registers(backedge_count, Rtmp, branch_bcp); 2326 assert(UseOnStackReplacement,"Must UseOnStackReplacement to test_backedge_count_for_osr"); 2327 2328 Address limit(Rtmp, address(&InvocationCounter::InterpreterBackwardBranchLimit)); 2329 load_contents(limit, Rtmp); 2330 cmp(backedge_count, Rtmp); 2331 br(Assembler::lessUnsigned, false, Assembler::pt, did_not_overflow); 2332 delayed()->nop(); 2333 2334 // When ProfileInterpreter is on, the backedge_count comes from the 2335 // methodDataOop, which value does not get reset on the call to 2336 // frequency_counter_overflow(). To avoid excessive calls to the overflow 2337 // routine while the method is being compiled, add a second test to make sure 2338 // the overflow function is called only once every overflow_frequency. 2339 if (ProfileInterpreter) { 2340 const int overflow_frequency = 1024; 2341 andcc(backedge_count, overflow_frequency-1, Rtmp); 2342 brx(Assembler::notZero, false, Assembler::pt, did_not_overflow); 2343 delayed()->nop(); 2344 } 2345 2346 // overflow in loop, pass branch bytecode 2347 set(6,Rtmp); 2348 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), branch_bcp, Rtmp); 2349 2350 // Was an OSR adapter generated? 2351 // O0 = osr nmethod 2352 tst(O0); 2353 brx(Assembler::zero, false, Assembler::pn, overflow_with_error); 2354 delayed()->nop(); 2355 2356 // Has the nmethod been invalidated already? 2357 ld(O0, nmethod::entry_bci_offset(), O2); 2358 cmp(O2, InvalidOSREntryBci); 2359 br(Assembler::equal, false, Assembler::pn, overflow_with_error); 2360 delayed()->nop(); 2361 2362 // migrate the interpreter frame off of the stack 2363 2364 mov(G2_thread, L7); 2365 // save nmethod 2366 mov(O0, L6); 2367 set_last_Java_frame(SP, noreg); 2368 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_begin), L7); 2369 reset_last_Java_frame(); 2370 mov(L7, G2_thread); 2371 2372 // move OSR nmethod to I1 2373 mov(L6, I1); 2374 2375 // OSR buffer to I0 2376 mov(O0, I0); 2377 2378 // remove the interpreter frame 2379 restore(I5_savedSP, 0, SP); 2380 2381 // Jump to the osr code. 2382 ld_ptr(O1, nmethod::osr_entry_point_offset(), O2); 2383 jmp(O2, G0); 2384 delayed()->nop(); 2385 2386 bind(overflow_with_error); 2387 2388 bind(did_not_overflow); 2389} 2390 2391 2392 2393void InterpreterMacroAssembler::interp_verify_oop(Register reg, TosState state, const char * file, int line) { 2394 if (state == atos) { MacroAssembler::_verify_oop(reg, "broken oop ", file, line); } 2395} 2396 2397 2398// local helper function for the verify_oop_or_return_address macro 2399static bool verify_return_address(methodOopDesc* m, int bci) { 2400#ifndef PRODUCT 2401 address pc = (address)(m->constMethod()) 2402 + in_bytes(constMethodOopDesc::codes_offset()) + bci; 2403 // assume it is a valid return address if it is inside m and is preceded by a jsr 2404 if (!m->contains(pc)) return false; 2405 address jsr_pc; 2406 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr); 2407 if (*jsr_pc == Bytecodes::_jsr && jsr_pc >= m->code_base()) return true; 2408 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr_w); 2409 if (*jsr_pc == Bytecodes::_jsr_w && jsr_pc >= m->code_base()) return true; 2410#endif // PRODUCT 2411 return false; 2412} 2413 2414 2415void InterpreterMacroAssembler::verify_oop_or_return_address(Register reg, Register Rtmp) { 2416 if (!VerifyOops) return; 2417 // the VM documentation for the astore[_wide] bytecode allows 2418 // the TOS to be not only an oop but also a return address 2419 Label test; 2420 Label skip; 2421 // See if it is an address (in the current method): 2422 2423 mov(reg, Rtmp); 2424 const int log2_bytecode_size_limit = 16; 2425 srl(Rtmp, log2_bytecode_size_limit, Rtmp); 2426 br_notnull( Rtmp, false, pt, test ); 2427 delayed()->nop(); 2428 2429 // %%% should use call_VM_leaf here? 2430 save_frame_and_mov(0, Lmethod, O0, reg, O1); 2431 save_thread(L7_thread_cache); 2432 call(CAST_FROM_FN_PTR(address,verify_return_address), relocInfo::none); 2433 delayed()->nop(); 2434 restore_thread(L7_thread_cache); 2435 br_notnull( O0, false, pt, skip ); 2436 delayed()->restore(); 2437 2438 // Perform a more elaborate out-of-line call 2439 // Not an address; verify it: 2440 bind(test); 2441 verify_oop(reg); 2442 bind(skip); 2443} 2444 2445 2446void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) { 2447 if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth); 2448} 2449#endif /* CC_INTERP */ 2450 2451// Inline assembly for: 2452// 2453// if (thread is in interp_only_mode) { 2454// InterpreterRuntime::post_method_entry(); 2455// } 2456// if (DTraceMethodProbes) { 2457// SharedRuntime::dtrace_method_entry(method, reciever); 2458// } 2459 2460void InterpreterMacroAssembler::notify_method_entry() { 2461 2462 // C++ interpreter only uses this for native methods. 2463 2464 // Whenever JVMTI puts a thread in interp_only_mode, method 2465 // entry/exit events are sent for that thread to track stack 2466 // depth. If it is possible to enter interp_only_mode we add 2467 // the code to check if the event should be sent. 2468 if (JvmtiExport::can_post_interpreter_events()) { 2469 Label L; 2470 Register temp_reg = O5; 2471 2472 const Address interp_only (G2_thread, 0, in_bytes(JavaThread::interp_only_mode_offset())); 2473 2474 ld(interp_only, temp_reg); 2475 tst(temp_reg); 2476 br(zero, false, pt, L); 2477 delayed()->nop(); 2478 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_entry)); 2479 bind(L); 2480 } 2481 2482 { 2483 Register temp_reg = O5; 2484 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero); 2485 call_VM_leaf(noreg, 2486 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), 2487 G2_thread, Lmethod); 2488 } 2489} 2490 2491 2492// Inline assembly for: 2493// 2494// if (thread is in interp_only_mode) { 2495// // save result 2496// InterpreterRuntime::post_method_exit(); 2497// // restore result 2498// } 2499// if (DTraceMethodProbes) { 2500// SharedRuntime::dtrace_method_exit(thread, method); 2501// } 2502// 2503// Native methods have their result stored in d_tmp and l_tmp 2504// Java methods have their result stored in the expression stack 2505 2506void InterpreterMacroAssembler::notify_method_exit(bool is_native_method, 2507 TosState state, 2508 NotifyMethodExitMode mode) { 2509 // C++ interpreter only uses this for native methods. 2510 2511 // Whenever JVMTI puts a thread in interp_only_mode, method 2512 // entry/exit events are sent for that thread to track stack 2513 // depth. If it is possible to enter interp_only_mode we add 2514 // the code to check if the event should be sent. 2515 if (mode == NotifyJVMTI && JvmtiExport::can_post_interpreter_events()) { 2516 Label L; 2517 Register temp_reg = O5; 2518 2519 const Address interp_only (G2_thread, 0, in_bytes(JavaThread::interp_only_mode_offset())); 2520 2521 ld(interp_only, temp_reg); 2522 tst(temp_reg); 2523 br(zero, false, pt, L); 2524 delayed()->nop(); 2525 2526 // Note: frame::interpreter_frame_result has a dependency on how the 2527 // method result is saved across the call to post_method_exit. For 2528 // native methods it assumes the result registers are saved to 2529 // l_scratch and d_scratch. If this changes then the interpreter_frame_result 2530 // implementation will need to be updated too. 2531 2532 save_return_value(state, is_native_method); 2533 call_VM(noreg, 2534 CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_exit)); 2535 restore_return_value(state, is_native_method); 2536 bind(L); 2537 } 2538 2539 { 2540 Register temp_reg = O5; 2541 // Dtrace notification 2542 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero); 2543 save_return_value(state, is_native_method); 2544 call_VM_leaf( 2545 noreg, 2546 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), 2547 G2_thread, Lmethod); 2548 restore_return_value(state, is_native_method); 2549 } 2550} 2551 2552void InterpreterMacroAssembler::save_return_value(TosState state, bool is_native_call) { 2553#ifdef CC_INTERP 2554 // result potentially in O0/O1: save it across calls 2555 stf(FloatRegisterImpl::D, F0, STATE(_native_fresult)); 2556#ifdef _LP64 2557 stx(O0, STATE(_native_lresult)); 2558#else 2559 std(O0, STATE(_native_lresult)); 2560#endif 2561#else // CC_INTERP 2562 if (is_native_call) { 2563 stf(FloatRegisterImpl::D, F0, d_tmp); 2564#ifdef _LP64 2565 stx(O0, l_tmp); 2566#else 2567 std(O0, l_tmp); 2568#endif 2569 } else { 2570 push(state); 2571 } 2572#endif // CC_INTERP 2573} 2574 2575void InterpreterMacroAssembler::restore_return_value( TosState state, bool is_native_call) { 2576#ifdef CC_INTERP 2577 ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0); 2578#ifdef _LP64 2579 ldx(STATE(_native_lresult), O0); 2580#else 2581 ldd(STATE(_native_lresult), O0); 2582#endif 2583#else // CC_INTERP 2584 if (is_native_call) { 2585 ldf(FloatRegisterImpl::D, d_tmp, F0); 2586#ifdef _LP64 2587 ldx(l_tmp, O0); 2588#else 2589 ldd(l_tmp, O0); 2590#endif 2591 } else { 2592 pop(state); 2593 } 2594#endif // CC_INTERP 2595} 2596