sharedRuntime_ppc.cpp revision 5990:b0133e4187d3
1/* 2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. 3 * Copyright 2012, 2013 SAP AG. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26#include "precompiled.hpp" 27#include "asm/macroAssembler.inline.hpp" 28#include "code/debugInfoRec.hpp" 29#include "code/icBuffer.hpp" 30#include "code/vtableStubs.hpp" 31#include "interpreter/interpreter.hpp" 32#include "oops/compiledICHolder.hpp" 33#include "prims/jvmtiRedefineClassesTrace.hpp" 34#include "runtime/sharedRuntime.hpp" 35#include "runtime/vframeArray.hpp" 36#include "vmreg_ppc.inline.hpp" 37#ifdef COMPILER1 38#include "c1/c1_Runtime1.hpp" 39#endif 40#ifdef COMPILER2 41#include "opto/runtime.hpp" 42#endif 43 44#define __ masm-> 45 46#ifdef PRODUCT 47#define BLOCK_COMMENT(str) // nothing 48#else 49#define BLOCK_COMMENT(str) __ block_comment(str) 50#endif 51 52#define BIND(label) bind(label); BLOCK_COMMENT(#label ":") 53 54 55// Used by generate_deopt_blob. Defined in .ad file. 56extern uint size_deopt_handler(); 57 58 59class RegisterSaver { 60 // Used for saving volatile registers. 61 public: 62 63 // Support different return pc locations. 64 enum ReturnPCLocation { 65 return_pc_is_lr, 66 return_pc_is_r4, 67 return_pc_is_thread_saved_exception_pc 68 }; 69 70 static OopMap* push_frame_abi112_and_save_live_registers(MacroAssembler* masm, 71 int* out_frame_size_in_bytes, 72 bool generate_oop_map, 73 int return_pc_adjustment, 74 ReturnPCLocation return_pc_location); 75 static void restore_live_registers_and_pop_frame(MacroAssembler* masm, 76 int frame_size_in_bytes, 77 bool restore_ctr); 78 79 static void push_frame_and_save_argument_registers(MacroAssembler* masm, 80 Register r_temp, 81 int frame_size, 82 int total_args, 83 const VMRegPair *regs, const VMRegPair *regs2 = NULL); 84 static void restore_argument_registers_and_pop_frame(MacroAssembler*masm, 85 int frame_size, 86 int total_args, 87 const VMRegPair *regs, const VMRegPair *regs2 = NULL); 88 89 // During deoptimization only the result registers need to be restored 90 // all the other values have already been extracted. 91 static void restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes); 92 93 // Constants and data structures: 94 95 typedef enum { 96 int_reg = 0, 97 float_reg = 1, 98 special_reg = 2 99 } RegisterType; 100 101 typedef enum { 102 reg_size = 8, 103 half_reg_size = reg_size / 2, 104 } RegisterConstants; 105 106 typedef struct { 107 RegisterType reg_type; 108 int reg_num; 109 VMReg vmreg; 110 } LiveRegType; 111}; 112 113 114#define RegisterSaver_LiveSpecialReg(regname) \ 115 { RegisterSaver::special_reg, regname->encoding(), regname->as_VMReg() } 116 117#define RegisterSaver_LiveIntReg(regname) \ 118 { RegisterSaver::int_reg, regname->encoding(), regname->as_VMReg() } 119 120#define RegisterSaver_LiveFloatReg(regname) \ 121 { RegisterSaver::float_reg, regname->encoding(), regname->as_VMReg() } 122 123static const RegisterSaver::LiveRegType RegisterSaver_LiveRegs[] = { 124 // Live registers which get spilled to the stack. Register 125 // positions in this array correspond directly to the stack layout. 126 127 // 128 // live special registers: 129 // 130 RegisterSaver_LiveSpecialReg(SR_CTR), 131 // 132 // live float registers: 133 // 134 RegisterSaver_LiveFloatReg( F0 ), 135 RegisterSaver_LiveFloatReg( F1 ), 136 RegisterSaver_LiveFloatReg( F2 ), 137 RegisterSaver_LiveFloatReg( F3 ), 138 RegisterSaver_LiveFloatReg( F4 ), 139 RegisterSaver_LiveFloatReg( F5 ), 140 RegisterSaver_LiveFloatReg( F6 ), 141 RegisterSaver_LiveFloatReg( F7 ), 142 RegisterSaver_LiveFloatReg( F8 ), 143 RegisterSaver_LiveFloatReg( F9 ), 144 RegisterSaver_LiveFloatReg( F10 ), 145 RegisterSaver_LiveFloatReg( F11 ), 146 RegisterSaver_LiveFloatReg( F12 ), 147 RegisterSaver_LiveFloatReg( F13 ), 148 RegisterSaver_LiveFloatReg( F14 ), 149 RegisterSaver_LiveFloatReg( F15 ), 150 RegisterSaver_LiveFloatReg( F16 ), 151 RegisterSaver_LiveFloatReg( F17 ), 152 RegisterSaver_LiveFloatReg( F18 ), 153 RegisterSaver_LiveFloatReg( F19 ), 154 RegisterSaver_LiveFloatReg( F20 ), 155 RegisterSaver_LiveFloatReg( F21 ), 156 RegisterSaver_LiveFloatReg( F22 ), 157 RegisterSaver_LiveFloatReg( F23 ), 158 RegisterSaver_LiveFloatReg( F24 ), 159 RegisterSaver_LiveFloatReg( F25 ), 160 RegisterSaver_LiveFloatReg( F26 ), 161 RegisterSaver_LiveFloatReg( F27 ), 162 RegisterSaver_LiveFloatReg( F28 ), 163 RegisterSaver_LiveFloatReg( F29 ), 164 RegisterSaver_LiveFloatReg( F30 ), 165 RegisterSaver_LiveFloatReg( F31 ), 166 // 167 // live integer registers: 168 // 169 RegisterSaver_LiveIntReg( R0 ), 170 //RegisterSaver_LiveIntReg( R1 ), // stack pointer 171 RegisterSaver_LiveIntReg( R2 ), 172 RegisterSaver_LiveIntReg( R3 ), 173 RegisterSaver_LiveIntReg( R4 ), 174 RegisterSaver_LiveIntReg( R5 ), 175 RegisterSaver_LiveIntReg( R6 ), 176 RegisterSaver_LiveIntReg( R7 ), 177 RegisterSaver_LiveIntReg( R8 ), 178 RegisterSaver_LiveIntReg( R9 ), 179 RegisterSaver_LiveIntReg( R10 ), 180 RegisterSaver_LiveIntReg( R11 ), 181 RegisterSaver_LiveIntReg( R12 ), 182 //RegisterSaver_LiveIntReg( R13 ), // system thread id 183 RegisterSaver_LiveIntReg( R14 ), 184 RegisterSaver_LiveIntReg( R15 ), 185 RegisterSaver_LiveIntReg( R16 ), 186 RegisterSaver_LiveIntReg( R17 ), 187 RegisterSaver_LiveIntReg( R18 ), 188 RegisterSaver_LiveIntReg( R19 ), 189 RegisterSaver_LiveIntReg( R20 ), 190 RegisterSaver_LiveIntReg( R21 ), 191 RegisterSaver_LiveIntReg( R22 ), 192 RegisterSaver_LiveIntReg( R23 ), 193 RegisterSaver_LiveIntReg( R24 ), 194 RegisterSaver_LiveIntReg( R25 ), 195 RegisterSaver_LiveIntReg( R26 ), 196 RegisterSaver_LiveIntReg( R27 ), 197 RegisterSaver_LiveIntReg( R28 ), 198 RegisterSaver_LiveIntReg( R29 ), 199 RegisterSaver_LiveIntReg( R31 ), 200 RegisterSaver_LiveIntReg( R30 ), // r30 must be the last register 201}; 202 203OopMap* RegisterSaver::push_frame_abi112_and_save_live_registers(MacroAssembler* masm, 204 int* out_frame_size_in_bytes, 205 bool generate_oop_map, 206 int return_pc_adjustment, 207 ReturnPCLocation return_pc_location) { 208 // Push an abi112-frame and store all registers which may be live. 209 // If requested, create an OopMap: Record volatile registers as 210 // callee-save values in an OopMap so their save locations will be 211 // propagated to the RegisterMap of the caller frame during 212 // StackFrameStream construction (needed for deoptimization; see 213 // compiledVFrame::create_stack_value). 214 // If return_pc_adjustment != 0 adjust the return pc by return_pc_adjustment. 215 216 int i; 217 int offset; 218 219 // calcualte frame size 220 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) / 221 sizeof(RegisterSaver::LiveRegType); 222 const int register_save_size = regstosave_num * reg_size; 223 const int frame_size_in_bytes = round_to(register_save_size, frame::alignment_in_bytes) 224 + frame::abi_112_size; 225 *out_frame_size_in_bytes = frame_size_in_bytes; 226 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint); 227 const int register_save_offset = frame_size_in_bytes - register_save_size; 228 229 // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words. 230 OopMap* map = generate_oop_map ? new OopMap(frame_size_in_slots, 0) : NULL; 231 232 BLOCK_COMMENT("push_frame_abi112_and_save_live_registers {"); 233 234 // Save r30 in the last slot of the not yet pushed frame so that we 235 // can use it as scratch reg. 236 __ std(R30, -reg_size, R1_SP); 237 assert(-reg_size == register_save_offset - frame_size_in_bytes + ((regstosave_num-1)*reg_size), 238 "consistency check"); 239 240 // save the flags 241 // Do the save_LR_CR by hand and adjust the return pc if requested. 242 __ mfcr(R30); 243 __ std(R30, _abi(cr), R1_SP); 244 switch (return_pc_location) { 245 case return_pc_is_lr: __ mflr(R30); break; 246 case return_pc_is_r4: __ mr(R30, R4); break; 247 case return_pc_is_thread_saved_exception_pc: 248 __ ld(R30, thread_(saved_exception_pc)); break; 249 default: ShouldNotReachHere(); 250 } 251 if (return_pc_adjustment != 0) 252 __ addi(R30, R30, return_pc_adjustment); 253 __ std(R30, _abi(lr), R1_SP); 254 255 // push a new frame 256 __ push_frame(frame_size_in_bytes, R30); 257 258 // save all registers (ints and floats) 259 offset = register_save_offset; 260 for (int i = 0; i < regstosave_num; i++) { 261 int reg_num = RegisterSaver_LiveRegs[i].reg_num; 262 int reg_type = RegisterSaver_LiveRegs[i].reg_type; 263 264 switch (reg_type) { 265 case RegisterSaver::int_reg: { 266 if (reg_num != 30) { // We spilled R30 right at the beginning. 267 __ std(as_Register(reg_num), offset, R1_SP); 268 } 269 break; 270 } 271 case RegisterSaver::float_reg: { 272 __ stfd(as_FloatRegister(reg_num), offset, R1_SP); 273 break; 274 } 275 case RegisterSaver::special_reg: { 276 if (reg_num == SR_CTR_SpecialRegisterEnumValue) { 277 __ mfctr(R30); 278 __ std(R30, offset, R1_SP); 279 } else { 280 Unimplemented(); 281 } 282 break; 283 } 284 default: 285 ShouldNotReachHere(); 286 } 287 288 if (generate_oop_map) { 289 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2), 290 RegisterSaver_LiveRegs[i].vmreg); 291 map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size)>>2), 292 RegisterSaver_LiveRegs[i].vmreg->next()); 293 } 294 offset += reg_size; 295 } 296 297 BLOCK_COMMENT("} push_frame_abi112_and_save_live_registers"); 298 299 // And we're done. 300 return map; 301} 302 303 304// Pop the current frame and restore all the registers that we 305// saved. 306void RegisterSaver::restore_live_registers_and_pop_frame(MacroAssembler* masm, 307 int frame_size_in_bytes, 308 bool restore_ctr) { 309 int i; 310 int offset; 311 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) / 312 sizeof(RegisterSaver::LiveRegType); 313 const int register_save_size = regstosave_num * reg_size; 314 const int register_save_offset = frame_size_in_bytes - register_save_size; 315 316 BLOCK_COMMENT("restore_live_registers_and_pop_frame {"); 317 318 // restore all registers (ints and floats) 319 offset = register_save_offset; 320 for (int i = 0; i < regstosave_num; i++) { 321 int reg_num = RegisterSaver_LiveRegs[i].reg_num; 322 int reg_type = RegisterSaver_LiveRegs[i].reg_type; 323 324 switch (reg_type) { 325 case RegisterSaver::int_reg: { 326 if (reg_num != 30) // R30 restored at the end, it's the tmp reg! 327 __ ld(as_Register(reg_num), offset, R1_SP); 328 break; 329 } 330 case RegisterSaver::float_reg: { 331 __ lfd(as_FloatRegister(reg_num), offset, R1_SP); 332 break; 333 } 334 case RegisterSaver::special_reg: { 335 if (reg_num == SR_CTR_SpecialRegisterEnumValue) { 336 if (restore_ctr) { // Nothing to do here if ctr already contains the next address. 337 __ ld(R30, offset, R1_SP); 338 __ mtctr(R30); 339 } 340 } else { 341 Unimplemented(); 342 } 343 break; 344 } 345 default: 346 ShouldNotReachHere(); 347 } 348 offset += reg_size; 349 } 350 351 // pop the frame 352 __ pop_frame(); 353 354 // restore the flags 355 __ restore_LR_CR(R30); 356 357 // restore scratch register's value 358 __ ld(R30, -reg_size, R1_SP); 359 360 BLOCK_COMMENT("} restore_live_registers_and_pop_frame"); 361} 362 363void RegisterSaver::push_frame_and_save_argument_registers(MacroAssembler* masm, Register r_temp, 364 int frame_size,int total_args, const VMRegPair *regs, 365 const VMRegPair *regs2) { 366 __ push_frame(frame_size, r_temp); 367 int st_off = frame_size - wordSize; 368 for (int i = 0; i < total_args; i++) { 369 VMReg r_1 = regs[i].first(); 370 VMReg r_2 = regs[i].second(); 371 if (!r_1->is_valid()) { 372 assert(!r_2->is_valid(), ""); 373 continue; 374 } 375 if (r_1->is_Register()) { 376 Register r = r_1->as_Register(); 377 __ std(r, st_off, R1_SP); 378 st_off -= wordSize; 379 } else if (r_1->is_FloatRegister()) { 380 FloatRegister f = r_1->as_FloatRegister(); 381 __ stfd(f, st_off, R1_SP); 382 st_off -= wordSize; 383 } 384 } 385 if (regs2 != NULL) { 386 for (int i = 0; i < total_args; i++) { 387 VMReg r_1 = regs2[i].first(); 388 VMReg r_2 = regs2[i].second(); 389 if (!r_1->is_valid()) { 390 assert(!r_2->is_valid(), ""); 391 continue; 392 } 393 if (r_1->is_Register()) { 394 Register r = r_1->as_Register(); 395 __ std(r, st_off, R1_SP); 396 st_off -= wordSize; 397 } else if (r_1->is_FloatRegister()) { 398 FloatRegister f = r_1->as_FloatRegister(); 399 __ stfd(f, st_off, R1_SP); 400 st_off -= wordSize; 401 } 402 } 403 } 404} 405 406void RegisterSaver::restore_argument_registers_and_pop_frame(MacroAssembler*masm, int frame_size, 407 int total_args, const VMRegPair *regs, 408 const VMRegPair *regs2) { 409 int st_off = frame_size - wordSize; 410 for (int i = 0; i < total_args; i++) { 411 VMReg r_1 = regs[i].first(); 412 VMReg r_2 = regs[i].second(); 413 if (r_1->is_Register()) { 414 Register r = r_1->as_Register(); 415 __ ld(r, st_off, R1_SP); 416 st_off -= wordSize; 417 } else if (r_1->is_FloatRegister()) { 418 FloatRegister f = r_1->as_FloatRegister(); 419 __ lfd(f, st_off, R1_SP); 420 st_off -= wordSize; 421 } 422 } 423 if (regs2 != NULL) 424 for (int i = 0; i < total_args; i++) { 425 VMReg r_1 = regs2[i].first(); 426 VMReg r_2 = regs2[i].second(); 427 if (r_1->is_Register()) { 428 Register r = r_1->as_Register(); 429 __ ld(r, st_off, R1_SP); 430 st_off -= wordSize; 431 } else if (r_1->is_FloatRegister()) { 432 FloatRegister f = r_1->as_FloatRegister(); 433 __ lfd(f, st_off, R1_SP); 434 st_off -= wordSize; 435 } 436 } 437 __ pop_frame(); 438} 439 440// Restore the registers that might be holding a result. 441void RegisterSaver::restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes) { 442 int i; 443 int offset; 444 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) / 445 sizeof(RegisterSaver::LiveRegType); 446 const int register_save_size = regstosave_num * reg_size; 447 const int register_save_offset = frame_size_in_bytes - register_save_size; 448 449 // restore all result registers (ints and floats) 450 offset = register_save_offset; 451 for (int i = 0; i < regstosave_num; i++) { 452 int reg_num = RegisterSaver_LiveRegs[i].reg_num; 453 int reg_type = RegisterSaver_LiveRegs[i].reg_type; 454 switch (reg_type) { 455 case RegisterSaver::int_reg: { 456 if (as_Register(reg_num)==R3_RET) // int result_reg 457 __ ld(as_Register(reg_num), offset, R1_SP); 458 break; 459 } 460 case RegisterSaver::float_reg: { 461 if (as_FloatRegister(reg_num)==F1_RET) // float result_reg 462 __ lfd(as_FloatRegister(reg_num), offset, R1_SP); 463 break; 464 } 465 case RegisterSaver::special_reg: { 466 // Special registers don't hold a result. 467 break; 468 } 469 default: 470 ShouldNotReachHere(); 471 } 472 offset += reg_size; 473 } 474} 475 476// Is vector's size (in bytes) bigger than a size saved by default? 477bool SharedRuntime::is_wide_vector(int size) { 478 ResourceMark rm; 479 // Note, MaxVectorSize == 8 on PPC64. 480 assert(size <= 8, err_msg_res("%d bytes vectors are not supported", size)); 481 return size > 8; 482} 483#ifdef COMPILER2 484static int reg2slot(VMReg r) { 485 return r->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 486} 487 488static int reg2offset(VMReg r) { 489 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 490} 491#endif 492 493// --------------------------------------------------------------------------- 494// Read the array of BasicTypes from a signature, and compute where the 495// arguments should go. Values in the VMRegPair regs array refer to 4-byte 496// quantities. Values less than VMRegImpl::stack0 are registers, those above 497// refer to 4-byte stack slots. All stack slots are based off of the stack pointer 498// as framesizes are fixed. 499// VMRegImpl::stack0 refers to the first slot 0(sp). 500// and VMRegImpl::stack0+1 refers to the memory word 4-bytes higher. Register 501// up to RegisterImpl::number_of_registers) are the 64-bit 502// integer registers. 503 504// Note: the INPUTS in sig_bt are in units of Java argument words, which are 505// either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit 506// units regardless of build. Of course for i486 there is no 64 bit build 507 508// The Java calling convention is a "shifted" version of the C ABI. 509// By skipping the first C ABI register we can call non-static jni methods 510// with small numbers of arguments without having to shuffle the arguments 511// at all. Since we control the java ABI we ought to at least get some 512// advantage out of it. 513 514const VMReg java_iarg_reg[8] = { 515 R3->as_VMReg(), 516 R4->as_VMReg(), 517 R5->as_VMReg(), 518 R6->as_VMReg(), 519 R7->as_VMReg(), 520 R8->as_VMReg(), 521 R9->as_VMReg(), 522 R10->as_VMReg() 523}; 524 525const VMReg java_farg_reg[13] = { 526 F1->as_VMReg(), 527 F2->as_VMReg(), 528 F3->as_VMReg(), 529 F4->as_VMReg(), 530 F5->as_VMReg(), 531 F6->as_VMReg(), 532 F7->as_VMReg(), 533 F8->as_VMReg(), 534 F9->as_VMReg(), 535 F10->as_VMReg(), 536 F11->as_VMReg(), 537 F12->as_VMReg(), 538 F13->as_VMReg() 539}; 540 541const int num_java_iarg_registers = sizeof(java_iarg_reg) / sizeof(java_iarg_reg[0]); 542const int num_java_farg_registers = sizeof(java_farg_reg) / sizeof(java_farg_reg[0]); 543 544int SharedRuntime::java_calling_convention(const BasicType *sig_bt, 545 VMRegPair *regs, 546 int total_args_passed, 547 int is_outgoing) { 548 // C2c calling conventions for compiled-compiled calls. 549 // Put 8 ints/longs into registers _AND_ 13 float/doubles into 550 // registers _AND_ put the rest on the stack. 551 552 const int inc_stk_for_intfloat = 1; // 1 slots for ints and floats 553 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles 554 555 int i; 556 VMReg reg; 557 int stk = 0; 558 int ireg = 0; 559 int freg = 0; 560 561 // We put the first 8 arguments into registers and the rest on the 562 // stack, float arguments are already in their argument registers 563 // due to c2c calling conventions (see calling_convention). 564 for (int i = 0; i < total_args_passed; ++i) { 565 switch(sig_bt[i]) { 566 case T_BOOLEAN: 567 case T_CHAR: 568 case T_BYTE: 569 case T_SHORT: 570 case T_INT: 571 if (ireg < num_java_iarg_registers) { 572 // Put int/ptr in register 573 reg = java_iarg_reg[ireg]; 574 ++ireg; 575 } else { 576 // Put int/ptr on stack. 577 reg = VMRegImpl::stack2reg(stk); 578 stk += inc_stk_for_intfloat; 579 } 580 regs[i].set1(reg); 581 break; 582 case T_LONG: 583 assert(sig_bt[i+1] == T_VOID, "expecting half"); 584 if (ireg < num_java_iarg_registers) { 585 // Put long in register. 586 reg = java_iarg_reg[ireg]; 587 ++ireg; 588 } else { 589 // Put long on stack. They must be aligned to 2 slots. 590 if (stk & 0x1) ++stk; 591 reg = VMRegImpl::stack2reg(stk); 592 stk += inc_stk_for_longdouble; 593 } 594 regs[i].set2(reg); 595 break; 596 case T_OBJECT: 597 case T_ARRAY: 598 case T_ADDRESS: 599 if (ireg < num_java_iarg_registers) { 600 // Put ptr in register. 601 reg = java_iarg_reg[ireg]; 602 ++ireg; 603 } else { 604 // Put ptr on stack. Objects must be aligned to 2 slots too, 605 // because "64-bit pointers record oop-ishness on 2 aligned 606 // adjacent registers." (see OopFlow::build_oop_map). 607 if (stk & 0x1) ++stk; 608 reg = VMRegImpl::stack2reg(stk); 609 stk += inc_stk_for_longdouble; 610 } 611 regs[i].set2(reg); 612 break; 613 case T_FLOAT: 614 if (freg < num_java_farg_registers) { 615 // Put float in register. 616 reg = java_farg_reg[freg]; 617 ++freg; 618 } else { 619 // Put float on stack. 620 reg = VMRegImpl::stack2reg(stk); 621 stk += inc_stk_for_intfloat; 622 } 623 regs[i].set1(reg); 624 break; 625 case T_DOUBLE: 626 assert(sig_bt[i+1] == T_VOID, "expecting half"); 627 if (freg < num_java_farg_registers) { 628 // Put double in register. 629 reg = java_farg_reg[freg]; 630 ++freg; 631 } else { 632 // Put double on stack. They must be aligned to 2 slots. 633 if (stk & 0x1) ++stk; 634 reg = VMRegImpl::stack2reg(stk); 635 stk += inc_stk_for_longdouble; 636 } 637 regs[i].set2(reg); 638 break; 639 case T_VOID: 640 // Do not count halves. 641 regs[i].set_bad(); 642 break; 643 default: 644 ShouldNotReachHere(); 645 } 646 } 647 return round_to(stk, 2); 648} 649 650#ifdef COMPILER2 651// Calling convention for calling C code. 652int SharedRuntime::c_calling_convention(const BasicType *sig_bt, 653 VMRegPair *regs, 654 VMRegPair *regs2, 655 int total_args_passed) { 656 // Calling conventions for C runtime calls and calls to JNI native methods. 657 // 658 // PPC64 convention: Hoist the first 8 int/ptr/long's in the first 8 659 // int regs, leaving int regs undefined if the arg is flt/dbl. Hoist 660 // the first 13 flt/dbl's in the first 13 fp regs but additionally 661 // copy flt/dbl to the stack if they are beyond the 8th argument. 662 663 const VMReg iarg_reg[8] = { 664 R3->as_VMReg(), 665 R4->as_VMReg(), 666 R5->as_VMReg(), 667 R6->as_VMReg(), 668 R7->as_VMReg(), 669 R8->as_VMReg(), 670 R9->as_VMReg(), 671 R10->as_VMReg() 672 }; 673 674 const VMReg farg_reg[13] = { 675 F1->as_VMReg(), 676 F2->as_VMReg(), 677 F3->as_VMReg(), 678 F4->as_VMReg(), 679 F5->as_VMReg(), 680 F6->as_VMReg(), 681 F7->as_VMReg(), 682 F8->as_VMReg(), 683 F9->as_VMReg(), 684 F10->as_VMReg(), 685 F11->as_VMReg(), 686 F12->as_VMReg(), 687 F13->as_VMReg() 688 }; 689 690 const int num_iarg_registers = sizeof(iarg_reg) / sizeof(iarg_reg[0]); 691 const int num_farg_registers = sizeof(farg_reg) / sizeof(farg_reg[0]); 692 693 // The first 8 arguments are not passed on the stack. 694 const int num_args_in_regs = 8; 695#define put_arg_in_reg(arg) ((arg) < num_args_in_regs) 696 697 // Check calling conventions consistency. 698 assert(num_iarg_registers == num_args_in_regs 699 && num_iarg_registers == 8 700 && num_farg_registers == 13, 701 "consistency"); 702 703 // `Stk' counts stack slots. Due to alignment, 32 bit values occupy 704 // 2 such slots, like 64 bit values do. 705 const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats 706 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles 707 708 int ill_i = 0; 709 int ill_t = 0; 710 int i; 711 VMReg reg; 712 // Leave room for C-compatible ABI_112. 713 int stk = (frame::abi_112_size - frame::jit_out_preserve_size) / VMRegImpl::stack_slot_size; 714 int arg = 0; 715 int freg = 0; 716 717 // Avoid passing C arguments in the wrong stack slots. 718 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 112, 719 "passing C arguments in wrong stack slots"); 720 721 // We fill-out regs AND regs2 if an argument must be passed in a 722 // register AND in a stack slot. If regs2 is NULL in such a 723 // situation, we bail-out with a fatal error. 724 for (int i = 0; i < total_args_passed; ++i, ++arg) { 725 // Initialize regs2 to BAD. 726 if (regs2 != NULL) regs2[i].set_bad(); 727 728 switch(sig_bt[i]) { 729 case T_BOOLEAN: 730 case T_CHAR: 731 case T_BYTE: 732 case T_SHORT: 733 case T_INT: 734 // We must cast ints to longs and use full 64 bit stack slots 735 // here. We do the cast in GraphKit::gen_stub() and just guard 736 // here against loosing that change. 737 assert(CCallingConventionRequiresIntsAsLongs, 738 "argument of type int should be promoted to type long"); 739 guarantee(i > 0 && sig_bt[i-1] == T_LONG, 740 "argument of type (bt) should have been promoted to type (T_LONG,bt) for bt in " 741 "{T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}"); 742 // Do not count halves. 743 regs[i].set_bad(); 744 --arg; 745 break; 746 case T_LONG: 747 guarantee(sig_bt[i+1] == T_VOID || 748 sig_bt[i+1] == T_BOOLEAN || sig_bt[i+1] == T_CHAR || 749 sig_bt[i+1] == T_BYTE || sig_bt[i+1] == T_SHORT || 750 sig_bt[i+1] == T_INT, 751 "expecting type (T_LONG,half) or type (T_LONG,bt) with bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}"); 752 case T_OBJECT: 753 case T_ARRAY: 754 case T_ADDRESS: 755 case T_METADATA: 756 // Oops are already boxed if required (JNI). 757 if (put_arg_in_reg(arg)) { 758 reg = iarg_reg[arg]; 759 } else { 760 reg = VMRegImpl::stack2reg(stk); 761 stk += inc_stk_for_longdouble; 762 } 763 regs[i].set2(reg); 764 break; 765 case T_FLOAT: 766 if (put_arg_in_reg(arg)) { 767 reg = farg_reg[freg]; 768 } else { 769 // Put float on stack 770# if defined(LINUX) 771 reg = VMRegImpl::stack2reg(stk+1); 772# elif defined(AIX) 773 reg = VMRegImpl::stack2reg(stk); 774# else 775# error "unknown OS" 776# endif 777 stk += inc_stk_for_intfloat; 778 } 779 780 if (freg < num_farg_registers) { 781 // There are still some float argument registers left. Put the 782 // float in a register if not already done. 783 if (reg != farg_reg[freg]) { 784 guarantee(regs2 != NULL, "must pass float in register and stack slot"); 785 VMReg reg2 = farg_reg[freg]; 786 regs2[i].set1(reg2); 787 } 788 ++freg; 789 } 790 791 regs[i].set1(reg); 792 break; 793 case T_DOUBLE: 794 assert(sig_bt[i+1] == T_VOID, "expecting half"); 795 if (put_arg_in_reg(arg)) { 796 reg = farg_reg[freg]; 797 } else { 798 // Put double on stack. 799 reg = VMRegImpl::stack2reg(stk); 800 stk += inc_stk_for_longdouble; 801 } 802 803 if (freg < num_farg_registers) { 804 // There are still some float argument registers left. Put the 805 // float in a register if not already done. 806 if (reg != farg_reg[freg]) { 807 guarantee(regs2 != NULL, "must pass float in register and stack slot"); 808 VMReg reg2 = farg_reg[freg]; 809 regs2[i].set2(reg2); 810 } 811 ++freg; 812 } 813 814 regs[i].set2(reg); 815 break; 816 case T_VOID: 817 // Do not count halves. 818 regs[i].set_bad(); 819 --arg; 820 break; 821 default: 822 ShouldNotReachHere(); 823 } 824 } 825 826 return round_to(stk, 2); 827} 828#endif // COMPILER2 829 830static address gen_c2i_adapter(MacroAssembler *masm, 831 int total_args_passed, 832 int comp_args_on_stack, 833 const BasicType *sig_bt, 834 const VMRegPair *regs, 835 Label& call_interpreter, 836 const Register& ientry) { 837 838 address c2i_entrypoint; 839 840 const Register sender_SP = R21_sender_SP; // == R21_tmp1 841 const Register code = R22_tmp2; 842 //const Register ientry = R23_tmp3; 843 const Register value_regs[] = { R24_tmp4, R25_tmp5, R26_tmp6 }; 844 const int num_value_regs = sizeof(value_regs) / sizeof(Register); 845 int value_regs_index = 0; 846 847 const Register return_pc = R27_tmp7; 848 const Register tmp = R28_tmp8; 849 850 assert_different_registers(sender_SP, code, ientry, return_pc, tmp); 851 852 // Adapter needs TOP_IJAVA_FRAME_ABI. 853 const int adapter_size = frame::top_ijava_frame_abi_size + 854 round_to(total_args_passed * wordSize, frame::alignment_in_bytes); 855 856 // regular (verified) c2i entry point 857 c2i_entrypoint = __ pc(); 858 859 // Does compiled code exists? If yes, patch the caller's callsite. 860 __ ld(code, method_(code)); 861 __ cmpdi(CCR0, code, 0); 862 __ ld(ientry, method_(interpreter_entry)); // preloaded 863 __ beq(CCR0, call_interpreter); 864 865 866 // Patch caller's callsite, method_(code) was not NULL which means that 867 // compiled code exists. 868 __ mflr(return_pc); 869 __ std(return_pc, _abi(lr), R1_SP); 870 RegisterSaver::push_frame_and_save_argument_registers(masm, tmp, adapter_size, total_args_passed, regs); 871 872 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), R19_method, return_pc); 873 874 RegisterSaver::restore_argument_registers_and_pop_frame(masm, adapter_size, total_args_passed, regs); 875 __ ld(return_pc, _abi(lr), R1_SP); 876 __ ld(ientry, method_(interpreter_entry)); // preloaded 877 __ mtlr(return_pc); 878 879 880 // call the interpreter 881 __ BIND(call_interpreter); 882 __ mtctr(ientry); 883 884 // Get a copy of the current SP for loading caller's arguments. 885 __ mr(sender_SP, R1_SP); 886 887 // Add space for the adapter. 888 __ resize_frame(-adapter_size, R12_scratch2); 889 890 int st_off = adapter_size - wordSize; 891 892 // Write the args into the outgoing interpreter space. 893 for (int i = 0; i < total_args_passed; i++) { 894 VMReg r_1 = regs[i].first(); 895 VMReg r_2 = regs[i].second(); 896 if (!r_1->is_valid()) { 897 assert(!r_2->is_valid(), ""); 898 continue; 899 } 900 if (r_1->is_stack()) { 901 Register tmp_reg = value_regs[value_regs_index]; 902 value_regs_index = (value_regs_index + 1) % num_value_regs; 903 // The calling convention produces OptoRegs that ignore the out 904 // preserve area (JIT's ABI). We must account for it here. 905 int ld_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 906 if (!r_2->is_valid()) { 907 __ lwz(tmp_reg, ld_off, sender_SP); 908 } else { 909 __ ld(tmp_reg, ld_off, sender_SP); 910 } 911 // Pretend stack targets were loaded into tmp_reg. 912 r_1 = tmp_reg->as_VMReg(); 913 } 914 915 if (r_1->is_Register()) { 916 Register r = r_1->as_Register(); 917 if (!r_2->is_valid()) { 918 __ stw(r, st_off, R1_SP); 919 st_off-=wordSize; 920 } else { 921 // Longs are given 2 64-bit slots in the interpreter, but the 922 // data is passed in only 1 slot. 923 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 924 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); ) 925 st_off-=wordSize; 926 } 927 __ std(r, st_off, R1_SP); 928 st_off-=wordSize; 929 } 930 } else { 931 assert(r_1->is_FloatRegister(), ""); 932 FloatRegister f = r_1->as_FloatRegister(); 933 if (!r_2->is_valid()) { 934 __ stfs(f, st_off, R1_SP); 935 st_off-=wordSize; 936 } else { 937 // In 64bit, doubles are given 2 64-bit slots in the interpreter, but the 938 // data is passed in only 1 slot. 939 // One of these should get known junk... 940 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); ) 941 st_off-=wordSize; 942 __ stfd(f, st_off, R1_SP); 943 st_off-=wordSize; 944 } 945 } 946 } 947 948 // Jump to the interpreter just as if interpreter was doing it. 949 950 // load TOS 951 __ addi(R17_tos, R1_SP, st_off); 952 953 // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1. 954 assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register"); 955 __ bctr(); 956 957 return c2i_entrypoint; 958} 959 960static void gen_i2c_adapter(MacroAssembler *masm, 961 int total_args_passed, 962 int comp_args_on_stack, 963 const BasicType *sig_bt, 964 const VMRegPair *regs) { 965 966 // Load method's entry-point from methodOop. 967 __ ld(R12_scratch2, in_bytes(Method::from_compiled_offset()), R19_method); 968 __ mtctr(R12_scratch2); 969 970 // We will only enter here from an interpreted frame and never from after 971 // passing thru a c2i. Azul allowed this but we do not. If we lose the 972 // race and use a c2i we will remain interpreted for the race loser(s). 973 // This removes all sorts of headaches on the x86 side and also eliminates 974 // the possibility of having c2i -> i2c -> c2i -> ... endless transitions. 975 976 // Note: r13 contains the senderSP on entry. We must preserve it since 977 // we may do a i2c -> c2i transition if we lose a race where compiled 978 // code goes non-entrant while we get args ready. 979 // In addition we use r13 to locate all the interpreter args as 980 // we must align the stack to 16 bytes on an i2c entry else we 981 // lose alignment we expect in all compiled code and register 982 // save code can segv when fxsave instructions find improperly 983 // aligned stack pointer. 984 985 const Register ld_ptr = R17_tos; 986 const Register value_regs[] = { R22_tmp2, R23_tmp3, R24_tmp4, R25_tmp5, R26_tmp6 }; 987 const int num_value_regs = sizeof(value_regs) / sizeof(Register); 988 int value_regs_index = 0; 989 990 int ld_offset = total_args_passed*wordSize; 991 992 // Cut-out for having no stack args. Since up to 2 int/oop args are passed 993 // in registers, we will occasionally have no stack args. 994 int comp_words_on_stack = 0; 995 if (comp_args_on_stack) { 996 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in 997 // registers are below. By subtracting stack0, we either get a negative 998 // number (all values in registers) or the maximum stack slot accessed. 999 1000 // Convert 4-byte c2 stack slots to words. 1001 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; 1002 // Round up to miminum stack alignment, in wordSize. 1003 comp_words_on_stack = round_to(comp_words_on_stack, 2); 1004 __ resize_frame(-comp_words_on_stack * wordSize, R11_scratch1); 1005 } 1006 1007 // Now generate the shuffle code. Pick up all register args and move the 1008 // rest through register value=Z_R12. 1009 BLOCK_COMMENT("Shuffle arguments"); 1010 for (int i = 0; i < total_args_passed; i++) { 1011 if (sig_bt[i] == T_VOID) { 1012 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 1013 continue; 1014 } 1015 1016 // Pick up 0, 1 or 2 words from ld_ptr. 1017 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), 1018 "scrambled load targets?"); 1019 VMReg r_1 = regs[i].first(); 1020 VMReg r_2 = regs[i].second(); 1021 if (!r_1->is_valid()) { 1022 assert(!r_2->is_valid(), ""); 1023 continue; 1024 } 1025 if (r_1->is_FloatRegister()) { 1026 if (!r_2->is_valid()) { 1027 __ lfs(r_1->as_FloatRegister(), ld_offset, ld_ptr); 1028 ld_offset-=wordSize; 1029 } else { 1030 // Skip the unused interpreter slot. 1031 __ lfd(r_1->as_FloatRegister(), ld_offset-wordSize, ld_ptr); 1032 ld_offset-=2*wordSize; 1033 } 1034 } else { 1035 Register r; 1036 if (r_1->is_stack()) { 1037 // Must do a memory to memory move thru "value". 1038 r = value_regs[value_regs_index]; 1039 value_regs_index = (value_regs_index + 1) % num_value_regs; 1040 } else { 1041 r = r_1->as_Register(); 1042 } 1043 if (!r_2->is_valid()) { 1044 // Not sure we need to do this but it shouldn't hurt. 1045 if (sig_bt[i] == T_OBJECT || sig_bt[i] == T_ADDRESS || sig_bt[i] == T_ARRAY) { 1046 __ ld(r, ld_offset, ld_ptr); 1047 ld_offset-=wordSize; 1048 } else { 1049 __ lwz(r, ld_offset, ld_ptr); 1050 ld_offset-=wordSize; 1051 } 1052 } else { 1053 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the 1054 // data is passed in only 1 slot. 1055 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 1056 ld_offset-=wordSize; 1057 } 1058 __ ld(r, ld_offset, ld_ptr); 1059 ld_offset-=wordSize; 1060 } 1061 1062 if (r_1->is_stack()) { 1063 // Now store value where the compiler expects it 1064 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots())*VMRegImpl::stack_slot_size; 1065 1066 if (sig_bt[i] == T_INT || sig_bt[i] == T_FLOAT ||sig_bt[i] == T_BOOLEAN || 1067 sig_bt[i] == T_SHORT || sig_bt[i] == T_CHAR || sig_bt[i] == T_BYTE) { 1068 __ stw(r, st_off, R1_SP); 1069 } else { 1070 __ std(r, st_off, R1_SP); 1071 } 1072 } 1073 } 1074 } 1075 1076 BLOCK_COMMENT("Store method oop"); 1077 // Store method oop into thread->callee_target. 1078 // We might end up in handle_wrong_method if the callee is 1079 // deoptimized as we race thru here. If that happens we don't want 1080 // to take a safepoint because the caller frame will look 1081 // interpreted and arguments are now "compiled" so it is much better 1082 // to make this transition invisible to the stack walking 1083 // code. Unfortunately if we try and find the callee by normal means 1084 // a safepoint is possible. So we stash the desired callee in the 1085 // thread and the vm will find there should this case occur. 1086 __ std(R19_method, thread_(callee_target)); 1087 1088 // Jump to the compiled code just as if compiled code was doing it. 1089 __ bctr(); 1090} 1091 1092AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, 1093 int total_args_passed, 1094 int comp_args_on_stack, 1095 const BasicType *sig_bt, 1096 const VMRegPair *regs, 1097 AdapterFingerPrint* fingerprint) { 1098 address i2c_entry; 1099 address c2i_unverified_entry; 1100 address c2i_entry; 1101 1102 1103 // entry: i2c 1104 1105 __ align(CodeEntryAlignment); 1106 i2c_entry = __ pc(); 1107 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); 1108 1109 1110 // entry: c2i unverified 1111 1112 __ align(CodeEntryAlignment); 1113 BLOCK_COMMENT("c2i unverified entry"); 1114 c2i_unverified_entry = __ pc(); 1115 1116 // inline_cache contains a compiledICHolder 1117 const Register ic = R19_method; 1118 const Register ic_klass = R11_scratch1; 1119 const Register receiver_klass = R12_scratch2; 1120 const Register code = R21_tmp1; 1121 const Register ientry = R23_tmp3; 1122 1123 assert_different_registers(ic, ic_klass, receiver_klass, R3_ARG1, code, ientry); 1124 assert(R11_scratch1 == R11, "need prologue scratch register"); 1125 1126 Label call_interpreter; 1127 1128 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), 1129 "klass offset should reach into any page"); 1130 // Check for NULL argument if we don't have implicit null checks. 1131 if (!ImplicitNullChecks || !os::zero_page_read_protected()) { 1132 if (TrapBasedNullChecks) { 1133 __ trap_null_check(R3_ARG1); 1134 } else { 1135 Label valid; 1136 __ cmpdi(CCR0, R3_ARG1, 0); 1137 __ bne_predict_taken(CCR0, valid); 1138 // We have a null argument, branch to ic_miss_stub. 1139 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), 1140 relocInfo::runtime_call_type); 1141 __ BIND(valid); 1142 } 1143 } 1144 // Assume argument is not NULL, load klass from receiver. 1145 __ load_klass(receiver_klass, R3_ARG1); 1146 1147 __ ld(ic_klass, CompiledICHolder::holder_klass_offset(), ic); 1148 1149 if (TrapBasedICMissChecks) { 1150 __ trap_ic_miss_check(receiver_klass, ic_klass); 1151 } else { 1152 Label valid; 1153 __ cmpd(CCR0, receiver_klass, ic_klass); 1154 __ beq_predict_taken(CCR0, valid); 1155 // We have an unexpected klass, branch to ic_miss_stub. 1156 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), 1157 relocInfo::runtime_call_type); 1158 __ BIND(valid); 1159 } 1160 1161 // Argument is valid and klass is as expected, continue. 1162 1163 // Extract method from inline cache, verified entry point needs it. 1164 __ ld(R19_method, CompiledICHolder::holder_method_offset(), ic); 1165 assert(R19_method == ic, "the inline cache register is dead here"); 1166 1167 __ ld(code, method_(code)); 1168 __ cmpdi(CCR0, code, 0); 1169 __ ld(ientry, method_(interpreter_entry)); // preloaded 1170 __ beq_predict_taken(CCR0, call_interpreter); 1171 1172 // Branch to ic_miss_stub. 1173 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), 1174 relocInfo::runtime_call_type); 1175 1176 // entry: c2i 1177 1178 c2i_entry = gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, call_interpreter, ientry); 1179 1180 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); 1181} 1182 1183#ifdef COMPILER2 1184// An oop arg. Must pass a handle not the oop itself. 1185static void object_move(MacroAssembler* masm, 1186 int frame_size_in_slots, 1187 OopMap* oop_map, int oop_handle_offset, 1188 bool is_receiver, int* receiver_offset, 1189 VMRegPair src, VMRegPair dst, 1190 Register r_caller_sp, Register r_temp_1, Register r_temp_2) { 1191 assert(!is_receiver || (is_receiver && (*receiver_offset == -1)), 1192 "receiver has already been moved"); 1193 1194 // We must pass a handle. First figure out the location we use as a handle. 1195 1196 if (src.first()->is_stack()) { 1197 // stack to stack or reg 1198 1199 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register(); 1200 Label skip; 1201 const int oop_slot_in_callers_frame = reg2slot(src.first()); 1202 1203 guarantee(!is_receiver, "expecting receiver in register"); 1204 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot_in_callers_frame + frame_size_in_slots)); 1205 1206 __ addi(r_handle, r_caller_sp, reg2offset(src.first())); 1207 __ ld( r_temp_2, reg2offset(src.first()), r_caller_sp); 1208 __ cmpdi(CCR0, r_temp_2, 0); 1209 __ bne(CCR0, skip); 1210 // Use a NULL handle if oop is NULL. 1211 __ li(r_handle, 0); 1212 __ bind(skip); 1213 1214 if (dst.first()->is_stack()) { 1215 // stack to stack 1216 __ std(r_handle, reg2offset(dst.first()), R1_SP); 1217 } else { 1218 // stack to reg 1219 // Nothing to do, r_handle is already the dst register. 1220 } 1221 } else { 1222 // reg to stack or reg 1223 const Register r_oop = src.first()->as_Register(); 1224 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register(); 1225 const int oop_slot = (r_oop->encoding()-R3_ARG1->encoding()) * VMRegImpl::slots_per_word 1226 + oop_handle_offset; // in slots 1227 const int oop_offset = oop_slot * VMRegImpl::stack_slot_size; 1228 Label skip; 1229 1230 if (is_receiver) { 1231 *receiver_offset = oop_offset; 1232 } 1233 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot)); 1234 1235 __ std( r_oop, oop_offset, R1_SP); 1236 __ addi(r_handle, R1_SP, oop_offset); 1237 1238 __ cmpdi(CCR0, r_oop, 0); 1239 __ bne(CCR0, skip); 1240 // Use a NULL handle if oop is NULL. 1241 __ li(r_handle, 0); 1242 __ bind(skip); 1243 1244 if (dst.first()->is_stack()) { 1245 // reg to stack 1246 __ std(r_handle, reg2offset(dst.first()), R1_SP); 1247 } else { 1248 // reg to reg 1249 // Nothing to do, r_handle is already the dst register. 1250 } 1251 } 1252} 1253 1254static void int_move(MacroAssembler*masm, 1255 VMRegPair src, VMRegPair dst, 1256 Register r_caller_sp, Register r_temp) { 1257 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be long-int"); 1258 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long"); 1259 1260 if (src.first()->is_stack()) { 1261 if (dst.first()->is_stack()) { 1262 // stack to stack 1263 __ lwa(r_temp, reg2offset(src.first()), r_caller_sp); 1264 __ std(r_temp, reg2offset(dst.first()), R1_SP); 1265 } else { 1266 // stack to reg 1267 __ lwa(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp); 1268 } 1269 } else if (dst.first()->is_stack()) { 1270 // reg to stack 1271 __ extsw(r_temp, src.first()->as_Register()); 1272 __ std(r_temp, reg2offset(dst.first()), R1_SP); 1273 } else { 1274 // reg to reg 1275 __ extsw(dst.first()->as_Register(), src.first()->as_Register()); 1276 } 1277} 1278 1279static void long_move(MacroAssembler*masm, 1280 VMRegPair src, VMRegPair dst, 1281 Register r_caller_sp, Register r_temp) { 1282 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be long"); 1283 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long"); 1284 1285 if (src.first()->is_stack()) { 1286 if (dst.first()->is_stack()) { 1287 // stack to stack 1288 __ ld( r_temp, reg2offset(src.first()), r_caller_sp); 1289 __ std(r_temp, reg2offset(dst.first()), R1_SP); 1290 } else { 1291 // stack to reg 1292 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp); 1293 } 1294 } else if (dst.first()->is_stack()) { 1295 // reg to stack 1296 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP); 1297 } else { 1298 // reg to reg 1299 if (dst.first()->as_Register() != src.first()->as_Register()) 1300 __ mr(dst.first()->as_Register(), src.first()->as_Register()); 1301 } 1302} 1303 1304static void float_move(MacroAssembler*masm, 1305 VMRegPair src, VMRegPair dst, 1306 Register r_caller_sp, Register r_temp) { 1307 assert(src.first()->is_valid() && !src.second()->is_valid(), "incoming must be float"); 1308 assert(dst.first()->is_valid() && !dst.second()->is_valid(), "outgoing must be float"); 1309 1310 if (src.first()->is_stack()) { 1311 if (dst.first()->is_stack()) { 1312 // stack to stack 1313 __ lwz(r_temp, reg2offset(src.first()), r_caller_sp); 1314 __ stw(r_temp, reg2offset(dst.first()), R1_SP); 1315 } else { 1316 // stack to reg 1317 __ lfs(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp); 1318 } 1319 } else if (dst.first()->is_stack()) { 1320 // reg to stack 1321 __ stfs(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP); 1322 } else { 1323 // reg to reg 1324 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister()) 1325 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister()); 1326 } 1327} 1328 1329static void double_move(MacroAssembler*masm, 1330 VMRegPair src, VMRegPair dst, 1331 Register r_caller_sp, Register r_temp) { 1332 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be double"); 1333 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be double"); 1334 1335 if (src.first()->is_stack()) { 1336 if (dst.first()->is_stack()) { 1337 // stack to stack 1338 __ ld( r_temp, reg2offset(src.first()), r_caller_sp); 1339 __ std(r_temp, reg2offset(dst.first()), R1_SP); 1340 } else { 1341 // stack to reg 1342 __ lfd(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp); 1343 } 1344 } else if (dst.first()->is_stack()) { 1345 // reg to stack 1346 __ stfd(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP); 1347 } else { 1348 // reg to reg 1349 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister()) 1350 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister()); 1351 } 1352} 1353 1354void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1355 switch (ret_type) { 1356 case T_BOOLEAN: 1357 case T_CHAR: 1358 case T_BYTE: 1359 case T_SHORT: 1360 case T_INT: 1361 __ stw (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP); 1362 break; 1363 case T_ARRAY: 1364 case T_OBJECT: 1365 case T_LONG: 1366 __ std (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP); 1367 break; 1368 case T_FLOAT: 1369 __ stfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP); 1370 break; 1371 case T_DOUBLE: 1372 __ stfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP); 1373 break; 1374 case T_VOID: 1375 break; 1376 default: 1377 ShouldNotReachHere(); 1378 break; 1379 } 1380} 1381 1382void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1383 switch (ret_type) { 1384 case T_BOOLEAN: 1385 case T_CHAR: 1386 case T_BYTE: 1387 case T_SHORT: 1388 case T_INT: 1389 __ lwz(R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP); 1390 break; 1391 case T_ARRAY: 1392 case T_OBJECT: 1393 case T_LONG: 1394 __ ld (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP); 1395 break; 1396 case T_FLOAT: 1397 __ lfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP); 1398 break; 1399 case T_DOUBLE: 1400 __ lfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP); 1401 break; 1402 case T_VOID: 1403 break; 1404 default: 1405 ShouldNotReachHere(); 1406 break; 1407 } 1408} 1409 1410static void save_or_restore_arguments(MacroAssembler* masm, 1411 const int stack_slots, 1412 const int total_in_args, 1413 const int arg_save_area, 1414 OopMap* map, 1415 VMRegPair* in_regs, 1416 BasicType* in_sig_bt) { 1417 // If map is non-NULL then the code should store the values, 1418 // otherwise it should load them. 1419 int slot = arg_save_area; 1420 // Save down double word first. 1421 for (int i = 0; i < total_in_args; i++) { 1422 if (in_regs[i].first()->is_FloatRegister() && in_sig_bt[i] == T_DOUBLE) { 1423 int offset = slot * VMRegImpl::stack_slot_size; 1424 slot += VMRegImpl::slots_per_word; 1425 assert(slot <= stack_slots, "overflow (after DOUBLE stack slot)"); 1426 if (map != NULL) { 1427 __ stfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP); 1428 } else { 1429 __ lfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP); 1430 } 1431 } else if (in_regs[i].first()->is_Register() && 1432 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { 1433 int offset = slot * VMRegImpl::stack_slot_size; 1434 if (map != NULL) { 1435 __ std(in_regs[i].first()->as_Register(), offset, R1_SP); 1436 if (in_sig_bt[i] == T_ARRAY) { 1437 map->set_oop(VMRegImpl::stack2reg(slot)); 1438 } 1439 } else { 1440 __ ld(in_regs[i].first()->as_Register(), offset, R1_SP); 1441 } 1442 slot += VMRegImpl::slots_per_word; 1443 assert(slot <= stack_slots, "overflow (after LONG/ARRAY stack slot)"); 1444 } 1445 } 1446 // Save or restore single word registers. 1447 for (int i = 0; i < total_in_args; i++) { 1448 // PPC64: pass ints as longs: must only deal with floats here. 1449 if (in_regs[i].first()->is_FloatRegister()) { 1450 if (in_sig_bt[i] == T_FLOAT) { 1451 int offset = slot * VMRegImpl::stack_slot_size; 1452 slot++; 1453 assert(slot <= stack_slots, "overflow (after FLOAT stack slot)"); 1454 if (map != NULL) { 1455 __ stfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP); 1456 } else { 1457 __ lfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP); 1458 } 1459 } 1460 } else if (in_regs[i].first()->is_stack()) { 1461 if (in_sig_bt[i] == T_ARRAY && map != NULL) { 1462 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 1463 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); 1464 } 1465 } 1466 } 1467} 1468 1469// Check GC_locker::needs_gc and enter the runtime if it's true. This 1470// keeps a new JNI critical region from starting until a GC has been 1471// forced. Save down any oops in registers and describe them in an 1472// OopMap. 1473static void check_needs_gc_for_critical_native(MacroAssembler* masm, 1474 const int stack_slots, 1475 const int total_in_args, 1476 const int arg_save_area, 1477 OopMapSet* oop_maps, 1478 VMRegPair* in_regs, 1479 BasicType* in_sig_bt, 1480 Register tmp_reg ) { 1481 __ block_comment("check GC_locker::needs_gc"); 1482 Label cont; 1483 __ lbz(tmp_reg, (RegisterOrConstant)(intptr_t)GC_locker::needs_gc_address()); 1484 __ cmplwi(CCR0, tmp_reg, 0); 1485 __ beq(CCR0, cont); 1486 1487 // Save down any values that are live in registers and call into the 1488 // runtime to halt for a GC. 1489 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1490 save_or_restore_arguments(masm, stack_slots, total_in_args, 1491 arg_save_area, map, in_regs, in_sig_bt); 1492 1493 __ mr(R3_ARG1, R16_thread); 1494 __ set_last_Java_frame(R1_SP, noreg); 1495 1496 __ block_comment("block_for_jni_critical"); 1497 address entry_point = CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical); 1498 __ call_c(CAST_FROM_FN_PTR(FunctionDescriptor*, entry_point), relocInfo::runtime_call_type); 1499 address start = __ pc() - __ offset(), 1500 calls_return_pc = __ last_calls_return_pc(); 1501 oop_maps->add_gc_map(calls_return_pc - start, map); 1502 1503 __ reset_last_Java_frame(); 1504 1505 // Reload all the register arguments. 1506 save_or_restore_arguments(masm, stack_slots, total_in_args, 1507 arg_save_area, NULL, in_regs, in_sig_bt); 1508 1509 __ BIND(cont); 1510 1511#ifdef ASSERT 1512 if (StressCriticalJNINatives) { 1513 // Stress register saving. 1514 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1515 save_or_restore_arguments(masm, stack_slots, total_in_args, 1516 arg_save_area, map, in_regs, in_sig_bt); 1517 // Destroy argument registers. 1518 for (int i = 0; i < total_in_args; i++) { 1519 if (in_regs[i].first()->is_Register()) { 1520 const Register reg = in_regs[i].first()->as_Register(); 1521 __ neg(reg, reg); 1522 } else if (in_regs[i].first()->is_FloatRegister()) { 1523 __ fneg(in_regs[i].first()->as_FloatRegister(), in_regs[i].first()->as_FloatRegister()); 1524 } 1525 } 1526 1527 save_or_restore_arguments(masm, stack_slots, total_in_args, 1528 arg_save_area, NULL, in_regs, in_sig_bt); 1529 } 1530#endif 1531} 1532 1533static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst, Register r_caller_sp, Register r_temp) { 1534 if (src.first()->is_stack()) { 1535 if (dst.first()->is_stack()) { 1536 // stack to stack 1537 __ ld(r_temp, reg2offset(src.first()), r_caller_sp); 1538 __ std(r_temp, reg2offset(dst.first()), R1_SP); 1539 } else { 1540 // stack to reg 1541 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp); 1542 } 1543 } else if (dst.first()->is_stack()) { 1544 // reg to stack 1545 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP); 1546 } else { 1547 if (dst.first() != src.first()) { 1548 __ mr(dst.first()->as_Register(), src.first()->as_Register()); 1549 } 1550 } 1551} 1552 1553// Unpack an array argument into a pointer to the body and the length 1554// if the array is non-null, otherwise pass 0 for both. 1555static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, 1556 VMRegPair body_arg, VMRegPair length_arg, Register r_caller_sp, 1557 Register tmp_reg, Register tmp2_reg) { 1558 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, 1559 "possible collision"); 1560 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, 1561 "possible collision"); 1562 1563 // Pass the length, ptr pair. 1564 Label set_out_args; 1565 VMRegPair tmp, tmp2; 1566 tmp.set_ptr(tmp_reg->as_VMReg()); 1567 tmp2.set_ptr(tmp2_reg->as_VMReg()); 1568 if (reg.first()->is_stack()) { 1569 // Load the arg up from the stack. 1570 move_ptr(masm, reg, tmp, r_caller_sp, /*unused*/ R0); 1571 reg = tmp; 1572 } 1573 __ li(tmp2_reg, 0); // Pass zeros if Array=null. 1574 if (tmp_reg != reg.first()->as_Register()) __ li(tmp_reg, 0); 1575 __ cmpdi(CCR0, reg.first()->as_Register(), 0); 1576 __ beq(CCR0, set_out_args); 1577 __ lwa(tmp2_reg, arrayOopDesc::length_offset_in_bytes(), reg.first()->as_Register()); 1578 __ addi(tmp_reg, reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)); 1579 __ bind(set_out_args); 1580 move_ptr(masm, tmp, body_arg, r_caller_sp, /*unused*/ R0); 1581 move_ptr(masm, tmp2, length_arg, r_caller_sp, /*unused*/ R0); // Same as move32_64 on PPC64. 1582} 1583 1584static void verify_oop_args(MacroAssembler* masm, 1585 methodHandle method, 1586 const BasicType* sig_bt, 1587 const VMRegPair* regs) { 1588 Register temp_reg = R19_method; // not part of any compiled calling seq 1589 if (VerifyOops) { 1590 for (int i = 0; i < method->size_of_parameters(); i++) { 1591 if (sig_bt[i] == T_OBJECT || 1592 sig_bt[i] == T_ARRAY) { 1593 VMReg r = regs[i].first(); 1594 assert(r->is_valid(), "bad oop arg"); 1595 if (r->is_stack()) { 1596 __ ld(temp_reg, reg2offset(r), R1_SP); 1597 __ verify_oop(temp_reg); 1598 } else { 1599 __ verify_oop(r->as_Register()); 1600 } 1601 } 1602 } 1603 } 1604} 1605 1606static void gen_special_dispatch(MacroAssembler* masm, 1607 methodHandle method, 1608 const BasicType* sig_bt, 1609 const VMRegPair* regs) { 1610 verify_oop_args(masm, method, sig_bt, regs); 1611 vmIntrinsics::ID iid = method->intrinsic_id(); 1612 1613 // Now write the args into the outgoing interpreter space 1614 bool has_receiver = false; 1615 Register receiver_reg = noreg; 1616 int member_arg_pos = -1; 1617 Register member_reg = noreg; 1618 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); 1619 if (ref_kind != 0) { 1620 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument 1621 member_reg = R19_method; // known to be free at this point 1622 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); 1623 } else if (iid == vmIntrinsics::_invokeBasic) { 1624 has_receiver = true; 1625 } else { 1626 fatal(err_msg_res("unexpected intrinsic id %d", iid)); 1627 } 1628 1629 if (member_reg != noreg) { 1630 // Load the member_arg into register, if necessary. 1631 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); 1632 VMReg r = regs[member_arg_pos].first(); 1633 if (r->is_stack()) { 1634 __ ld(member_reg, reg2offset(r), R1_SP); 1635 } else { 1636 // no data motion is needed 1637 member_reg = r->as_Register(); 1638 } 1639 } 1640 1641 if (has_receiver) { 1642 // Make sure the receiver is loaded into a register. 1643 assert(method->size_of_parameters() > 0, "oob"); 1644 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); 1645 VMReg r = regs[0].first(); 1646 assert(r->is_valid(), "bad receiver arg"); 1647 if (r->is_stack()) { 1648 // Porting note: This assumes that compiled calling conventions always 1649 // pass the receiver oop in a register. If this is not true on some 1650 // platform, pick a temp and load the receiver from stack. 1651 fatal("receiver always in a register"); 1652 receiver_reg = R11_scratch1; // TODO (hs24): is R11_scratch1 really free at this point? 1653 __ ld(receiver_reg, reg2offset(r), R1_SP); 1654 } else { 1655 // no data motion is needed 1656 receiver_reg = r->as_Register(); 1657 } 1658 } 1659 1660 // Figure out which address we are really jumping to: 1661 MethodHandles::generate_method_handle_dispatch(masm, iid, 1662 receiver_reg, member_reg, /*for_compiler_entry:*/ true); 1663} 1664 1665#endif // COMPILER2 1666 1667// --------------------------------------------------------------------------- 1668// Generate a native wrapper for a given method. The method takes arguments 1669// in the Java compiled code convention, marshals them to the native 1670// convention (handlizes oops, etc), transitions to native, makes the call, 1671// returns to java state (possibly blocking), unhandlizes any result and 1672// returns. 1673// 1674// Critical native functions are a shorthand for the use of 1675// GetPrimtiveArrayCritical and disallow the use of any other JNI 1676// functions. The wrapper is expected to unpack the arguments before 1677// passing them to the callee and perform checks before and after the 1678// native call to ensure that they GC_locker 1679// lock_critical/unlock_critical semantics are followed. Some other 1680// parts of JNI setup are skipped like the tear down of the JNI handle 1681// block and the check for pending exceptions it's impossible for them 1682// to be thrown. 1683// 1684// They are roughly structured like this: 1685// if (GC_locker::needs_gc()) 1686// SharedRuntime::block_for_jni_critical(); 1687// tranistion to thread_in_native 1688// unpack arrray arguments and call native entry point 1689// check for safepoint in progress 1690// check if any thread suspend flags are set 1691// call into JVM and possible unlock the JNI critical 1692// if a GC was suppressed while in the critical native. 1693// transition back to thread_in_Java 1694// return to caller 1695// 1696nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm, 1697 methodHandle method, 1698 int compile_id, 1699 BasicType *in_sig_bt, 1700 VMRegPair *in_regs, 1701 BasicType ret_type) { 1702#ifdef COMPILER2 1703 if (method->is_method_handle_intrinsic()) { 1704 vmIntrinsics::ID iid = method->intrinsic_id(); 1705 intptr_t start = (intptr_t)__ pc(); 1706 int vep_offset = ((intptr_t)__ pc()) - start; 1707 gen_special_dispatch(masm, 1708 method, 1709 in_sig_bt, 1710 in_regs); 1711 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period 1712 __ flush(); 1713 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually 1714 return nmethod::new_native_nmethod(method, 1715 compile_id, 1716 masm->code(), 1717 vep_offset, 1718 frame_complete, 1719 stack_slots / VMRegImpl::slots_per_word, 1720 in_ByteSize(-1), 1721 in_ByteSize(-1), 1722 (OopMapSet*)NULL); 1723 } 1724 1725 bool is_critical_native = true; 1726 address native_func = method->critical_native_function(); 1727 if (native_func == NULL) { 1728 native_func = method->native_function(); 1729 is_critical_native = false; 1730 } 1731 assert(native_func != NULL, "must have function"); 1732 1733 // First, create signature for outgoing C call 1734 // -------------------------------------------------------------------------- 1735 1736 int total_in_args = method->size_of_parameters(); 1737 // We have received a description of where all the java args are located 1738 // on entry to the wrapper. We need to convert these args to where 1739 // the jni function will expect them. To figure out where they go 1740 // we convert the java signature to a C signature by inserting 1741 // the hidden arguments as arg[0] and possibly arg[1] (static method) 1742 // 1743 // Additionally, on ppc64 we must convert integers to longs in the C 1744 // signature. We do this in advance in order to have no trouble with 1745 // indexes into the bt-arrays. 1746 // So convert the signature and registers now, and adjust the total number 1747 // of in-arguments accordingly. 1748 int i2l_argcnt = convert_ints_to_longints_argcnt(total_in_args, in_sig_bt); // PPC64: pass ints as longs. 1749 1750 // Calculate the total number of C arguments and create arrays for the 1751 // signature and the outgoing registers. 1752 // On ppc64, we have two arrays for the outgoing registers, because 1753 // some floating-point arguments must be passed in registers _and_ 1754 // in stack locations. 1755 bool method_is_static = method->is_static(); 1756 int total_c_args = i2l_argcnt; 1757 1758 if (!is_critical_native) { 1759 int n_hidden_args = method_is_static ? 2 : 1; 1760 total_c_args += n_hidden_args; 1761 } else { 1762 // No JNIEnv*, no this*, but unpacked arrays (base+length). 1763 for (int i = 0; i < total_in_args; i++) { 1764 if (in_sig_bt[i] == T_ARRAY) { 1765 total_c_args += 2; // PPC64: T_LONG, T_INT, T_ADDRESS (see convert_ints_to_longints and c_calling_convention) 1766 } 1767 } 1768 } 1769 1770 BasicType *out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); 1771 VMRegPair *out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1772 VMRegPair *out_regs2 = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1773 BasicType* in_elem_bt = NULL; 1774 1775 // Create the signature for the C call: 1776 // 1) add the JNIEnv* 1777 // 2) add the class if the method is static 1778 // 3) copy the rest of the incoming signature (shifted by the number of 1779 // hidden arguments). 1780 1781 int argc = 0; 1782 if (!is_critical_native) { 1783 convert_ints_to_longints(i2l_argcnt, total_in_args, in_sig_bt, in_regs); // PPC64: pass ints as longs. 1784 1785 out_sig_bt[argc++] = T_ADDRESS; 1786 if (method->is_static()) { 1787 out_sig_bt[argc++] = T_OBJECT; 1788 } 1789 1790 for (int i = 0; i < total_in_args ; i++ ) { 1791 out_sig_bt[argc++] = in_sig_bt[i]; 1792 } 1793 } else { 1794 Thread* THREAD = Thread::current(); 1795 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, i2l_argcnt); 1796 SignatureStream ss(method->signature()); 1797 int o = 0; 1798 for (int i = 0; i < total_in_args ; i++, o++) { 1799 if (in_sig_bt[i] == T_ARRAY) { 1800 // Arrays are passed as int, elem* pair 1801 Symbol* atype = ss.as_symbol(CHECK_NULL); 1802 const char* at = atype->as_C_string(); 1803 if (strlen(at) == 2) { 1804 assert(at[0] == '[', "must be"); 1805 switch (at[1]) { 1806 case 'B': in_elem_bt[o] = T_BYTE; break; 1807 case 'C': in_elem_bt[o] = T_CHAR; break; 1808 case 'D': in_elem_bt[o] = T_DOUBLE; break; 1809 case 'F': in_elem_bt[o] = T_FLOAT; break; 1810 case 'I': in_elem_bt[o] = T_INT; break; 1811 case 'J': in_elem_bt[o] = T_LONG; break; 1812 case 'S': in_elem_bt[o] = T_SHORT; break; 1813 case 'Z': in_elem_bt[o] = T_BOOLEAN; break; 1814 default: ShouldNotReachHere(); 1815 } 1816 } 1817 } else { 1818 in_elem_bt[o] = T_VOID; 1819 switch(in_sig_bt[i]) { // PPC64: pass ints as longs. 1820 case T_BOOLEAN: 1821 case T_CHAR: 1822 case T_BYTE: 1823 case T_SHORT: 1824 case T_INT: in_elem_bt[++o] = T_VOID; break; 1825 default: break; 1826 } 1827 } 1828 if (in_sig_bt[i] != T_VOID) { 1829 assert(in_sig_bt[i] == ss.type(), "must match"); 1830 ss.next(); 1831 } 1832 } 1833 assert(i2l_argcnt==o, "must match"); 1834 1835 convert_ints_to_longints(i2l_argcnt, total_in_args, in_sig_bt, in_regs); // PPC64: pass ints as longs. 1836 1837 for (int i = 0; i < total_in_args ; i++ ) { 1838 if (in_sig_bt[i] == T_ARRAY) { 1839 // Arrays are passed as int, elem* pair. 1840 out_sig_bt[argc++] = T_LONG; // PPC64: pass ints as longs. 1841 out_sig_bt[argc++] = T_INT; 1842 out_sig_bt[argc++] = T_ADDRESS; 1843 } else { 1844 out_sig_bt[argc++] = in_sig_bt[i]; 1845 } 1846 } 1847 } 1848 1849 1850 // Compute the wrapper's frame size. 1851 // -------------------------------------------------------------------------- 1852 1853 // Now figure out where the args must be stored and how much stack space 1854 // they require. 1855 // 1856 // Compute framesize for the wrapper. We need to handlize all oops in 1857 // incoming registers. 1858 // 1859 // Calculate the total number of stack slots we will need: 1860 // 1) abi requirements 1861 // 2) outgoing arguments 1862 // 3) space for inbound oop handle area 1863 // 4) space for handlizing a klass if static method 1864 // 5) space for a lock if synchronized method 1865 // 6) workspace for saving return values, int <-> float reg moves, etc. 1866 // 7) alignment 1867 // 1868 // Layout of the native wrapper frame: 1869 // (stack grows upwards, memory grows downwards) 1870 // 1871 // NW [ABI_112] <-- 1) R1_SP 1872 // [outgoing arguments] <-- 2) R1_SP + out_arg_slot_offset 1873 // [oopHandle area] <-- 3) R1_SP + oop_handle_offset (save area for critical natives) 1874 // klass <-- 4) R1_SP + klass_offset 1875 // lock <-- 5) R1_SP + lock_offset 1876 // [workspace] <-- 6) R1_SP + workspace_offset 1877 // [alignment] (optional) <-- 7) 1878 // caller [JIT_TOP_ABI_48] <-- r_callers_sp 1879 // 1880 // - *_slot_offset Indicates offset from SP in number of stack slots. 1881 // - *_offset Indicates offset from SP in bytes. 1882 1883 int stack_slots = c_calling_convention(out_sig_bt, out_regs, out_regs2, total_c_args) // 1+2) 1884 + SharedRuntime::out_preserve_stack_slots(); // See c_calling_convention. 1885 1886 // Now the space for the inbound oop handle area. 1887 int total_save_slots = num_java_iarg_registers * VMRegImpl::slots_per_word; 1888 if (is_critical_native) { 1889 // Critical natives may have to call out so they need a save area 1890 // for register arguments. 1891 int double_slots = 0; 1892 int single_slots = 0; 1893 for (int i = 0; i < total_in_args; i++) { 1894 if (in_regs[i].first()->is_Register()) { 1895 const Register reg = in_regs[i].first()->as_Register(); 1896 switch (in_sig_bt[i]) { 1897 case T_BOOLEAN: 1898 case T_BYTE: 1899 case T_SHORT: 1900 case T_CHAR: 1901 case T_INT: /*single_slots++;*/ break; // PPC64: pass ints as longs. 1902 case T_ARRAY: 1903 case T_LONG: double_slots++; break; 1904 default: ShouldNotReachHere(); 1905 } 1906 } else if (in_regs[i].first()->is_FloatRegister()) { 1907 switch (in_sig_bt[i]) { 1908 case T_FLOAT: single_slots++; break; 1909 case T_DOUBLE: double_slots++; break; 1910 default: ShouldNotReachHere(); 1911 } 1912 } 1913 } 1914 total_save_slots = double_slots * 2 + round_to(single_slots, 2); // round to even 1915 } 1916 1917 int oop_handle_slot_offset = stack_slots; 1918 stack_slots += total_save_slots; // 3) 1919 1920 int klass_slot_offset = 0; 1921 int klass_offset = -1; 1922 if (method_is_static && !is_critical_native) { // 4) 1923 klass_slot_offset = stack_slots; 1924 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; 1925 stack_slots += VMRegImpl::slots_per_word; 1926 } 1927 1928 int lock_slot_offset = 0; 1929 int lock_offset = -1; 1930 if (method->is_synchronized()) { // 5) 1931 lock_slot_offset = stack_slots; 1932 lock_offset = lock_slot_offset * VMRegImpl::stack_slot_size; 1933 stack_slots += VMRegImpl::slots_per_word; 1934 } 1935 1936 int workspace_slot_offset = stack_slots; // 6) 1937 stack_slots += 2; 1938 1939 // Now compute actual number of stack words we need. 1940 // Rounding to make stack properly aligned. 1941 stack_slots = round_to(stack_slots, // 7) 1942 frame::alignment_in_bytes / VMRegImpl::stack_slot_size); 1943 int frame_size_in_bytes = stack_slots * VMRegImpl::stack_slot_size; 1944 1945 1946 // Now we can start generating code. 1947 // -------------------------------------------------------------------------- 1948 1949 intptr_t start_pc = (intptr_t)__ pc(); 1950 intptr_t vep_start_pc; 1951 intptr_t frame_done_pc; 1952 intptr_t oopmap_pc; 1953 1954 Label ic_miss; 1955 Label handle_pending_exception; 1956 1957 Register r_callers_sp = R21; 1958 Register r_temp_1 = R22; 1959 Register r_temp_2 = R23; 1960 Register r_temp_3 = R24; 1961 Register r_temp_4 = R25; 1962 Register r_temp_5 = R26; 1963 Register r_temp_6 = R27; 1964 Register r_return_pc = R28; 1965 1966 Register r_carg1_jnienv = noreg; 1967 Register r_carg2_classorobject = noreg; 1968 if (!is_critical_native) { 1969 r_carg1_jnienv = out_regs[0].first()->as_Register(); 1970 r_carg2_classorobject = out_regs[1].first()->as_Register(); 1971 } 1972 1973 1974 // Generate the Unverified Entry Point (UEP). 1975 // -------------------------------------------------------------------------- 1976 assert(start_pc == (intptr_t)__ pc(), "uep must be at start"); 1977 1978 // Check ic: object class == cached class? 1979 if (!method_is_static) { 1980 Register ic = as_Register(Matcher::inline_cache_reg_encode()); 1981 Register receiver_klass = r_temp_1; 1982 1983 __ cmpdi(CCR0, R3_ARG1, 0); 1984 __ beq(CCR0, ic_miss); 1985 __ verify_oop(R3_ARG1); 1986 __ load_klass(receiver_klass, R3_ARG1); 1987 1988 __ cmpd(CCR0, receiver_klass, ic); 1989 __ bne(CCR0, ic_miss); 1990 } 1991 1992 1993 // Generate the Verified Entry Point (VEP). 1994 // -------------------------------------------------------------------------- 1995 vep_start_pc = (intptr_t)__ pc(); 1996 1997 __ save_LR_CR(r_temp_1); 1998 __ generate_stack_overflow_check(frame_size_in_bytes); // Check before creating frame. 1999 __ mr(r_callers_sp, R1_SP); // Remember frame pointer. 2000 __ push_frame(frame_size_in_bytes, r_temp_1); // Push the c2n adapter's frame. 2001 frame_done_pc = (intptr_t)__ pc(); 2002 2003 // Native nmethod wrappers never take possesion of the oop arguments. 2004 // So the caller will gc the arguments. 2005 // The only thing we need an oopMap for is if the call is static. 2006 // 2007 // An OopMap for lock (and class if static), and one for the VM call itself. 2008 OopMapSet *oop_maps = new OopMapSet(); 2009 OopMap *oop_map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 2010 2011 if (is_critical_native) { 2012 check_needs_gc_for_critical_native(masm, stack_slots, total_in_args, oop_handle_slot_offset, oop_maps, in_regs, in_sig_bt, r_temp_1); 2013 } 2014 2015 // Move arguments from register/stack to register/stack. 2016 // -------------------------------------------------------------------------- 2017 // 2018 // We immediately shuffle the arguments so that for any vm call we have 2019 // to make from here on out (sync slow path, jvmti, etc.) we will have 2020 // captured the oops from our caller and have a valid oopMap for them. 2021 // 2022 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* 2023 // (derived from JavaThread* which is in R16_thread) and, if static, 2024 // the class mirror instead of a receiver. This pretty much guarantees that 2025 // register layout will not match. We ignore these extra arguments during 2026 // the shuffle. The shuffle is described by the two calling convention 2027 // vectors we have in our possession. We simply walk the java vector to 2028 // get the source locations and the c vector to get the destinations. 2029 2030 // Record sp-based slot for receiver on stack for non-static methods. 2031 int receiver_offset = -1; 2032 2033 // We move the arguments backward because the floating point registers 2034 // destination will always be to a register with a greater or equal 2035 // register number or the stack. 2036 // in is the index of the incoming Java arguments 2037 // out is the index of the outgoing C arguments 2038 2039#ifdef ASSERT 2040 bool reg_destroyed[RegisterImpl::number_of_registers]; 2041 bool freg_destroyed[FloatRegisterImpl::number_of_registers]; 2042 for (int r = 0 ; r < RegisterImpl::number_of_registers ; r++) { 2043 reg_destroyed[r] = false; 2044 } 2045 for (int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++) { 2046 freg_destroyed[f] = false; 2047 } 2048#endif // ASSERT 2049 2050 for (int in = total_in_args - 1, out = total_c_args - 1; in >= 0 ; in--, out--) { 2051 2052#ifdef ASSERT 2053 if (in_regs[in].first()->is_Register()) { 2054 assert(!reg_destroyed[in_regs[in].first()->as_Register()->encoding()], "ack!"); 2055 } else if (in_regs[in].first()->is_FloatRegister()) { 2056 assert(!freg_destroyed[in_regs[in].first()->as_FloatRegister()->encoding()], "ack!"); 2057 } 2058 if (out_regs[out].first()->is_Register()) { 2059 reg_destroyed[out_regs[out].first()->as_Register()->encoding()] = true; 2060 } else if (out_regs[out].first()->is_FloatRegister()) { 2061 freg_destroyed[out_regs[out].first()->as_FloatRegister()->encoding()] = true; 2062 } 2063 if (out_regs2[out].first()->is_Register()) { 2064 reg_destroyed[out_regs2[out].first()->as_Register()->encoding()] = true; 2065 } else if (out_regs2[out].first()->is_FloatRegister()) { 2066 freg_destroyed[out_regs2[out].first()->as_FloatRegister()->encoding()] = true; 2067 } 2068#endif // ASSERT 2069 2070 switch (in_sig_bt[in]) { 2071 case T_BOOLEAN: 2072 case T_CHAR: 2073 case T_BYTE: 2074 case T_SHORT: 2075 case T_INT: 2076 guarantee(in > 0 && in_sig_bt[in-1] == T_LONG, 2077 "expecting type (T_LONG,bt) for bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}"); 2078 break; 2079 case T_LONG: 2080 if (in_sig_bt[in+1] == T_VOID) { 2081 long_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1); 2082 } else { 2083 guarantee(in_sig_bt[in+1] == T_BOOLEAN || in_sig_bt[in+1] == T_CHAR || 2084 in_sig_bt[in+1] == T_BYTE || in_sig_bt[in+1] == T_SHORT || 2085 in_sig_bt[in+1] == T_INT, 2086 "expecting type (T_LONG,bt) for bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}"); 2087 int_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1); 2088 } 2089 break; 2090 case T_ARRAY: 2091 if (is_critical_native) { 2092 int body_arg = out; 2093 out -= 2; // Point to length arg. PPC64: pass ints as longs. 2094 unpack_array_argument(masm, in_regs[in], in_elem_bt[in], out_regs[body_arg], out_regs[out], 2095 r_callers_sp, r_temp_1, r_temp_2); 2096 break; 2097 } 2098 case T_OBJECT: 2099 assert(!is_critical_native, "no oop arguments"); 2100 object_move(masm, stack_slots, 2101 oop_map, oop_handle_slot_offset, 2102 ((in == 0) && (!method_is_static)), &receiver_offset, 2103 in_regs[in], out_regs[out], 2104 r_callers_sp, r_temp_1, r_temp_2); 2105 break; 2106 case T_VOID: 2107 break; 2108 case T_FLOAT: 2109 float_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1); 2110 if (out_regs2[out].first()->is_valid()) { 2111 float_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1); 2112 } 2113 break; 2114 case T_DOUBLE: 2115 double_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1); 2116 if (out_regs2[out].first()->is_valid()) { 2117 double_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1); 2118 } 2119 break; 2120 case T_ADDRESS: 2121 fatal("found type (T_ADDRESS) in java args"); 2122 break; 2123 default: 2124 ShouldNotReachHere(); 2125 break; 2126 } 2127 } 2128 2129 // Pre-load a static method's oop into ARG2. 2130 // Used both by locking code and the normal JNI call code. 2131 if (method_is_static && !is_critical_native) { 2132 __ set_oop_constant(JNIHandles::make_local(method->method_holder()->java_mirror()), 2133 r_carg2_classorobject); 2134 2135 // Now handlize the static class mirror in carg2. It's known not-null. 2136 __ std(r_carg2_classorobject, klass_offset, R1_SP); 2137 oop_map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); 2138 __ addi(r_carg2_classorobject, R1_SP, klass_offset); 2139 } 2140 2141 // Get JNIEnv* which is first argument to native. 2142 if (!is_critical_native) { 2143 __ addi(r_carg1_jnienv, R16_thread, in_bytes(JavaThread::jni_environment_offset())); 2144 } 2145 2146 // NOTE: 2147 // 2148 // We have all of the arguments setup at this point. 2149 // We MUST NOT touch any outgoing regs from this point on. 2150 // So if we must call out we must push a new frame. 2151 2152 // Get current pc for oopmap, and load it patchable relative to global toc. 2153 oopmap_pc = (intptr_t) __ pc(); 2154 __ calculate_address_from_global_toc(r_return_pc, (address)oopmap_pc, true, true, true, true); 2155 2156 // We use the same pc/oopMap repeatedly when we call out. 2157 oop_maps->add_gc_map(oopmap_pc - start_pc, oop_map); 2158 2159 // r_return_pc now has the pc loaded that we will use when we finally call 2160 // to native. 2161 2162 // Make sure that thread is non-volatile; it crosses a bunch of VM calls below. 2163 assert(R16_thread->is_nonvolatile(), "thread must be in non-volatile register"); 2164 2165 2166# if 0 2167 // DTrace method entry 2168# endif 2169 2170 // Lock a synchronized method. 2171 // -------------------------------------------------------------------------- 2172 2173 if (method->is_synchronized()) { 2174 assert(!is_critical_native, "unhandled"); 2175 ConditionRegister r_flag = CCR1; 2176 Register r_oop = r_temp_4; 2177 const Register r_box = r_temp_5; 2178 Label done, locked; 2179 2180 // Load the oop for the object or class. r_carg2_classorobject contains 2181 // either the handlized oop from the incoming arguments or the handlized 2182 // class mirror (if the method is static). 2183 __ ld(r_oop, 0, r_carg2_classorobject); 2184 2185 // Get the lock box slot's address. 2186 __ addi(r_box, R1_SP, lock_offset); 2187 2188# ifdef ASSERT 2189 if (UseBiasedLocking) { 2190 // Making the box point to itself will make it clear it went unused 2191 // but also be obviously invalid. 2192 __ std(r_box, 0, r_box); 2193 } 2194# endif // ASSERT 2195 2196 // Try fastpath for locking. 2197 // fast_lock kills r_temp_1, r_temp_2, r_temp_3. 2198 __ compiler_fast_lock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3); 2199 __ beq(r_flag, locked); 2200 2201 // None of the above fast optimizations worked so we have to get into the 2202 // slow case of monitor enter. Inline a special case of call_VM that 2203 // disallows any pending_exception. 2204 2205 // Save argument registers and leave room for C-compatible ABI_112. 2206 int frame_size = frame::abi_112_size + 2207 round_to(total_c_args * wordSize, frame::alignment_in_bytes); 2208 __ mr(R11_scratch1, R1_SP); 2209 RegisterSaver::push_frame_and_save_argument_registers(masm, R12_scratch2, frame_size, total_c_args, out_regs, out_regs2); 2210 2211 // Do the call. 2212 __ set_last_Java_frame(R11_scratch1, r_return_pc); 2213 assert(r_return_pc->is_nonvolatile(), "expecting return pc to be in non-volatile register"); 2214 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), r_oop, r_box, R16_thread); 2215 __ reset_last_Java_frame(); 2216 2217 RegisterSaver::restore_argument_registers_and_pop_frame(masm, frame_size, total_c_args, out_regs, out_regs2); 2218 2219 __ asm_assert_mem8_is_zero(thread_(pending_exception), 2220 "no pending exception allowed on exit from SharedRuntime::complete_monitor_locking_C", 0); 2221 2222 __ bind(locked); 2223 } 2224 2225 2226 // Publish thread state 2227 // -------------------------------------------------------------------------- 2228 2229 // Use that pc we placed in r_return_pc a while back as the current frame anchor. 2230 __ set_last_Java_frame(R1_SP, r_return_pc); 2231 2232 // Transition from _thread_in_Java to _thread_in_native. 2233 __ li(R0, _thread_in_native); 2234 __ release(); 2235 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size"); 2236 __ stw(R0, thread_(thread_state)); 2237 if (UseMembar) { 2238 __ fence(); 2239 } 2240 2241 2242 // The JNI call 2243 // -------------------------------------------------------------------------- 2244 2245 FunctionDescriptor* fd_native_method = (FunctionDescriptor*) native_func; 2246 __ call_c(fd_native_method, relocInfo::runtime_call_type); 2247 2248 2249 // Now, we are back from the native code. 2250 2251 2252 // Unpack the native result. 2253 // -------------------------------------------------------------------------- 2254 2255 // For int-types, we do any needed sign-extension required. 2256 // Care must be taken that the return values (R3_RET and F1_RET) 2257 // will survive any VM calls for blocking or unlocking. 2258 // An OOP result (handle) is done specially in the slow-path code. 2259 2260 switch (ret_type) { 2261 case T_VOID: break; // Nothing to do! 2262 case T_FLOAT: break; // Got it where we want it (unless slow-path). 2263 case T_DOUBLE: break; // Got it where we want it (unless slow-path). 2264 case T_LONG: break; // Got it where we want it (unless slow-path). 2265 case T_OBJECT: break; // Really a handle. 2266 // Cannot de-handlize until after reclaiming jvm_lock. 2267 case T_ARRAY: break; 2268 2269 case T_BOOLEAN: { // 0 -> false(0); !0 -> true(1) 2270 Label skip_modify; 2271 __ cmpwi(CCR0, R3_RET, 0); 2272 __ beq(CCR0, skip_modify); 2273 __ li(R3_RET, 1); 2274 __ bind(skip_modify); 2275 break; 2276 } 2277 case T_BYTE: { // sign extension 2278 __ extsb(R3_RET, R3_RET); 2279 break; 2280 } 2281 case T_CHAR: { // unsigned result 2282 __ andi(R3_RET, R3_RET, 0xffff); 2283 break; 2284 } 2285 case T_SHORT: { // sign extension 2286 __ extsh(R3_RET, R3_RET); 2287 break; 2288 } 2289 case T_INT: // nothing to do 2290 break; 2291 default: 2292 ShouldNotReachHere(); 2293 break; 2294 } 2295 2296 2297 // Publish thread state 2298 // -------------------------------------------------------------------------- 2299 2300 // Switch thread to "native transition" state before reading the 2301 // synchronization state. This additional state is necessary because reading 2302 // and testing the synchronization state is not atomic w.r.t. GC, as this 2303 // scenario demonstrates: 2304 // - Java thread A, in _thread_in_native state, loads _not_synchronized 2305 // and is preempted. 2306 // - VM thread changes sync state to synchronizing and suspends threads 2307 // for GC. 2308 // - Thread A is resumed to finish this native method, but doesn't block 2309 // here since it didn't see any synchronization in progress, and escapes. 2310 2311 // Transition from _thread_in_native to _thread_in_native_trans. 2312 __ li(R0, _thread_in_native_trans); 2313 __ release(); 2314 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size"); 2315 __ stw(R0, thread_(thread_state)); 2316 2317 2318 // Must we block? 2319 // -------------------------------------------------------------------------- 2320 2321 // Block, if necessary, before resuming in _thread_in_Java state. 2322 // In order for GC to work, don't clear the last_Java_sp until after blocking. 2323 Label after_transition; 2324 { 2325 Label no_block, sync; 2326 2327 if (os::is_MP()) { 2328 if (UseMembar) { 2329 // Force this write out before the read below. 2330 __ fence(); 2331 } else { 2332 // Write serialization page so VM thread can do a pseudo remote membar. 2333 // We use the current thread pointer to calculate a thread specific 2334 // offset to write to within the page. This minimizes bus traffic 2335 // due to cache line collision. 2336 __ serialize_memory(R16_thread, r_temp_4, r_temp_5); 2337 } 2338 } 2339 2340 Register sync_state_addr = r_temp_4; 2341 Register sync_state = r_temp_5; 2342 Register suspend_flags = r_temp_6; 2343 2344 __ load_const(sync_state_addr, SafepointSynchronize::address_of_state(), /*temp*/ sync_state); 2345 2346 // TODO: PPC port assert(4 == SafepointSynchronize::sz_state(), "unexpected field size"); 2347 __ lwz(sync_state, 0, sync_state_addr); 2348 2349 // TODO: PPC port assert(4 == Thread::sz_suspend_flags(), "unexpected field size"); 2350 __ lwz(suspend_flags, thread_(suspend_flags)); 2351 2352 __ acquire(); 2353 2354 Label do_safepoint; 2355 // No synchronization in progress nor yet synchronized. 2356 __ cmpwi(CCR0, sync_state, SafepointSynchronize::_not_synchronized); 2357 // Not suspended. 2358 __ cmpwi(CCR1, suspend_flags, 0); 2359 2360 __ bne(CCR0, sync); 2361 __ beq(CCR1, no_block); 2362 2363 // Block. Save any potential method result value before the operation and 2364 // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this 2365 // lets us share the oopMap we used when we went native rather than create 2366 // a distinct one for this pc. 2367 __ bind(sync); 2368 2369 address entry_point = is_critical_native 2370 ? CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition) 2371 : CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans); 2372 save_native_result(masm, ret_type, workspace_slot_offset); 2373 __ call_VM_leaf(entry_point, R16_thread); 2374 restore_native_result(masm, ret_type, workspace_slot_offset); 2375 2376 if (is_critical_native) { 2377 __ b(after_transition); // No thread state transition here. 2378 } 2379 __ bind(no_block); 2380 } 2381 2382 // Publish thread state. 2383 // -------------------------------------------------------------------------- 2384 2385 // Thread state is thread_in_native_trans. Any safepoint blocking has 2386 // already happened so we can now change state to _thread_in_Java. 2387 2388 // Transition from _thread_in_native_trans to _thread_in_Java. 2389 __ li(R0, _thread_in_Java); 2390 __ release(); 2391 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size"); 2392 __ stw(R0, thread_(thread_state)); 2393 if (UseMembar) { 2394 __ fence(); 2395 } 2396 __ bind(after_transition); 2397 2398 // Reguard any pages if necessary. 2399 // -------------------------------------------------------------------------- 2400 2401 Label no_reguard; 2402 __ lwz(r_temp_1, thread_(stack_guard_state)); 2403 __ cmpwi(CCR0, r_temp_1, JavaThread::stack_guard_yellow_disabled); 2404 __ bne(CCR0, no_reguard); 2405 2406 save_native_result(masm, ret_type, workspace_slot_offset); 2407 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)); 2408 restore_native_result(masm, ret_type, workspace_slot_offset); 2409 2410 __ bind(no_reguard); 2411 2412 2413 // Unlock 2414 // -------------------------------------------------------------------------- 2415 2416 if (method->is_synchronized()) { 2417 2418 ConditionRegister r_flag = CCR1; 2419 const Register r_oop = r_temp_4; 2420 const Register r_box = r_temp_5; 2421 const Register r_exception = r_temp_6; 2422 Label done; 2423 2424 // Get oop and address of lock object box. 2425 if (method_is_static) { 2426 assert(klass_offset != -1, ""); 2427 __ ld(r_oop, klass_offset, R1_SP); 2428 } else { 2429 assert(receiver_offset != -1, ""); 2430 __ ld(r_oop, receiver_offset, R1_SP); 2431 } 2432 __ addi(r_box, R1_SP, lock_offset); 2433 2434 // Try fastpath for unlocking. 2435 __ compiler_fast_unlock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3); 2436 __ beq(r_flag, done); 2437 2438 // Save and restore any potential method result value around the unlocking operation. 2439 save_native_result(masm, ret_type, workspace_slot_offset); 2440 2441 // Must save pending exception around the slow-path VM call. Since it's a 2442 // leaf call, the pending exception (if any) can be kept in a register. 2443 __ ld(r_exception, thread_(pending_exception)); 2444 assert(r_exception->is_nonvolatile(), "exception register must be non-volatile"); 2445 __ li(R0, 0); 2446 __ std(R0, thread_(pending_exception)); 2447 2448 // Slow case of monitor enter. 2449 // Inline a special case of call_VM that disallows any pending_exception. 2450 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), r_oop, r_box); 2451 2452 __ asm_assert_mem8_is_zero(thread_(pending_exception), 2453 "no pending exception allowed on exit from SharedRuntime::complete_monitor_unlocking_C", 0); 2454 2455 restore_native_result(masm, ret_type, workspace_slot_offset); 2456 2457 // Check_forward_pending_exception jump to forward_exception if any pending 2458 // exception is set. The forward_exception routine expects to see the 2459 // exception in pending_exception and not in a register. Kind of clumsy, 2460 // since all folks who branch to forward_exception must have tested 2461 // pending_exception first and hence have it in a register already. 2462 __ std(r_exception, thread_(pending_exception)); 2463 2464 __ bind(done); 2465 } 2466 2467# if 0 2468 // DTrace method exit 2469# endif 2470 2471 // Clear "last Java frame" SP and PC. 2472 // -------------------------------------------------------------------------- 2473 2474 __ reset_last_Java_frame(); 2475 2476 // Unpack oop result. 2477 // -------------------------------------------------------------------------- 2478 2479 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { 2480 Label skip_unboxing; 2481 __ cmpdi(CCR0, R3_RET, 0); 2482 __ beq(CCR0, skip_unboxing); 2483 __ ld(R3_RET, 0, R3_RET); 2484 __ bind(skip_unboxing); 2485 __ verify_oop(R3_RET); 2486 } 2487 2488 2489 // Reset handle block. 2490 // -------------------------------------------------------------------------- 2491 if (!is_critical_native) { 2492 __ ld(r_temp_1, thread_(active_handles)); 2493 // TODO: PPC port assert(4 == JNIHandleBlock::top_size_in_bytes(), "unexpected field size"); 2494 __ li(r_temp_2, 0); 2495 __ stw(r_temp_2, JNIHandleBlock::top_offset_in_bytes(), r_temp_1); 2496 2497 2498 // Check for pending exceptions. 2499 // -------------------------------------------------------------------------- 2500 __ ld(r_temp_2, thread_(pending_exception)); 2501 __ cmpdi(CCR0, r_temp_2, 0); 2502 __ bne(CCR0, handle_pending_exception); 2503 } 2504 2505 // Return 2506 // -------------------------------------------------------------------------- 2507 2508 __ pop_frame(); 2509 __ restore_LR_CR(R11); 2510 __ blr(); 2511 2512 2513 // Handler for pending exceptions (out-of-line). 2514 // -------------------------------------------------------------------------- 2515 2516 // Since this is a native call, we know the proper exception handler 2517 // is the empty function. We just pop this frame and then jump to 2518 // forward_exception_entry. 2519 if (!is_critical_native) { 2520 __ align(InteriorEntryAlignment); 2521 __ bind(handle_pending_exception); 2522 2523 __ pop_frame(); 2524 __ restore_LR_CR(R11); 2525 __ b64_patchable((address)StubRoutines::forward_exception_entry(), 2526 relocInfo::runtime_call_type); 2527 } 2528 2529 // Handler for a cache miss (out-of-line). 2530 // -------------------------------------------------------------------------- 2531 2532 if (!method_is_static) { 2533 __ align(InteriorEntryAlignment); 2534 __ bind(ic_miss); 2535 2536 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), 2537 relocInfo::runtime_call_type); 2538 } 2539 2540 // Done. 2541 // -------------------------------------------------------------------------- 2542 2543 __ flush(); 2544 2545 nmethod *nm = nmethod::new_native_nmethod(method, 2546 compile_id, 2547 masm->code(), 2548 vep_start_pc-start_pc, 2549 frame_done_pc-start_pc, 2550 stack_slots / VMRegImpl::slots_per_word, 2551 (method_is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), 2552 in_ByteSize(lock_offset), 2553 oop_maps); 2554 2555 if (is_critical_native) { 2556 nm->set_lazy_critical_native(true); 2557 } 2558 2559 return nm; 2560#else 2561 ShouldNotReachHere(); 2562 return NULL; 2563#endif // COMPILER2 2564} 2565 2566// This function returns the adjust size (in number of words) to a c2i adapter 2567// activation for use during deoptimization. 2568int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) { 2569 return round_to((callee_locals - callee_parameters) * Interpreter::stackElementWords, frame::alignment_in_bytes); 2570} 2571 2572uint SharedRuntime::out_preserve_stack_slots() { 2573#ifdef COMPILER2 2574 return frame::jit_out_preserve_size / VMRegImpl::stack_slot_size; 2575#else 2576 return 0; 2577#endif 2578} 2579 2580#ifdef COMPILER2 2581// Frame generation for deopt and uncommon trap blobs. 2582static void push_skeleton_frame(MacroAssembler* masm, bool deopt, 2583 /* Read */ 2584 Register unroll_block_reg, 2585 /* Update */ 2586 Register frame_sizes_reg, 2587 Register number_of_frames_reg, 2588 Register pcs_reg, 2589 /* Invalidate */ 2590 Register frame_size_reg, 2591 Register pc_reg) { 2592 2593 __ ld(pc_reg, 0, pcs_reg); 2594 __ ld(frame_size_reg, 0, frame_sizes_reg); 2595 __ std(pc_reg, _abi(lr), R1_SP); 2596 __ push_frame(frame_size_reg, R0/*tmp*/); 2597 __ std(R1_SP, _parent_ijava_frame_abi(initial_caller_sp), R1_SP); 2598 __ addi(number_of_frames_reg, number_of_frames_reg, -1); 2599 __ addi(frame_sizes_reg, frame_sizes_reg, wordSize); 2600 __ addi(pcs_reg, pcs_reg, wordSize); 2601} 2602 2603// Loop through the UnrollBlock info and create new frames. 2604static void push_skeleton_frames(MacroAssembler* masm, bool deopt, 2605 /* read */ 2606 Register unroll_block_reg, 2607 /* invalidate */ 2608 Register frame_sizes_reg, 2609 Register number_of_frames_reg, 2610 Register pcs_reg, 2611 Register frame_size_reg, 2612 Register pc_reg) { 2613 Label loop; 2614 2615 // _number_of_frames is of type int (deoptimization.hpp) 2616 __ lwa(number_of_frames_reg, 2617 Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes(), 2618 unroll_block_reg); 2619 __ ld(pcs_reg, 2620 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes(), 2621 unroll_block_reg); 2622 __ ld(frame_sizes_reg, 2623 Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes(), 2624 unroll_block_reg); 2625 2626 // stack: (caller_of_deoptee, ...). 2627 2628 // At this point we either have an interpreter frame or a compiled 2629 // frame on top of stack. If it is a compiled frame we push a new c2i 2630 // adapter here 2631 2632 // Memorize top-frame stack-pointer. 2633 __ mr(frame_size_reg/*old_sp*/, R1_SP); 2634 2635 // Resize interpreter top frame OR C2I adapter. 2636 2637 // At this moment, the top frame (which is the caller of the deoptee) is 2638 // an interpreter frame or a newly pushed C2I adapter or an entry frame. 2639 // The top frame has a TOP_IJAVA_FRAME_ABI and the frame contains the 2640 // outgoing arguments. 2641 // 2642 // In order to push the interpreter frame for the deoptee, we need to 2643 // resize the top frame such that we are able to place the deoptee's 2644 // locals in the frame. 2645 // Additionally, we have to turn the top frame's TOP_IJAVA_FRAME_ABI 2646 // into a valid PARENT_IJAVA_FRAME_ABI. 2647 2648 __ lwa(R11_scratch1, 2649 Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes(), 2650 unroll_block_reg); 2651 __ neg(R11_scratch1, R11_scratch1); 2652 2653 // R11_scratch1 contains size of locals for frame resizing. 2654 // R12_scratch2 contains top frame's lr. 2655 2656 // Resize frame by complete frame size prevents TOC from being 2657 // overwritten by locals. A more stack space saving way would be 2658 // to copy the TOC to its location in the new abi. 2659 __ addi(R11_scratch1, R11_scratch1, - frame::parent_ijava_frame_abi_size); 2660 2661 // now, resize the frame 2662 __ resize_frame(R11_scratch1, pc_reg/*tmp*/); 2663 2664 // In the case where we have resized a c2i frame above, the optional 2665 // alignment below the locals has size 32 (why?). 2666 __ std(R12_scratch2, _abi(lr), R1_SP); 2667 2668 // Initialize initial_caller_sp. 2669 __ std(frame_size_reg/*old_sp*/, _parent_ijava_frame_abi(initial_caller_sp), R1_SP); 2670 2671#ifdef ASSERT 2672 // Make sure that there is at least one entry in the array. 2673 __ cmpdi(CCR0, number_of_frames_reg, 0); 2674 __ asm_assert_ne("array_size must be > 0", 0x205); 2675#endif 2676 2677 // Now push the new interpreter frames. 2678 // 2679 __ bind(loop); 2680 // Allocate a new frame, fill in the pc. 2681 push_skeleton_frame(masm, deopt, 2682 unroll_block_reg, 2683 frame_sizes_reg, 2684 number_of_frames_reg, 2685 pcs_reg, 2686 frame_size_reg, 2687 pc_reg); 2688 __ cmpdi(CCR0, number_of_frames_reg, 0); 2689 __ bne(CCR0, loop); 2690 2691 // Get the return address pointing into the frame manager. 2692 __ ld(R0, 0, pcs_reg); 2693 // Store it in the top interpreter frame. 2694 __ std(R0, _abi(lr), R1_SP); 2695 // Initialize frame_manager_lr of interpreter top frame. 2696 __ std(R0, _top_ijava_frame_abi(frame_manager_lr), R1_SP); 2697} 2698#endif 2699 2700void SharedRuntime::generate_deopt_blob() { 2701 // Allocate space for the code 2702 ResourceMark rm; 2703 // Setup code generation tools 2704 CodeBuffer buffer("deopt_blob", 2048, 1024); 2705 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer); 2706 Label exec_mode_initialized; 2707 int frame_size_in_words; 2708 OopMap* map = NULL; 2709 OopMapSet *oop_maps = new OopMapSet(); 2710 2711 // size of ABI112 plus spill slots for R3_RET and F1_RET. 2712 const int frame_size_in_bytes = frame::abi_112_spill_size; 2713 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint); 2714 int first_frame_size_in_bytes = 0; // frame size of "unpack frame" for call to fetch_unroll_info. 2715 2716 const Register exec_mode_reg = R21_tmp1; 2717 2718 const address start = __ pc(); 2719 2720#ifdef COMPILER2 2721 // -------------------------------------------------------------------------- 2722 // Prolog for non exception case! 2723 2724 // We have been called from the deopt handler of the deoptee. 2725 // 2726 // deoptee: 2727 // ... 2728 // call X 2729 // ... 2730 // deopt_handler: call_deopt_stub 2731 // cur. return pc --> ... 2732 // 2733 // So currently SR_LR points behind the call in the deopt handler. 2734 // We adjust it such that it points to the start of the deopt handler. 2735 // The return_pc has been stored in the frame of the deoptee and 2736 // will replace the address of the deopt_handler in the call 2737 // to Deoptimization::fetch_unroll_info below. 2738 // We can't grab a free register here, because all registers may 2739 // contain live values, so let the RegisterSaver do the adjustment 2740 // of the return pc. 2741 const int return_pc_adjustment_no_exception = -size_deopt_handler(); 2742 2743 // Push the "unpack frame" 2744 // Save everything in sight. 2745 map = RegisterSaver::push_frame_abi112_and_save_live_registers(masm, 2746 &first_frame_size_in_bytes, 2747 /*generate_oop_map=*/ true, 2748 return_pc_adjustment_no_exception, 2749 RegisterSaver::return_pc_is_lr); 2750 assert(map != NULL, "OopMap must have been created"); 2751 2752 __ li(exec_mode_reg, Deoptimization::Unpack_deopt); 2753 // Save exec mode for unpack_frames. 2754 __ b(exec_mode_initialized); 2755 2756 // -------------------------------------------------------------------------- 2757 // Prolog for exception case 2758 2759 // An exception is pending. 2760 // We have been called with a return (interpreter) or a jump (exception blob). 2761 // 2762 // - R3_ARG1: exception oop 2763 // - R4_ARG2: exception pc 2764 2765 int exception_offset = __ pc() - start; 2766 2767 BLOCK_COMMENT("Prolog for exception case"); 2768 2769 // The RegisterSaves doesn't need to adjust the return pc for this situation. 2770 const int return_pc_adjustment_exception = 0; 2771 2772 // Push the "unpack frame". 2773 // Save everything in sight. 2774 assert(R4 == R4_ARG2, "exception pc must be in r4"); 2775 RegisterSaver::push_frame_abi112_and_save_live_registers(masm, 2776 &first_frame_size_in_bytes, 2777 /*generate_oop_map=*/ false, 2778 return_pc_adjustment_exception, 2779 RegisterSaver::return_pc_is_r4); 2780 2781 // Deopt during an exception. Save exec mode for unpack_frames. 2782 __ li(exec_mode_reg, Deoptimization::Unpack_exception); 2783 2784 // Store exception oop and pc in thread (location known to GC). 2785 // This is needed since the call to "fetch_unroll_info()" may safepoint. 2786 __ std(R3_ARG1, in_bytes(JavaThread::exception_oop_offset()), R16_thread); 2787 __ std(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread); 2788 2789 // fall through 2790 2791 // -------------------------------------------------------------------------- 2792 __ BIND(exec_mode_initialized); 2793 2794 { 2795 const Register unroll_block_reg = R22_tmp2; 2796 2797 // We need to set `last_Java_frame' because `fetch_unroll_info' will 2798 // call `last_Java_frame()'. The value of the pc in the frame is not 2799 // particularly important. It just needs to identify this blob. 2800 __ set_last_Java_frame(R1_SP, noreg); 2801 2802 // With EscapeAnalysis turned on, this call may safepoint! 2803 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), R16_thread); 2804 address calls_return_pc = __ last_calls_return_pc(); 2805 // Set an oopmap for the call site that describes all our saved registers. 2806 oop_maps->add_gc_map(calls_return_pc - start, map); 2807 2808 __ reset_last_Java_frame(); 2809 // Save the return value. 2810 __ mr(unroll_block_reg, R3_RET); 2811 2812 // Restore only the result registers that have been saved 2813 // by save_volatile_registers(...). 2814 RegisterSaver::restore_result_registers(masm, first_frame_size_in_bytes); 2815 2816 // In excp_deopt_mode, restore and clear exception oop which we 2817 // stored in the thread during exception entry above. The exception 2818 // oop will be the return value of this stub. 2819 Label skip_restore_excp; 2820 __ cmpdi(CCR0, exec_mode_reg, Deoptimization::Unpack_exception); 2821 __ bne(CCR0, skip_restore_excp); 2822 __ ld(R3_RET, in_bytes(JavaThread::exception_oop_offset()), R16_thread); 2823 __ ld(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread); 2824 __ li(R0, 0); 2825 __ std(R0, in_bytes(JavaThread::exception_pc_offset()), R16_thread); 2826 __ std(R0, in_bytes(JavaThread::exception_oop_offset()), R16_thread); 2827 __ BIND(skip_restore_excp); 2828 2829 // reload narrro_oop_base 2830 if (UseCompressedOops && Universe::narrow_oop_base() != 0) { 2831 __ load_const_optimized(R30, Universe::narrow_oop_base()); 2832 } 2833 2834 __ pop_frame(); 2835 2836 // stack: (deoptee, optional i2c, caller of deoptee, ...). 2837 2838 // pop the deoptee's frame 2839 __ pop_frame(); 2840 2841 // stack: (caller_of_deoptee, ...). 2842 2843 // Loop through the `UnrollBlock' info and create interpreter frames. 2844 push_skeleton_frames(masm, true/*deopt*/, 2845 unroll_block_reg, 2846 R23_tmp3, 2847 R24_tmp4, 2848 R25_tmp5, 2849 R26_tmp6, 2850 R27_tmp7); 2851 2852 // stack: (skeletal interpreter frame, ..., optional skeletal 2853 // interpreter frame, optional c2i, caller of deoptee, ...). 2854 } 2855 2856 // push an `unpack_frame' taking care of float / int return values. 2857 __ push_frame(frame_size_in_bytes, R0/*tmp*/); 2858 2859 // stack: (unpack frame, skeletal interpreter frame, ..., optional 2860 // skeletal interpreter frame, optional c2i, caller of deoptee, 2861 // ...). 2862 2863 // Spill live volatile registers since we'll do a call. 2864 __ std( R3_RET, _abi_112_spill(spill_ret), R1_SP); 2865 __ stfd(F1_RET, _abi_112_spill(spill_fret), R1_SP); 2866 2867 // Let the unpacker layout information in the skeletal frames just 2868 // allocated. 2869 __ get_PC_trash_LR(R3_RET); 2870 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R3_RET); 2871 // This is a call to a LEAF method, so no oop map is required. 2872 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), 2873 R16_thread/*thread*/, exec_mode_reg/*exec_mode*/); 2874 __ reset_last_Java_frame(); 2875 2876 // Restore the volatiles saved above. 2877 __ ld( R3_RET, _abi_112_spill(spill_ret), R1_SP); 2878 __ lfd(F1_RET, _abi_112_spill(spill_fret), R1_SP); 2879 2880 // Pop the unpack frame. 2881 __ pop_frame(); 2882 __ restore_LR_CR(R0); 2883 2884 // stack: (top interpreter frame, ..., optional interpreter frame, 2885 // optional c2i, caller of deoptee, ...). 2886 2887 // Initialize R14_state. 2888 __ ld(R14_state, 0, R1_SP); 2889 __ addi(R14_state, R14_state, 2890 -frame::interpreter_frame_cinterpreterstate_size_in_bytes()); 2891 // Also inititialize R15_prev_state. 2892 __ restore_prev_state(); 2893 2894 // Return to the interpreter entry point. 2895 __ blr(); 2896 __ flush(); 2897#else // COMPILER2 2898 __ unimplemented("deopt blob needed only with compiler"); 2899 int exception_offset = __ pc() - start; 2900#endif // COMPILER2 2901 2902 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, 0, first_frame_size_in_bytes / wordSize); 2903} 2904 2905#ifdef COMPILER2 2906void SharedRuntime::generate_uncommon_trap_blob() { 2907 // Allocate space for the code. 2908 ResourceMark rm; 2909 // Setup code generation tools. 2910 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); 2911 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer); 2912 address start = __ pc(); 2913 2914 Register unroll_block_reg = R21_tmp1; 2915 Register klass_index_reg = R22_tmp2; 2916 Register unc_trap_reg = R23_tmp3; 2917 2918 OopMapSet* oop_maps = new OopMapSet(); 2919 int frame_size_in_bytes = frame::abi_112_size; 2920 OopMap* map = new OopMap(frame_size_in_bytes / sizeof(jint), 0); 2921 2922 // stack: (deoptee, optional i2c, caller_of_deoptee, ...). 2923 2924 // Push a dummy `unpack_frame' and call 2925 // `Deoptimization::uncommon_trap' to pack the compiled frame into a 2926 // vframe array and return the `UnrollBlock' information. 2927 2928 // Save LR to compiled frame. 2929 __ save_LR_CR(R11_scratch1); 2930 2931 // Push an "uncommon_trap" frame. 2932 __ push_frame_abi112(0, R11_scratch1); 2933 2934 // stack: (unpack frame, deoptee, optional i2c, caller_of_deoptee, ...). 2935 2936 // Set the `unpack_frame' as last_Java_frame. 2937 // `Deoptimization::uncommon_trap' expects it and considers its 2938 // sender frame as the deoptee frame. 2939 // Remember the offset of the instruction whose address will be 2940 // moved to R11_scratch1. 2941 address gc_map_pc = __ get_PC_trash_LR(R11_scratch1); 2942 2943 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1); 2944 2945 __ mr(klass_index_reg, R3); 2946 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap), 2947 R16_thread, klass_index_reg); 2948 2949 // Set an oopmap for the call site. 2950 oop_maps->add_gc_map(gc_map_pc - start, map); 2951 2952 __ reset_last_Java_frame(); 2953 2954 // Pop the `unpack frame'. 2955 __ pop_frame(); 2956 2957 // stack: (deoptee, optional i2c, caller_of_deoptee, ...). 2958 2959 // Save the return value. 2960 __ mr(unroll_block_reg, R3_RET); 2961 2962 // Pop the uncommon_trap frame. 2963 __ pop_frame(); 2964 2965 // stack: (caller_of_deoptee, ...). 2966 2967 // Allocate new interpreter frame(s) and possibly a c2i adapter 2968 // frame. 2969 push_skeleton_frames(masm, false/*deopt*/, 2970 unroll_block_reg, 2971 R22_tmp2, 2972 R23_tmp3, 2973 R24_tmp4, 2974 R25_tmp5, 2975 R26_tmp6); 2976 2977 // stack: (skeletal interpreter frame, ..., optional skeletal 2978 // interpreter frame, optional c2i, caller of deoptee, ...). 2979 2980 // Push a dummy `unpack_frame' taking care of float return values. 2981 // Call `Deoptimization::unpack_frames' to layout information in the 2982 // interpreter frames just created. 2983 2984 // Push a simple "unpack frame" here. 2985 __ push_frame_abi112(0, R11_scratch1); 2986 2987 // stack: (unpack frame, skeletal interpreter frame, ..., optional 2988 // skeletal interpreter frame, optional c2i, caller of deoptee, 2989 // ...). 2990 2991 // Set the "unpack_frame" as last_Java_frame. 2992 __ get_PC_trash_LR(R11_scratch1); 2993 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1); 2994 2995 // Indicate it is the uncommon trap case. 2996 __ li(unc_trap_reg, Deoptimization::Unpack_uncommon_trap); 2997 // Let the unpacker layout information in the skeletal frames just 2998 // allocated. 2999 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), 3000 R16_thread, unc_trap_reg); 3001 3002 __ reset_last_Java_frame(); 3003 // Pop the `unpack frame'. 3004 __ pop_frame(); 3005 // Restore LR from top interpreter frame. 3006 __ restore_LR_CR(R11_scratch1); 3007 3008 // stack: (top interpreter frame, ..., optional interpreter frame, 3009 // optional c2i, caller of deoptee, ...). 3010 3011 // Initialize R14_state, ... 3012 __ ld(R11_scratch1, 0, R1_SP); 3013 __ addi(R14_state, R11_scratch1, 3014 -frame::interpreter_frame_cinterpreterstate_size_in_bytes()); 3015 // also initialize R15_prev_state. 3016 __ restore_prev_state(); 3017 // Return to the interpreter entry point. 3018 __ blr(); 3019 3020 masm->flush(); 3021 3022 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, frame_size_in_bytes/wordSize); 3023} 3024#endif // COMPILER2 3025 3026// Generate a special Compile2Runtime blob that saves all registers, and setup oopmap. 3027SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { 3028 assert(StubRoutines::forward_exception_entry() != NULL, 3029 "must be generated before"); 3030 3031 ResourceMark rm; 3032 OopMapSet *oop_maps = new OopMapSet(); 3033 OopMap* map; 3034 3035 // Allocate space for the code. Setup code generation tools. 3036 CodeBuffer buffer("handler_blob", 2048, 1024); 3037 MacroAssembler* masm = new MacroAssembler(&buffer); 3038 3039 address start = __ pc(); 3040 int frame_size_in_bytes = 0; 3041 3042 RegisterSaver::ReturnPCLocation return_pc_location; 3043 bool cause_return = (poll_type == POLL_AT_RETURN); 3044 if (cause_return) { 3045 // Nothing to do here. The frame has already been popped in MachEpilogNode. 3046 // Register LR already contains the return pc. 3047 return_pc_location = RegisterSaver::return_pc_is_lr; 3048 } else { 3049 // Use thread()->saved_exception_pc() as return pc. 3050 return_pc_location = RegisterSaver::return_pc_is_thread_saved_exception_pc; 3051 } 3052 3053 // Save registers, fpu state, and flags. 3054 map = RegisterSaver::push_frame_abi112_and_save_live_registers(masm, 3055 &frame_size_in_bytes, 3056 /*generate_oop_map=*/ true, 3057 /*return_pc_adjustment=*/0, 3058 return_pc_location); 3059 3060 // The following is basically a call_VM. However, we need the precise 3061 // address of the call in order to generate an oopmap. Hence, we do all the 3062 // work outselves. 3063 __ set_last_Java_frame(/*sp=*/R1_SP, /*pc=*/noreg); 3064 3065 // The return address must always be correct so that the frame constructor 3066 // never sees an invalid pc. 3067 3068 // Do the call 3069 __ call_VM_leaf(call_ptr, R16_thread); 3070 address calls_return_pc = __ last_calls_return_pc(); 3071 3072 // Set an oopmap for the call site. This oopmap will map all 3073 // oop-registers and debug-info registers as callee-saved. This 3074 // will allow deoptimization at this safepoint to find all possible 3075 // debug-info recordings, as well as let GC find all oops. 3076 oop_maps->add_gc_map(calls_return_pc - start, map); 3077 3078 Label noException; 3079 3080 // Clear the last Java frame. 3081 __ reset_last_Java_frame(); 3082 3083 BLOCK_COMMENT(" Check pending exception."); 3084 const Register pending_exception = R0; 3085 __ ld(pending_exception, thread_(pending_exception)); 3086 __ cmpdi(CCR0, pending_exception, 0); 3087 __ beq(CCR0, noException); 3088 3089 // Exception pending 3090 RegisterSaver::restore_live_registers_and_pop_frame(masm, 3091 frame_size_in_bytes, 3092 /*restore_ctr=*/true); 3093 3094 3095 BLOCK_COMMENT(" Jump to forward_exception_entry."); 3096 // Jump to forward_exception_entry, with the issuing PC in LR 3097 // so it looks like the original nmethod called forward_exception_entry. 3098 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type); 3099 3100 // No exception case. 3101 __ BIND(noException); 3102 3103 3104 // Normal exit, restore registers and exit. 3105 RegisterSaver::restore_live_registers_and_pop_frame(masm, 3106 frame_size_in_bytes, 3107 /*restore_ctr=*/true); 3108 3109 __ blr(); 3110 3111 // Make sure all code is generated 3112 masm->flush(); 3113 3114 // Fill-out other meta info 3115 // CodeBlob frame size is in words. 3116 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_bytes / wordSize); 3117} 3118 3119// generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss) 3120// 3121// Generate a stub that calls into the vm to find out the proper destination 3122// of a java call. All the argument registers are live at this point 3123// but since this is generic code we don't know what they are and the caller 3124// must do any gc of the args. 3125// 3126RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { 3127 3128 // allocate space for the code 3129 ResourceMark rm; 3130 3131 CodeBuffer buffer(name, 1000, 512); 3132 MacroAssembler* masm = new MacroAssembler(&buffer); 3133 3134 int frame_size_in_bytes; 3135 3136 OopMapSet *oop_maps = new OopMapSet(); 3137 OopMap* map = NULL; 3138 3139 address start = __ pc(); 3140 3141 map = RegisterSaver::push_frame_abi112_and_save_live_registers(masm, 3142 &frame_size_in_bytes, 3143 /*generate_oop_map*/ true, 3144 /*return_pc_adjustment*/ 0, 3145 RegisterSaver::return_pc_is_lr); 3146 3147 // Use noreg as last_Java_pc, the return pc will be reconstructed 3148 // from the physical frame. 3149 __ set_last_Java_frame(/*sp*/R1_SP, noreg); 3150 3151 int frame_complete = __ offset(); 3152 3153 // Pass R19_method as 2nd (optional) argument, used by 3154 // counter_overflow_stub. 3155 __ call_VM_leaf(destination, R16_thread, R19_method); 3156 address calls_return_pc = __ last_calls_return_pc(); 3157 // Set an oopmap for the call site. 3158 // We need this not only for callee-saved registers, but also for volatile 3159 // registers that the compiler might be keeping live across a safepoint. 3160 // Create the oopmap for the call's return pc. 3161 oop_maps->add_gc_map(calls_return_pc - start, map); 3162 3163 // R3_RET contains the address we are going to jump to assuming no exception got installed. 3164 3165 // clear last_Java_sp 3166 __ reset_last_Java_frame(); 3167 3168 // Check for pending exceptions. 3169 BLOCK_COMMENT("Check for pending exceptions."); 3170 Label pending; 3171 __ ld(R11_scratch1, thread_(pending_exception)); 3172 __ cmpdi(CCR0, R11_scratch1, 0); 3173 __ bne(CCR0, pending); 3174 3175 __ mtctr(R3_RET); // Ctr will not be touched by restore_live_registers_and_pop_frame. 3176 3177 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ false); 3178 3179 // Get the returned methodOop. 3180 __ get_vm_result_2(R19_method); 3181 3182 __ bctr(); 3183 3184 3185 // Pending exception after the safepoint. 3186 __ BIND(pending); 3187 3188 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ true); 3189 3190 // exception pending => remove activation and forward to exception handler 3191 3192 __ li(R11_scratch1, 0); 3193 __ ld(R3_ARG1, thread_(pending_exception)); 3194 __ std(R11_scratch1, in_bytes(JavaThread::vm_result_offset()), R16_thread); 3195 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type); 3196 3197 // ------------- 3198 // Make sure all code is generated. 3199 masm->flush(); 3200 3201 // return the blob 3202 // frame_size_words or bytes?? 3203 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_bytes/wordSize, 3204 oop_maps, true); 3205} 3206