1/* $OpenBSD: sdmmc_ioreg.h,v 1.11 2018/08/09 13:50:15 patrick Exp $ */ 2 3/* 4 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19#ifndef _SDMMC_IOREG_H 20#define _SDMMC_IOREG_H 21 22/* SDIO commands */ /* response type */ 23#define SD_IO_SEND_OP_COND 5 /* R4 */ 24#define SD_IO_RW_DIRECT 52 /* R5 */ 25#define SD_IO_RW_EXTENDED 53 /* R5? */ 26 27/* CMD52 arguments */ 28#define SD_ARG_CMD52_READ (0<<31) 29#define SD_ARG_CMD52_WRITE (1<<31) 30#define SD_ARG_CMD52_FUNC_SHIFT 28 31#define SD_ARG_CMD52_FUNC_MASK 0x7 32#define SD_ARG_CMD52_EXCHANGE (1<<27) 33#define SD_ARG_CMD52_REG_SHIFT 9 34#define SD_ARG_CMD52_REG_MASK 0x1ffff 35#define SD_ARG_CMD52_DATA_SHIFT 0 36#define SD_ARG_CMD52_DATA_MASK 0xff 37#define SD_R5_DATA(resp) ((resp)[0] & 0xff) 38 39/* CMD53 arguments */ 40#define SD_ARG_CMD53_READ (0<<31) 41#define SD_ARG_CMD53_WRITE (1<<31) 42#define SD_ARG_CMD53_FUNC_SHIFT 28 43#define SD_ARG_CMD53_FUNC_MASK 0x7 44#define SD_ARG_CMD53_BLOCK_MODE (1<<27) 45#define SD_ARG_CMD53_INCREMENT (1<<26) 46#define SD_ARG_CMD53_REG_SHIFT 9 47#define SD_ARG_CMD53_REG_MASK 0x1ffff 48#define SD_ARG_CMD53_LENGTH_SHIFT 0 49#define SD_ARG_CMD53_LENGTH_MASK 0x1ff 50#define SD_ARG_CMD53_LENGTH_MAX 511 51 52/* 48-bit response decoding (32 bits w/o CRC) */ 53#define MMC_R4(resp) ((resp)[0]) 54#define MMC_R5(resp) ((resp)[0]) 55 56/* SD R4 response (IO OCR) */ 57#define SD_IO_OCR_MEM_READY (1<<31) 58#define SD_IO_OCR_NUM_FUNCTIONS(ocr) (((ocr) >> 28) & 0x7) 59/* XXX big fat memory present "flag" because we don't know better */ 60#define SD_IO_OCR_MEM_PRESENT (0xf<<24) 61#define SD_IO_OCR_MASK 0x00fffff0 62 63/* Card Common Control Registers (CCCR) */ 64#define SD_IO_CCCR_START 0x00000 65#define SD_IO_CCCR_SIZE 0x100 66#define SD_IO_CCCR_FN_ENABLE 0x02 67#define SD_IO_CCCR_FN_READY 0x03 68#define SD_IO_CCCR_INT_ENABLE 0x04 69#define SD_IO_CCCR_CTL 0x06 70#define CCCR_CTL_RES (1<<3) 71#define SD_IO_CCCR_BUS_WIDTH 0x07 72#define CCCR_BUS_WIDTH_1 (0<<0) 73#define CCCR_BUS_WIDTH_4 (2<<0) 74#define CCCR_BUS_WIDTH_MASK (3<<0) 75#define SD_IO_CCCR_CISPTR 0x09 /* XXX 9-10, 10-11, or 9-12 */ 76#define SD_IO_CCCR_SPEED 0x13 77#define CCCR_SPEED_SHS (1<<0) 78#define CCCR_SPEED_EHS CCCR_SPEED_SDR25 79#define CCCR_SPEED_SDR12 (0<<1) 80#define CCCR_SPEED_SDR25 (1<<1) 81#define CCCR_SPEED_SDR50 (2<<1) 82#define CCCR_SPEED_SDR104 (3<<1) 83#define CCCR_SPEED_DDR50 (4<<1) 84#define CCCR_SPEED_MASK (0x7<<1) 85 86/* Function Basic Registers (FBR) */ 87#define SD_IO_FBR_BASE(f) ((f) * 0x100) 88#define SD_IO_FBR_BLOCKLEN 0x10 89 90/* Card Information Structure (CIS) */ 91#define SD_IO_CIS_START 0x01000 92#define SD_IO_CIS_SIZE 0x17000 93 94/* CIS tuple codes (based on PC Card 16) */ 95#define SD_IO_CISTPL_NULL 0x00 96#define SD_IO_CISTPL_VERS_1 0x15 97#define SD_IO_CISTPL_MANFID 0x20 98#define SD_IO_CISTPL_FUNCID 0x21 99#define SD_IO_CISTPL_FUNCE 0x22 100#define SD_IO_CISTPL_END 0xff 101 102/* CISTPL_FUNCID codes */ 103#define TPLFID_FUNCTION_SDIO 0x0c 104 105#endif 106