qec.c revision 1.7 
1/*	$OpenBSD: qec.c,v 1.7 2003/06/24 21:54:38 henric Exp $	*/
2/*	$NetBSD: qec.c,v 1.12 2000/12/04 20:12:55 fvdl Exp $ */
3
4/*-
5 * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Paul Kranenburg.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *        This product includes software developed by the NetBSD
22 *        Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 *    contributors may be used to endorse or promote products derived
25 *    from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40#include <sys/types.h>
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/kernel.h>
44#include <sys/errno.h>
45#include <sys/device.h>
46#include <sys/malloc.h>
47
48#include <machine/bus.h>
49#include <machine/intr.h>
50#include <machine/autoconf.h>
51
52#include <dev/sbus/sbusvar.h>
53#include <dev/sbus/qecreg.h>
54#include <dev/sbus/qecvar.h>
55
56int	qecprint(void *, const char *);
57int	qecmatch(struct device *, void *, void *);
58void	qecattach(struct device *, struct device *, void *);
59void	qec_init(struct qec_softc *);
60
61int	qec_bus_map(
62		bus_space_tag_t,
63		bus_space_tag_t,
64		bus_addr_t,		/*offset*/
65		bus_size_t,		/*size*/
66		int,			/*flags*/
67		bus_space_handle_t *);
68void *	qec_intr_establish(
69		bus_space_tag_t,
70		bus_space_tag_t,
71		int,			/*bus interrupt priority*/
72		int,			/*`device class' interrupt level*/
73		int,			/*flags*/
74		int (*)(void *),	/*handler*/
75		void *,			/*arg*/
76		const char *);		/*what*/
77
78struct cfattach qec_ca = {
79	sizeof(struct qec_softc), qecmatch, qecattach
80};
81
82struct cfdriver qec_cd = {
83	NULL, "qec", DV_DULL
84};
85
86int
87qecprint(aux, busname)
88	void *aux;
89	const char *busname;
90{
91	struct sbus_attach_args *sa = aux;
92	bus_space_tag_t t = sa->sa_bustag;
93	struct qec_softc *sc = t->cookie;
94
95	sa->sa_bustag = sc->sc_bustag;	/* XXX */
96	sbus_print(aux, busname);	/* XXX */
97	sa->sa_bustag = t;		/* XXX */
98	return (UNCONF);
99}
100
101int
102qecmatch(parent, vcf, aux)
103	struct device *parent;
104	void *vcf;
105	void *aux;
106{
107	struct cfdata *cf = vcf;
108	struct sbus_attach_args *sa = aux;
109
110	return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
111}
112
113/*
114 * Attach all the sub-devices we can find
115 */
116void
117qecattach(parent, self, aux)
118	struct device *parent, *self;
119	void *aux;
120{
121	struct sbus_attach_args *sa = aux;
122	struct qec_softc *sc = (void *)self;
123	int node;
124	int sbusburst;
125	struct sparc_bus_space_tag *sbt;
126	bus_space_handle_t bh;
127	int error;
128
129	sc->sc_bustag = sa->sa_bustag;
130	sc->sc_dmatag = sa->sa_dmatag;
131	node = sa->sa_node;
132
133	if (sa->sa_nreg < 2) {
134		printf("%s: only %d register sets\n",
135			self->dv_xname, sa->sa_nreg);
136		return;
137	}
138
139	if (sbus_bus_map(sa->sa_bustag,
140			 sa->sa_reg[0].sbr_slot,
141			 sa->sa_reg[0].sbr_offset,
142			 sa->sa_reg[0].sbr_size,
143			 BUS_SPACE_MAP_LINEAR, 0, &sc->sc_regs) != 0) {
144		printf("%s: attach: cannot map registers\n", self->dv_xname);
145		return;
146	}
147
148	/*
149	 * This device's "register space 1" is just a buffer where the
150	 * Lance ring-buffers can be stored. Note the buffer's location
151	 * and size, so the child driver can pick them up.
152	 */
153	if (sbus_bus_map(sa->sa_bustag,
154			 sa->sa_reg[1].sbr_slot,
155			 sa->sa_reg[1].sbr_offset,
156			 sa->sa_reg[1].sbr_size,
157			 BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
158		printf("%s: attach: cannot map registers\n", self->dv_xname);
159		return;
160	}
161	sc->sc_buffer = (caddr_t)bus_space_vaddr(sc->sc_bustag, bh);
162	sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].sbr_size;
163
164	/* Get number of on-board channels */
165	sc->sc_nchannels = getpropint(node, "#channels", -1);
166	if (sc->sc_nchannels == -1) {
167		printf(": no channels\n");
168		return;
169	}
170
171	/*
172	 * Get transfer burst size from PROM
173	 */
174	sbusburst = ((struct sbus_softc *)parent)->sc_burst;
175	if (sbusburst == 0)
176		sbusburst = SBUS_BURST_32 - 1; /* 1->16 */
177
178	sc->sc_burst = getpropint(node, "burst-sizes", -1);
179	if (sc->sc_burst == -1)
180		/* take SBus burst sizes */
181		sc->sc_burst = sbusburst;
182
183	/* Clamp at parent's burst sizes */
184	sc->sc_burst &= sbusburst;
185
186	sbus_establish(&sc->sc_sd, &sc->sc_dev);
187
188	/*
189	 * Collect address translations from the OBP.
190	 */
191	error = getprop(node, "ranges", sizeof(struct sbus_range),
192			 &sc->sc_nrange, (void **)&sc->sc_range);
193	switch (error) {
194	case 0:
195		break;
196	case ENOENT:
197	default:
198		panic("%s: error getting ranges property", self->dv_xname);
199	}
200
201	/* Allocate a bus tag */
202	sbt = malloc(sizeof(*sbt), M_DEVBUF, M_NOWAIT);
203	if (sbt == NULL) {
204		printf("%s: attach: out of memory\n", self->dv_xname);
205		return;
206	}
207
208	bzero(sbt, sizeof *sbt);
209	strlcpy(sbt->name, sc->sc_dev.dv_xname, sizeof(sbt->name));
210	sbt->cookie = sc;
211	sbt->parent = sc->sc_bustag;
212	sbt->asi = sbt->parent->asi;
213	sbt->sasi = sbt->parent->sasi;
214	sbt->sparc_bus_map = qec_bus_map;
215	sbt->sparc_intr_establish = qec_intr_establish;
216
217	/*
218	 * Save interrupt information for use in our qec_intr_establish()
219	 * function below. Apparently, the intr level for the quad
220	 * ethernet board (qe) is stored in the QEC node rather then
221	 * separately in each of the QE nodes.
222	 *
223	 * XXX - qe.c should call bus_intr_establish() with `level = 0'..
224	 * XXX - maybe we should have our own attach args for all that.
225	 */
226	sc->sc_intr = sa->sa_intr;
227
228	printf(": %dK memory\n", sc->sc_bufsiz / 1024);
229
230	qec_init(sc);
231
232	/* search through children */
233	for (node = firstchild(node); node; node = nextsibling(node)) {
234		struct sbus_attach_args sa;
235
236		sbus_setup_attach_args((struct sbus_softc *)parent,
237				       sbt, sc->sc_dmatag, node, &sa);
238		(void)config_found(&sc->sc_dev, (void *)&sa, qecprint);
239		sbus_destroy_attach_args(&sa);
240	}
241}
242
243int
244qec_bus_map(t, t0, addr, size, flags, hp)
245	bus_space_tag_t t;
246	bus_space_tag_t t0;
247	bus_addr_t addr;
248	bus_size_t size;
249	int	flags;
250	bus_space_handle_t *hp;
251{
252	struct qec_softc *sc = t->cookie;
253	int slot = BUS_ADDR_IOSPACE(addr);
254	bus_addr_t offset = BUS_ADDR_PADDR(addr);
255	int i;
256
257	for (t = t->parent; t; t = t->parent) {
258		if (t->sparc_bus_map != NULL)
259			break;
260	}
261
262        if (t == NULL) {
263                printf("\nqec_bus_map: invalid parent");
264                return (EINVAL);
265        }
266
267        if (flags & BUS_SPACE_MAP_PROMADDRESS) {
268                return ((*t->sparc_bus_map)
269                    (t, t0, offset, size, flags, hp));
270        }
271
272	for (i = 0; i < sc->sc_nrange; i++) {
273		bus_addr_t paddr;
274		int iospace;
275
276		if (sc->sc_range[i].cspace != slot)
277			continue;
278
279		/* We've found the connection to the parent bus */
280		paddr = sc->sc_range[i].poffset + offset;
281		iospace = sc->sc_range[i].pspace;
282                return ((*t->sparc_bus_map)
283                    (t, t0, BUS_ADDR(iospace, paddr), size, flags, hp));
284	}
285
286	return (EINVAL);
287}
288
289void *
290qec_intr_establish(t, t0, pri, level, flags, handler, arg, what)
291	bus_space_tag_t t;
292	bus_space_tag_t t0;
293	int pri;
294	int level;
295	int flags;
296	int (*handler)(void *);
297	void *arg;
298	const char *what;
299{
300	struct qec_softc *sc = t->cookie;
301
302	if (pri == 0) {
303		/*
304		 * qe.c calls bus_intr_establish() with `pri == 0'
305		 * XXX - see also comment in qec_attach().
306		 */
307		if (sc->sc_intr == NULL) {
308			printf("%s: warning: no interrupts\n",
309				sc->sc_dev.dv_xname);
310			return (NULL);
311		}
312		pri = sc->sc_intr->sbi_pri;
313	}
314
315	for (t = t->parent; t; t = t->parent) {
316		if (t->sparc_intr_establish != NULL)
317			return ((*t->sparc_intr_establish)
318			    (t, t0, pri, level, flags, handler, arg, what));
319	}
320
321	panic("qec_intr_extablish): no handler found");
322
323	return (NULL);
324}
325
326void
327qec_init(sc)
328	struct qec_softc *sc;
329{
330	bus_space_tag_t t = sc->sc_bustag;
331	bus_space_handle_t qr = sc->sc_regs;
332	u_int32_t v, burst = 0, psize;
333	int i;
334
335	/* First, reset the controller */
336	bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET);
337	for (i = 0; i < 1000; i++) {
338		DELAY(100);
339		v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
340		if ((v & QEC_CTRL_RESET) == 0)
341			break;
342	}
343
344	/*
345	 * Cut available buffer size into receive and transmit buffers.
346	 * XXX - should probably be done in be & qe driver...
347	 */
348	v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels;
349	bus_space_write_4(t, qr, QEC_QRI_MSIZE, v);
350
351	v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2);
352	bus_space_write_4(t, qr, QEC_QRI_RSIZE, v);
353	bus_space_write_4(t, qr, QEC_QRI_TSIZE, v);
354
355	psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0;
356	bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize);
357
358	if (sc->sc_burst & SBUS_BURST_64)
359		burst = QEC_CTRL_B64;
360	else if (sc->sc_burst & SBUS_BURST_32)
361		burst = QEC_CTRL_B32;
362	else
363		burst = QEC_CTRL_B16;
364
365	v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
366	v = (v & QEC_CTRL_MODEMASK) | burst;
367	bus_space_write_4(t, qr, QEC_QRI_CTRL, v);
368}
369
370/*
371 * Common routine to initialize the QEC packet ring buffer.
372 * Called from be & qe drivers.
373 */
374void
375qec_meminit(qr, pktbufsz)
376	struct qec_ring *qr;
377	unsigned int pktbufsz;
378{
379	bus_addr_t txbufdma, rxbufdma;
380	bus_addr_t dma;
381	caddr_t p;
382	unsigned int ntbuf, nrbuf, i;
383
384	p = qr->rb_membase;
385	dma = qr->rb_dmabase;
386
387	ntbuf = qr->rb_ntbuf;
388	nrbuf = qr->rb_nrbuf;
389
390	/*
391	 * Allocate transmit descriptors
392	 */
393	qr->rb_txd = (struct qec_xd *)p;
394	qr->rb_txddma = dma;
395	p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
396	dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
397
398	/*
399	 * Allocate receive descriptors
400	 */
401	qr->rb_rxd = (struct qec_xd *)p;
402	qr->rb_rxddma = dma;
403	p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
404	dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
405
406
407	/*
408	 * Allocate transmit buffers
409	 */
410	qr->rb_txbuf = p;
411	txbufdma = dma;
412	p += ntbuf * pktbufsz;
413	dma += ntbuf * pktbufsz;
414
415	/*
416	 * Allocate receive buffers
417	 */
418	qr->rb_rxbuf = p;
419	rxbufdma = dma;
420	p += nrbuf * pktbufsz;
421	dma += nrbuf * pktbufsz;
422
423	/*
424	 * Initialize transmit buffer descriptors
425	 */
426	for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
427		qr->rb_txd[i].xd_addr = (u_int32_t)
428			(txbufdma + (i % ntbuf) * pktbufsz);
429		qr->rb_txd[i].xd_flags = 0;
430	}
431
432	/*
433	 * Initialize receive buffer descriptors
434	 */
435	for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
436		qr->rb_rxd[i].xd_addr = (u_int32_t)
437			(rxbufdma + (i % nrbuf) * pktbufsz);
438		qr->rb_rxd[i].xd_flags = (i < nrbuf)
439			? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH)
440			: 0;
441	}
442
443	qr->rb_tdhead = qr->rb_tdtail = 0;
444	qr->rb_td_nbusy = 0;
445	qr->rb_rdtail = 0;
446}
447