qec.c revision 1.6 
1/*	$OpenBSD: qec.c,v 1.6 2003/03/27 17:39:05 jason Exp $	*/
2/*	$NetBSD: qec.c,v 1.12 2000/12/04 20:12:55 fvdl Exp $ */
3
4/*-
5 * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Paul Kranenburg.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *        This product includes software developed by the NetBSD
22 *        Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 *    contributors may be used to endorse or promote products derived
25 *    from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40#include <sys/types.h>
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/kernel.h>
44#include <sys/errno.h>
45#include <sys/device.h>
46#include <sys/malloc.h>
47
48#include <machine/bus.h>
49#include <machine/intr.h>
50#include <machine/autoconf.h>
51
52#include <dev/sbus/sbusvar.h>
53#include <dev/sbus/qecreg.h>
54#include <dev/sbus/qecvar.h>
55
56int	qecprint(void *, const char *);
57int	qecmatch(struct device *, void *, void *);
58void	qecattach(struct device *, struct device *, void *);
59void	qec_init(struct qec_softc *);
60
61int	qec_bus_map(
62		bus_space_tag_t,
63		bus_space_tag_t,
64		bus_addr_t,		/*offset*/
65		bus_size_t,		/*size*/
66		int,			/*flags*/
67		bus_space_handle_t *);
68void *	qec_intr_establish(
69		bus_space_tag_t,
70		bus_space_tag_t,
71		int,			/*bus interrupt priority*/
72		int,			/*`device class' interrupt level*/
73		int,			/*flags*/
74		int (*)(void *),	/*handler*/
75		void *);		/*arg*/
76
77struct cfattach qec_ca = {
78	sizeof(struct qec_softc), qecmatch, qecattach
79};
80
81struct cfdriver qec_cd = {
82	NULL, "qec", DV_DULL
83};
84
85int
86qecprint(aux, busname)
87	void *aux;
88	const char *busname;
89{
90	struct sbus_attach_args *sa = aux;
91	bus_space_tag_t t = sa->sa_bustag;
92	struct qec_softc *sc = t->cookie;
93
94	sa->sa_bustag = sc->sc_bustag;	/* XXX */
95	sbus_print(aux, busname);	/* XXX */
96	sa->sa_bustag = t;		/* XXX */
97	return (UNCONF);
98}
99
100int
101qecmatch(parent, vcf, aux)
102	struct device *parent;
103	void *vcf;
104	void *aux;
105{
106	struct cfdata *cf = vcf;
107	struct sbus_attach_args *sa = aux;
108
109	return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
110}
111
112/*
113 * Attach all the sub-devices we can find
114 */
115void
116qecattach(parent, self, aux)
117	struct device *parent, *self;
118	void *aux;
119{
120	struct sbus_attach_args *sa = aux;
121	struct qec_softc *sc = (void *)self;
122	int node;
123	int sbusburst;
124	struct sparc_bus_space_tag *sbt;
125	bus_space_handle_t bh;
126	int error;
127
128	sc->sc_bustag = sa->sa_bustag;
129	sc->sc_dmatag = sa->sa_dmatag;
130	node = sa->sa_node;
131
132	if (sa->sa_nreg < 2) {
133		printf("%s: only %d register sets\n",
134			self->dv_xname, sa->sa_nreg);
135		return;
136	}
137
138	if (sbus_bus_map(sa->sa_bustag,
139			 sa->sa_reg[0].sbr_slot,
140			 sa->sa_reg[0].sbr_offset,
141			 sa->sa_reg[0].sbr_size,
142			 BUS_SPACE_MAP_LINEAR, 0, &sc->sc_regs) != 0) {
143		printf("%s: attach: cannot map registers\n", self->dv_xname);
144		return;
145	}
146
147	/*
148	 * This device's "register space 1" is just a buffer where the
149	 * Lance ring-buffers can be stored. Note the buffer's location
150	 * and size, so the child driver can pick them up.
151	 */
152	if (sbus_bus_map(sa->sa_bustag,
153			 sa->sa_reg[1].sbr_slot,
154			 sa->sa_reg[1].sbr_offset,
155			 sa->sa_reg[1].sbr_size,
156			 BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
157		printf("%s: attach: cannot map registers\n", self->dv_xname);
158		return;
159	}
160	sc->sc_buffer = (caddr_t)bus_space_vaddr(sc->sc_bustag, bh);
161	sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].sbr_size;
162
163	/* Get number of on-board channels */
164	sc->sc_nchannels = getpropint(node, "#channels", -1);
165	if (sc->sc_nchannels == -1) {
166		printf(": no channels\n");
167		return;
168	}
169
170	/*
171	 * Get transfer burst size from PROM
172	 */
173	sbusburst = ((struct sbus_softc *)parent)->sc_burst;
174	if (sbusburst == 0)
175		sbusburst = SBUS_BURST_32 - 1; /* 1->16 */
176
177	sc->sc_burst = getpropint(node, "burst-sizes", -1);
178	if (sc->sc_burst == -1)
179		/* take SBus burst sizes */
180		sc->sc_burst = sbusburst;
181
182	/* Clamp at parent's burst sizes */
183	sc->sc_burst &= sbusburst;
184
185	sbus_establish(&sc->sc_sd, &sc->sc_dev);
186
187	/*
188	 * Collect address translations from the OBP.
189	 */
190	error = getprop(node, "ranges", sizeof(struct sbus_range),
191			 &sc->sc_nrange, (void **)&sc->sc_range);
192	switch (error) {
193	case 0:
194		break;
195	case ENOENT:
196	default:
197		panic("%s: error getting ranges property", self->dv_xname);
198	}
199
200	/* Allocate a bus tag */
201	sbt = malloc(sizeof(*sbt), M_DEVBUF, M_NOWAIT);
202	if (sbt == NULL) {
203		printf("%s: attach: out of memory\n", self->dv_xname);
204		return;
205	}
206
207	bzero(sbt, sizeof *sbt);
208	strlcpy(sbt->name, sc->sc_dev.dv_xname, sizeof(sbt->name));
209	sbt->cookie = sc;
210	sbt->parent = sc->sc_bustag;
211	sbt->asi = sbt->parent->asi;
212	sbt->sasi = sbt->parent->sasi;
213	sbt->sparc_bus_map = qec_bus_map;
214	sbt->sparc_intr_establish = qec_intr_establish;
215
216	/*
217	 * Save interrupt information for use in our qec_intr_establish()
218	 * function below. Apparently, the intr level for the quad
219	 * ethernet board (qe) is stored in the QEC node rather then
220	 * separately in each of the QE nodes.
221	 *
222	 * XXX - qe.c should call bus_intr_establish() with `level = 0'..
223	 * XXX - maybe we should have our own attach args for all that.
224	 */
225	sc->sc_intr = sa->sa_intr;
226
227	printf(": %dK memory\n", sc->sc_bufsiz / 1024);
228
229	qec_init(sc);
230
231	/* search through children */
232	for (node = firstchild(node); node; node = nextsibling(node)) {
233		struct sbus_attach_args sa;
234
235		sbus_setup_attach_args((struct sbus_softc *)parent,
236				       sbt, sc->sc_dmatag, node, &sa);
237		(void)config_found(&sc->sc_dev, (void *)&sa, qecprint);
238		sbus_destroy_attach_args(&sa);
239	}
240}
241
242int
243qec_bus_map(t, t0, addr, size, flags, hp)
244	bus_space_tag_t t;
245	bus_space_tag_t t0;
246	bus_addr_t addr;
247	bus_size_t size;
248	int	flags;
249	bus_space_handle_t *hp;
250{
251	struct qec_softc *sc = t->cookie;
252	int slot = BUS_ADDR_IOSPACE(addr);
253	bus_addr_t offset = BUS_ADDR_PADDR(addr);
254	int i;
255
256	for (t = t->parent; t; t = t->parent) {
257		if (t->sparc_bus_map != NULL)
258			break;
259	}
260
261        if (t == NULL) {
262                printf("\nqec_bus_map: invalid parent");
263                return (EINVAL);
264        }
265
266        if (flags & BUS_SPACE_MAP_PROMADDRESS) {
267                return ((*t->sparc_bus_map)
268                    (t, t0, offset, size, flags, hp));
269        }
270
271	for (i = 0; i < sc->sc_nrange; i++) {
272		bus_addr_t paddr;
273		int iospace;
274
275		if (sc->sc_range[i].cspace != slot)
276			continue;
277
278		/* We've found the connection to the parent bus */
279		paddr = sc->sc_range[i].poffset + offset;
280		iospace = sc->sc_range[i].pspace;
281                return ((*t->sparc_bus_map)
282                    (t, t0, BUS_ADDR(iospace, paddr), size, flags, hp));
283	}
284
285	return (EINVAL);
286}
287
288void *
289qec_intr_establish(t, t0, pri, level, flags, handler, arg)
290	bus_space_tag_t t;
291	bus_space_tag_t t0;
292	int pri;
293	int level;
294	int flags;
295	int (*handler)(void *);
296	void *arg;
297{
298	struct qec_softc *sc = t->cookie;
299
300	if (pri == 0) {
301		/*
302		 * qe.c calls bus_intr_establish() with `pri == 0'
303		 * XXX - see also comment in qec_attach().
304		 */
305		if (sc->sc_intr == NULL) {
306			printf("%s: warning: no interrupts\n",
307				sc->sc_dev.dv_xname);
308			return (NULL);
309		}
310		pri = sc->sc_intr->sbi_pri;
311	}
312
313        if (t->parent == 0 || t->parent->sparc_bus_mmap == 0) {
314                printf("\nebus_bus_mmap: invalid parent");
315                return (NULL);
316        }
317
318        t = t->parent;
319
320        return ((*t->sparc_intr_establish)(t, t0, pri, level, flags,
321            handler, arg));
322}
323
324void
325qec_init(sc)
326	struct qec_softc *sc;
327{
328	bus_space_tag_t t = sc->sc_bustag;
329	bus_space_handle_t qr = sc->sc_regs;
330	u_int32_t v, burst = 0, psize;
331	int i;
332
333	/* First, reset the controller */
334	bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET);
335	for (i = 0; i < 1000; i++) {
336		DELAY(100);
337		v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
338		if ((v & QEC_CTRL_RESET) == 0)
339			break;
340	}
341
342	/*
343	 * Cut available buffer size into receive and transmit buffers.
344	 * XXX - should probably be done in be & qe driver...
345	 */
346	v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels;
347	bus_space_write_4(t, qr, QEC_QRI_MSIZE, v);
348
349	v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2);
350	bus_space_write_4(t, qr, QEC_QRI_RSIZE, v);
351	bus_space_write_4(t, qr, QEC_QRI_TSIZE, v);
352
353	psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0;
354	bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize);
355
356	if (sc->sc_burst & SBUS_BURST_64)
357		burst = QEC_CTRL_B64;
358	else if (sc->sc_burst & SBUS_BURST_32)
359		burst = QEC_CTRL_B32;
360	else
361		burst = QEC_CTRL_B16;
362
363	v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
364	v = (v & QEC_CTRL_MODEMASK) | burst;
365	bus_space_write_4(t, qr, QEC_QRI_CTRL, v);
366}
367
368/*
369 * Common routine to initialize the QEC packet ring buffer.
370 * Called from be & qe drivers.
371 */
372void
373qec_meminit(qr, pktbufsz)
374	struct qec_ring *qr;
375	unsigned int pktbufsz;
376{
377	bus_addr_t txbufdma, rxbufdma;
378	bus_addr_t dma;
379	caddr_t p;
380	unsigned int ntbuf, nrbuf, i;
381
382	p = qr->rb_membase;
383	dma = qr->rb_dmabase;
384
385	ntbuf = qr->rb_ntbuf;
386	nrbuf = qr->rb_nrbuf;
387
388	/*
389	 * Allocate transmit descriptors
390	 */
391	qr->rb_txd = (struct qec_xd *)p;
392	qr->rb_txddma = dma;
393	p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
394	dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
395
396	/*
397	 * Allocate receive descriptors
398	 */
399	qr->rb_rxd = (struct qec_xd *)p;
400	qr->rb_rxddma = dma;
401	p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
402	dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
403
404
405	/*
406	 * Allocate transmit buffers
407	 */
408	qr->rb_txbuf = p;
409	txbufdma = dma;
410	p += ntbuf * pktbufsz;
411	dma += ntbuf * pktbufsz;
412
413	/*
414	 * Allocate receive buffers
415	 */
416	qr->rb_rxbuf = p;
417	rxbufdma = dma;
418	p += nrbuf * pktbufsz;
419	dma += nrbuf * pktbufsz;
420
421	/*
422	 * Initialize transmit buffer descriptors
423	 */
424	for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
425		qr->rb_txd[i].xd_addr = (u_int32_t)
426			(txbufdma + (i % ntbuf) * pktbufsz);
427		qr->rb_txd[i].xd_flags = 0;
428	}
429
430	/*
431	 * Initialize receive buffer descriptors
432	 */
433	for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
434		qr->rb_rxd[i].xd_addr = (u_int32_t)
435			(rxbufdma + (i % nrbuf) * pktbufsz);
436		qr->rb_rxd[i].xd_flags = (i < nrbuf)
437			? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH)
438			: 0;
439	}
440
441	qr->rb_tdhead = qr->rb_tdtail = 0;
442	qr->rb_td_nbusy = 0;
443	qr->rb_rdtail = 0;
444}
445