qec.c revision 1.1
1/* $OpenBSD: qec.c,v 1.1 2001/08/20 22:09:27 jason Exp $ */ 2/* $NetBSD: qec.c,v 1.12 2000/12/04 20:12:55 fvdl Exp $ */ 3 4/*- 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Paul Kranenburg. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40#include <sys/types.h> 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/kernel.h> 44#include <sys/errno.h> 45#include <sys/device.h> 46#include <sys/malloc.h> 47 48#include <machine/bus.h> 49#include <machine/intr.h> 50#include <machine/autoconf.h> 51 52#include <dev/sbus/sbusvar.h> 53#include <dev/sbus/qecreg.h> 54#include <dev/sbus/qecvar.h> 55 56static int qecprint __P((void *, const char *)); 57static int qecmatch __P((struct device *, void *, void *)); 58static void qecattach __P((struct device *, struct device *, void *)); 59void qec_init __P((struct qec_softc *)); 60 61static int qec_bus_map __P(( 62 bus_space_tag_t, 63 bus_type_t, /*slot*/ 64 bus_addr_t, /*offset*/ 65 bus_size_t, /*size*/ 66 int, /*flags*/ 67 vaddr_t, /*preferred virtual address */ 68 bus_space_handle_t *)); 69static void *qec_intr_establish __P(( 70 bus_space_tag_t, 71 int, /*bus interrupt priority*/ 72 int, /*`device class' interrupt level*/ 73 int, /*flags*/ 74 int (*) __P((void *)), /*handler*/ 75 void *)); /*arg*/ 76 77struct cfattach qec_ca = { 78 sizeof(struct qec_softc), qecmatch, qecattach 79}; 80 81struct cfdriver qec_cd = { 82 NULL, "qec", DV_DULL 83}; 84 85int 86qecprint(aux, busname) 87 void *aux; 88 const char *busname; 89{ 90 struct sbus_attach_args *sa = aux; 91 bus_space_tag_t t = sa->sa_bustag; 92 struct qec_softc *sc = t->cookie; 93 94 sa->sa_bustag = sc->sc_bustag; /* XXX */ 95 sbus_print(aux, busname); /* XXX */ 96 sa->sa_bustag = t; /* XXX */ 97 return (UNCONF); 98} 99 100int 101qecmatch(parent, vcf, aux) 102 struct device *parent; 103 void *vcf; 104 void *aux; 105{ 106 struct cfdata *cf = vcf; 107 struct sbus_attach_args *sa = aux; 108 109 return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0); 110} 111 112/* 113 * Attach all the sub-devices we can find 114 */ 115void 116qecattach(parent, self, aux) 117 struct device *parent, *self; 118 void *aux; 119{ 120 struct sbus_attach_args *sa = aux; 121 struct qec_softc *sc = (void *)self; 122 int node; 123 int sbusburst; 124 bus_space_tag_t sbt; 125 bus_space_handle_t bh; 126 struct bootpath *bp; 127 int error; 128 129 sc->sc_bustag = sa->sa_bustag; 130 sc->sc_dmatag = sa->sa_dmatag; 131 node = sa->sa_node; 132 133 if (sa->sa_nreg < 2) { 134 printf("%s: only %d register sets\n", 135 self->dv_xname, sa->sa_nreg); 136 return; 137 } 138 139 if (sbus_bus_map(sa->sa_bustag, 140 sa->sa_reg[0].sbr_slot, 141 sa->sa_reg[0].sbr_offset, 142 sa->sa_reg[0].sbr_size, 143 BUS_SPACE_MAP_LINEAR, 0, &sc->sc_regs) != 0) { 144 printf("%s: attach: cannot map registers\n", self->dv_xname); 145 return; 146 } 147 148 /* 149 * This device's "register space 1" is just a buffer where the 150 * Lance ring-buffers can be stored. Note the buffer's location 151 * and size, so the child driver can pick them up. 152 */ 153 if (sbus_bus_map(sa->sa_bustag, 154 sa->sa_reg[1].sbr_slot, 155 sa->sa_reg[1].sbr_offset, 156 sa->sa_reg[1].sbr_size, 157 BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) { 158 printf("%s: attach: cannot map registers\n", self->dv_xname); 159 return; 160 } 161 sc->sc_buffer = (caddr_t)(u_long)bh; 162 sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].sbr_size; 163 164 /* Get number of on-board channels */ 165 sc->sc_nchannels = getpropint(node, "#channels", -1); 166 if (sc->sc_nchannels == -1) { 167 printf(": no channels\n"); 168 return; 169 } 170 171 /* 172 * Get transfer burst size from PROM 173 */ 174 sbusburst = ((struct sbus_softc *)parent)->sc_burst; 175 if (sbusburst == 0) 176 sbusburst = SBUS_BURST_32 - 1; /* 1->16 */ 177 178 sc->sc_burst = getpropint(node, "burst-sizes", -1); 179 if (sc->sc_burst == -1) 180 /* take SBus burst sizes */ 181 sc->sc_burst = sbusburst; 182 183 /* Clamp at parent's burst sizes */ 184 sc->sc_burst &= sbusburst; 185 186 sbus_establish(&sc->sc_sd, &sc->sc_dev); 187 188 /* 189 * Collect address translations from the OBP. 190 */ 191 error = getprop(node, "ranges", sizeof(struct sbus_range), 192 &sc->sc_nrange, (void **)&sc->sc_range); 193 switch (error) { 194 case 0: 195 break; 196 case ENOENT: 197 default: 198 panic("%s: error getting ranges property", self->dv_xname); 199 } 200 201 /* Allocate a bus tag */ 202 sbt = (bus_space_tag_t) 203 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 204 if (sbt == NULL) { 205 printf("%s: attach: out of memory\n", self->dv_xname); 206 return; 207 } 208 209 bzero(sbt, sizeof *sbt); 210 sbt->cookie = sc; 211 sbt->parent = sc->sc_bustag; 212 sbt->sparc_bus_map = qec_bus_map; 213 sbt->sparc_intr_establish = qec_intr_establish; 214 215 /* 216 * Save interrupt information for use in our qec_intr_establish() 217 * function below. Apparently, the intr level for the quad 218 * ethernet board (qe) is stored in the QEC node rather then 219 * separately in each of the QE nodes. 220 * 221 * XXX - qe.c should call bus_intr_establish() with `level = 0'.. 222 * XXX - maybe we should have our own attach args for all that. 223 */ 224 sc->sc_intr = sa->sa_intr; 225 226 printf(": %dK memory\n", sc->sc_bufsiz / 1024); 227 228 qec_init(sc); 229 230 bp = sa->sa_bp; 231 if (bp != NULL && strcmp(bp->name, qec_cd.cd_name) == 0) 232 bp = bp + 1; 233 else 234 bp = NULL; 235 236 /* search through children */ 237 for (node = firstchild(node); node; node = nextsibling(node)) { 238 struct sbus_attach_args sa; 239 240 sbus_setup_attach_args((struct sbus_softc *)parent, 241 sbt, sc->sc_dmatag, node, &sa); 242 sa.sa_bp = bp; 243 (void)config_found(&sc->sc_dev, (void *)&sa, qecprint); 244 sbus_destroy_attach_args(&sa); 245 } 246} 247 248int 249qec_bus_map(t, btype, offset, size, flags, vaddr, hp) 250 bus_space_tag_t t; 251 bus_type_t btype; 252 bus_addr_t offset; 253 bus_size_t size; 254 int flags; 255 vaddr_t vaddr; 256 bus_space_handle_t *hp; 257{ 258 struct qec_softc *sc = t->cookie; 259 int slot = btype; 260 int i; 261 262 for (i = 0; i < sc->sc_nrange; i++) { 263 bus_addr_t paddr; 264 bus_type_t iospace; 265 266 if (sc->sc_range[i].cspace != slot) 267 continue; 268 269 /* We've found the connection to the parent bus */ 270 paddr = sc->sc_range[i].poffset + offset; 271 iospace = sc->sc_range[i].pspace; 272 return (bus_space_map2(sc->sc_bustag, iospace, paddr, 273 size, flags, vaddr, hp)); 274 } 275 276 return (EINVAL); 277} 278 279void * 280qec_intr_establish(t, pri, level, flags, handler, arg) 281 bus_space_tag_t t; 282 int pri; 283 int level; 284 int flags; 285 int (*handler) __P((void *)); 286 void *arg; 287{ 288 struct qec_softc *sc = t->cookie; 289 290 if (pri == 0) { 291 /* 292 * qe.c calls bus_intr_establish() with `pri == 0' 293 * XXX - see also comment in qec_attach(). 294 */ 295 if (sc->sc_intr == NULL) { 296 printf("%s: warning: no interrupts\n", 297 sc->sc_dev.dv_xname); 298 return (NULL); 299 } 300 pri = sc->sc_intr->sbi_pri; 301 } 302 303 return (bus_intr_establish(t->parent, pri, level, flags, handler, arg)); 304} 305 306void 307qec_init(sc) 308 struct qec_softc *sc; 309{ 310 bus_space_tag_t t = sc->sc_bustag; 311 bus_space_handle_t qr = sc->sc_regs; 312 u_int32_t v, burst = 0, psize; 313 int i; 314 315 /* First, reset the controller */ 316 bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET); 317 for (i = 0; i < 1000; i++) { 318 DELAY(100); 319 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 320 if ((v & QEC_CTRL_RESET) == 0) 321 break; 322 } 323 324 /* 325 * Cut available buffer size into receive and transmit buffers. 326 * XXX - should probably be done in be & qe driver... 327 */ 328 v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels; 329 bus_space_write_4(t, qr, QEC_QRI_MSIZE, v); 330 331 v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2); 332 bus_space_write_4(t, qr, QEC_QRI_RSIZE, v); 333 bus_space_write_4(t, qr, QEC_QRI_TSIZE, v); 334 335 psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0; 336 bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize); 337 338 if (sc->sc_burst & SBUS_BURST_64) 339 burst = QEC_CTRL_B64; 340 else if (sc->sc_burst & SBUS_BURST_32) 341 burst = QEC_CTRL_B32; 342 else 343 burst = QEC_CTRL_B16; 344 345 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 346 v = (v & QEC_CTRL_MODEMASK) | burst; 347 bus_space_write_4(t, qr, QEC_QRI_CTRL, v); 348} 349 350/* 351 * Common routine to initialize the QEC packet ring buffer. 352 * Called from be & qe drivers. 353 */ 354void 355qec_meminit(qr, pktbufsz) 356 struct qec_ring *qr; 357 unsigned int pktbufsz; 358{ 359 bus_addr_t txbufdma, rxbufdma; 360 bus_addr_t dma; 361 caddr_t p; 362 unsigned int ntbuf, nrbuf, i; 363 364 p = qr->rb_membase; 365 dma = qr->rb_dmabase; 366 367 ntbuf = qr->rb_ntbuf; 368 nrbuf = qr->rb_nrbuf; 369 370 /* 371 * Allocate transmit descriptors 372 */ 373 qr->rb_txd = (struct qec_xd *)p; 374 qr->rb_txddma = dma; 375 p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 376 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 377 378 /* 379 * Allocate receive descriptors 380 */ 381 qr->rb_rxd = (struct qec_xd *)p; 382 qr->rb_rxddma = dma; 383 p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 384 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 385 386 387 /* 388 * Allocate transmit buffers 389 */ 390 qr->rb_txbuf = p; 391 txbufdma = dma; 392 p += ntbuf * pktbufsz; 393 dma += ntbuf * pktbufsz; 394 395 /* 396 * Allocate receive buffers 397 */ 398 qr->rb_rxbuf = p; 399 rxbufdma = dma; 400 p += nrbuf * pktbufsz; 401 dma += nrbuf * pktbufsz; 402 403 /* 404 * Initialize transmit buffer descriptors 405 */ 406 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 407 qr->rb_txd[i].xd_addr = (u_int32_t) 408 (txbufdma + (i % ntbuf) * pktbufsz); 409 qr->rb_txd[i].xd_flags = 0; 410 } 411 412 /* 413 * Initialize receive buffer descriptors 414 */ 415 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 416 qr->rb_rxd[i].xd_addr = (u_int32_t) 417 (rxbufdma + (i % nrbuf) * pktbufsz); 418 qr->rb_rxd[i].xd_flags = (i < nrbuf) 419 ? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH) 420 : 0; 421 } 422 423 qr->rb_tdhead = qr->rb_tdtail = 0; 424 qr->rb_td_nbusy = 0; 425 qr->rb_rdtail = 0; 426} 427