1/*	$OpenBSD: if_le.c,v 1.18 2022/03/13 13:34:54 mpi Exp $	*/
2/*	$NetBSD: if_le.c,v 1.17 2001/05/30 11:46:35 mrg Exp $	*/
3
4/*-
5 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Charles M. Hannum; Jason R. Thorpe of the Numerical Aerospace
10 * Simulation Facility, NASA Ames Research Center; Paul Kranenburg.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#include "bpfilter.h"
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/mbuf.h>
39#include <sys/syslog.h>
40#include <sys/socket.h>
41#include <sys/device.h>
42#include <sys/malloc.h>
43
44#include <net/if.h>
45#include <net/if_media.h>
46
47#include <netinet/in.h>
48#include <netinet/if_ether.h>
49
50#include <machine/bus.h>
51#include <machine/intr.h>
52#include <machine/autoconf.h>
53
54#include <dev/sbus/sbusvar.h>
55#include <dev/sbus/lebuffervar.h>	/*XXX*/
56
57#include <dev/ic/lancereg.h>
58#include <dev/ic/lancevar.h>
59#include <dev/ic/am7990reg.h>
60#include <dev/ic/am7990var.h>
61
62/*
63 * LANCE registers.
64 */
65#define LEREG1_RDP	0	/* Register Data port */
66#define LEREG1_RAP	2	/* Register Address port */
67
68struct	le_softc {
69	struct	am7990_softc	sc_am7990;	/* glue to MI code */
70	bus_space_tag_t		sc_bustag;
71	bus_dma_tag_t		sc_dmatag;
72	bus_dmamap_t		sc_dmamap;
73	bus_space_handle_t	sc_reg;
74};
75
76#define MEMSIZE 0x4000		/* LANCE memory size */
77
78int	lematch_sbus(struct device *, void *, void *);
79void	leattach_sbus(struct device *, struct device *, void *);
80
81/*
82 * Media types supported.
83 */
84static uint64_t lemedia[] = {
85	IFM_ETHER | IFM_10_5
86};
87
88const struct cfattach le_sbus_ca = {
89	sizeof(struct le_softc), lematch_sbus, leattach_sbus
90};
91
92void le_sbus_wrcsr(struct lance_softc *, uint16_t, uint16_t);
93uint16_t le_sbus_rdcsr(struct lance_softc *, uint16_t);
94
95void
96le_sbus_wrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)
97{
98	struct le_softc *lesc = (struct le_softc *)sc;
99
100	bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, port);
101	bus_space_barrier(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, 2,
102	    BUS_SPACE_BARRIER_WRITE);
103	bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP, val);
104	bus_space_barrier(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP, 2,
105	    BUS_SPACE_BARRIER_WRITE);
106
107#if defined(SUN4M)
108	/*
109	 * We need to flush the SBus->MBus write buffers. This can most
110	 * easily be accomplished by reading back the register that we
111	 * just wrote (thanks to Chris Torek for this solution).
112	 */
113	if (CPU_ISSUN4M) {
114		volatile uint16_t discard;
115		discard = bus_space_read_2(lesc->sc_bustag, lesc->sc_reg,
116		    LEREG1_RDP);
117	}
118#endif
119}
120
121uint16_t
122le_sbus_rdcsr(struct lance_softc *sc, uint16_t port)
123{
124	struct le_softc *lesc = (struct le_softc *)sc;
125
126	bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, port);
127	bus_space_barrier(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, 2,
128	    BUS_SPACE_BARRIER_WRITE);
129	return (bus_space_read_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP));
130}
131
132
133int
134lematch_sbus(struct device *parent, void *vcf, void *aux)
135{
136	struct cfdata *cf = vcf;
137	struct sbus_attach_args *sa = aux;
138
139	return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
140}
141
142void
143leattach_sbus(struct device *parent, struct device *self, void *aux)
144{
145	struct sbus_attach_args *sa = aux;
146	struct le_softc *lesc = (struct le_softc *)self;
147	struct lance_softc *sc = &lesc->sc_am7990.lsc;
148	bus_dma_tag_t dmatag;
149	/* XXX the following declarations should be elsewhere */
150	extern void myetheraddr(u_char *);
151	extern struct cfdriver lebuffer_cd;
152
153	lesc->sc_bustag = sa->sa_bustag;
154	lesc->sc_dmatag = dmatag = sa->sa_dmatag;
155
156	if (sbus_bus_map(sa->sa_bustag, sa->sa_reg[0].sbr_slot,
157	    sa->sa_reg[0].sbr_offset, sa->sa_reg[0].sbr_size,
158	    BUS_SPACE_MAP_LINEAR, 0, &lesc->sc_reg) != 0) {
159		printf(": cannot map registers\n");
160		return;
161	}
162
163	/*
164	 * Look for an "unallocated" lebuffer and pair it with
165	 * this `le' device on the assumption that we're on
166	 * a pre-historic ROM that doesn't establish le<=>lebuffer
167	 * parent-child relationships.
168	 */
169	if (lebuffer_cd.cd_ndevs != 0) {
170		struct lebuf_softc *lebuf;
171		int i;
172
173		for (i = 0; i < lebuffer_cd.cd_ndevs; i++) {
174			lebuf = (struct lebuf_softc *)lebuffer_cd.cd_devs[i];
175			if (lebuf == NULL || lebuf->attached != 0)
176				continue;
177
178			sc->sc_mem = lebuf->sc_buffer;
179			sc->sc_memsize = lebuf->sc_bufsiz;
180			/* Lance view is offset by buffer location */
181			sc->sc_addr = 0;
182			lebuf->attached = 1;
183
184			/* That old black magic... */
185			sc->sc_conf3 = getpropint(sa->sa_node,
186			    "busmaster-regval",
187			    LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON);
188			break;
189		}
190	}
191
192	if (sc->sc_mem == 0) {
193		bus_dma_segment_t seg;
194		int rseg, error;
195
196		/* Get a DMA handle */
197		if ((error = bus_dmamap_create(dmatag, MEMSIZE, 1, MEMSIZE, 0,
198		     BUS_DMA_NOWAIT|BUS_DMA_24BIT, &lesc->sc_dmamap)) != 0) {
199			printf(": DMA map create error %d\n", error);
200			return;
201		}
202
203		/* Allocate DMA buffer */
204		if ((error = bus_dmamem_alloc(dmatag, MEMSIZE, 0, 0,
205		     &seg, 1, &rseg, BUS_DMA_NOWAIT|BUS_DMA_24BIT)) != 0){
206			printf(": DMA buffer allocation error %d\n", error);
207			return;
208		}
209
210		/* Map DMA buffer into kernel space */
211		if ((error = bus_dmamem_map(dmatag, &seg, rseg, MEMSIZE,
212		     (caddr_t *)&sc->sc_mem,
213		     BUS_DMA_NOWAIT|BUS_DMA_COHERENT|BUS_DMA_24BIT)) != 0) {
214			printf(": DMA buffer map error %d\n", error);
215			bus_dmamem_free(lesc->sc_dmatag, &seg, rseg);
216			return;
217		}
218
219		/* Load DMA buffer */
220		if ((error = bus_dmamap_load(dmatag, lesc->sc_dmamap, sc->sc_mem,
221		    MEMSIZE, NULL, BUS_DMA_NOWAIT|BUS_DMA_COHERENT|BUS_DMA_24BIT)) != 0) {
222			printf(": DMA buffer map load error %d\n", error);
223			bus_dmamem_free(dmatag, &seg, rseg);
224			bus_dmamem_unmap(dmatag, sc->sc_mem, MEMSIZE);
225			return;
226		}
227
228		sc->sc_addr = lesc->sc_dmamap->dm_segs[0].ds_addr & 0xffffff;
229		sc->sc_memsize = MEMSIZE;
230		sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
231	}
232
233	myetheraddr(sc->sc_arpcom.ac_enaddr);
234
235	sc->sc_supmedia = lemedia;
236	sc->sc_nsupmedia = nitems(lemedia);
237	sc->sc_defaultmedia = sc->sc_supmedia[sc->sc_nsupmedia - 1];
238
239	sc->sc_copytodesc = lance_copytobuf_contig;
240	sc->sc_copyfromdesc = lance_copyfrombuf_contig;
241	sc->sc_copytobuf = lance_copytobuf_contig;
242	sc->sc_copyfrombuf = lance_copyfrombuf_contig;
243	sc->sc_zerobuf = lance_zerobuf_contig;
244
245	sc->sc_rdcsr = le_sbus_rdcsr;
246	sc->sc_wrcsr = le_sbus_wrcsr;
247
248	am7990_config(&lesc->sc_am7990);
249
250	/* Establish interrupt handler */
251	if (sa->sa_nintr != 0)
252		(void)bus_intr_establish(lesc->sc_bustag, sa->sa_pri,
253		    IPL_NET, 0, am7990_intr, sc, self->dv_xname);
254}
255