1/*
2 * Copyright (c) 2019 Stefan Fritsch <sf@openbsd.org>
3 *
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef _DEV_PCI_VIRTIO_PCIREG_H_
18#define _DEV_PCI_VIRTIO_PCIREG_H_
19
20/* Virtio 0.9 config space */
21#define VIRTIO_CONFIG_DEVICE_FEATURES		0 /* 32bit */
22#define VIRTIO_CONFIG_GUEST_FEATURES		4 /* 32bit */
23#define VIRTIO_CONFIG_QUEUE_ADDRESS		8 /* 32bit */
24#define VIRTIO_CONFIG_QUEUE_SIZE		12 /* 16bit */
25#define VIRTIO_CONFIG_QUEUE_SELECT		14 /* 16bit */
26#define VIRTIO_CONFIG_QUEUE_NOTIFY		16 /* 16bit */
27#define VIRTIO_CONFIG_DEVICE_STATUS		18 /* 8bit */
28#define VIRTIO_CONFIG_ISR_STATUS		19 /* 8bit */
29#define  VIRTIO_CONFIG_ISR_CONFIG_CHANGE	2
30#define VIRTIO_CONFIG_DEVICE_CONFIG_NOMSI	20
31/* Only if MSIX is enabled: */
32#define VIRTIO_MSI_CONFIG_VECTOR		20 /* 16bit, optional */
33#define VIRTIO_MSI_QUEUE_VECTOR			22 /* 16bit, optional */
34#define VIRTIO_CONFIG_DEVICE_CONFIG_MSI		24
35
36#define VIRTIO_MSI_NO_VECTOR			0xffff
37
38/*
39 * Virtio 1.0 specific
40 */
41
42struct virtio_pci_cap {
43	uint8_t cap_vndr;	/* Generic PCI field: PCI_CAP_ID_VNDR */
44	uint8_t cap_next;	/* Generic PCI field: next ptr. */
45	uint8_t cap_len;	/* Generic PCI field: capability length */
46	uint8_t cfg_type;	/* Identifies the structure. */
47	uint8_t bar;		/* Where to find it. */
48	uint8_t padding[3];	/* Pad to full dword. */
49	uint32_t offset;	/* Offset within bar. */
50	uint32_t length;	/* Length of the structure, in bytes. */
51} __packed;
52
53/* Common configuration */
54#define VIRTIO_PCI_CAP_COMMON_CFG	1
55/* Notifications */
56#define VIRTIO_PCI_CAP_NOTIFY_CFG	2
57/* ISR Status */
58#define VIRTIO_PCI_CAP_ISR_CFG		3
59/* Device specific configuration */
60#define VIRTIO_PCI_CAP_DEVICE_CFG	4
61/* PCI configuration access */
62#define VIRTIO_PCI_CAP_PCI_CFG		5
63
64struct virtio_pci_notify_cap {
65	struct virtio_pci_cap cap;
66	uint32_t notify_off_multiplier;	/* Multiplier for queue_notify_off. */
67} __packed;
68
69struct virtio_pci_cfg_cap {
70	struct virtio_pci_cap cap;
71	uint8_t pci_cfg_data[4];	/* Data for BAR access. */
72} __packed;
73
74struct virtio_pci_common_cfg {
75	/* About the whole device. */
76	uint32_t device_feature_select;	/* read-write */
77	uint32_t device_feature;	/* read-only for driver */
78	uint32_t driver_feature_select;	/* read-write */
79	uint32_t driver_feature;	/* read-write */
80	uint16_t config_msix_vector;	/* read-write */
81	uint16_t num_queues;		/* read-only for driver */
82	uint8_t device_status;		/* read-write */
83	uint8_t config_generation;	/* read-only for driver */
84
85	/* About a specific virtqueue. */
86	uint16_t queue_select;		/* read-write */
87	uint16_t queue_size;		/* read-write, power of 2, or 0. */
88	uint16_t queue_msix_vector;	/* read-write */
89	uint16_t queue_enable;		/* read-write */
90	uint16_t queue_notify_off;	/* read-only for driver */
91	uint64_t queue_desc;		/* read-write */
92	uint64_t queue_avail;		/* read-write */
93	uint64_t queue_used;		/* read-write */
94} __packed;
95
96#endif /* _DEV_PCI_VIRTIO_PCIREG_H_ */
97