1/* $OpenBSD: vga_pci.c,v 1.91 2024/05/24 06:02:58 jsg Exp $ */ 2/* $NetBSD: vga_pci.c,v 1.3 1998/06/08 06:55:58 thorpej Exp $ */ 3 4/* 5 * Copyright (c) 2001 Wasabi Systems, Inc. 6 * All rights reserved. 7 * 8 * Written by Frank van der Linden for Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed for the NetBSD Project by 21 * Wasabi Systems, Inc. 22 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 23 * or promote products derived from this software without specific prior 24 * written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38/* 39 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 40 * All rights reserved. 41 * 42 * Author: Chris G. Demetriou 43 * 44 * Permission to use, copy, modify and distribute this software and 45 * its documentation is hereby granted, provided that both the copyright 46 * notice and this permission notice appear in all copies of the 47 * software, derivative works or modified versions, and any portions 48 * thereof, and that both notices appear in supporting documentation. 49 * 50 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 51 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 52 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 53 * 54 * Carnegie Mellon requests users of this software to return to 55 * 56 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 57 * School of Computer Science 58 * Carnegie Mellon University 59 * Pittsburgh PA 15213-3890 60 * 61 * any improvements or extensions that they make and grant Carnegie the 62 * rights to redistribute these changes. 63 */ 64 65#include "vga.h" 66#if defined(__i386__) || defined(__amd64__) 67#include "acpi.h" 68#endif 69 70#include <sys/param.h> 71#include <sys/systm.h> 72#include <sys/device.h> 73 74#include <machine/bus.h> 75 76#include <dev/pci/pcireg.h> 77#include <dev/pci/pcivar.h> 78#include <dev/pci/pcidevs.h> 79 80#include <dev/ic/mc6845reg.h> 81#include <dev/ic/pcdisplayvar.h> 82#include <dev/ic/vgareg.h> 83#include <dev/pci/vga_pcivar.h> 84 85#include <dev/wscons/wsconsio.h> 86#include <dev/wscons/wsdisplayvar.h> 87#include <dev/ic/vgavar.h> 88 89#ifdef X86EMU 90#include <machine/vga_post.h> 91#endif 92 93int vga_pci_match(struct device *, void *, void *); 94void vga_pci_attach(struct device *, struct device *, void *); 95int vga_pci_activate(struct device *, int); 96paddr_t vga_pci_mmap(void* v, off_t off, int prot); 97 98#if !defined(SMALL_KERNEL) && NACPI > 0 99void vga_save_state(struct vga_pci_softc *); 100void vga_restore_state(struct vga_pci_softc *); 101#endif 102 103const struct cfattach vga_pci_ca = { 104 sizeof(struct vga_pci_softc), vga_pci_match, vga_pci_attach, 105 NULL, vga_pci_activate 106}; 107 108#if !defined(SMALL_KERNEL) && NACPI > 0 109int vga_pci_do_post; 110 111struct vga_device_description { 112 u_int16_t rval[4]; 113 u_int16_t rmask[4]; 114 char vga_pci_post; 115}; 116 117static const struct vga_device_description vga_devs[] = { 118 /* 119 * Header description: 120 * 121 * First entry is a list of the pci video information in the following 122 * order: VENDOR, PRODUCT, SUBVENDOR, SUBPRODUCT 123 * 124 * The next entry is a list of corresponding masks. 125 * 126 * Finally the last value indicates if we should repost via 127 * vga_pci (i.e. the x86emulator) * bios. 128 */ 129 { /* All machines with GMA500/Poulsbo */ 130 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_US15W_IGD, 131 0x0000, 0x0000 }, 132 { 0xffff, 0xffff, 0x0000, 0x0000 }, 1 133 }, 134 { /* All machines with GMA500/Poulsbo */ 135 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_US15L_IGD, 136 0x0000, 0x0000 }, 137 { 0xffff, 0xffff, 0x0000, 0x0000 }, 1 138 }, 139 { /* All machines with GMA600/Oaktrail, 0x4100:4107 */ 140 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GMA600_0, 141 0x0000, 0x0000 }, 142 { 0xffff, 0xfff8, 0x0000, 0x0000 }, 1 143 }, 144 { /* All machines with GMA600/Oaktrail, 0x4108 */ 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GMA600_8, 146 0x0000, 0x0000 }, 147 { 0xffff, 0xffff, 0x0000, 0x0000 }, 1 148 }, 149 { /* All machines with Medfield, 0x0130:0x0137 */ 150 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MDFLD_IGD_0, 151 0x0000, 0x0000 }, 152 { 0xffff, 0xfff8, 0x0000, 0x0000 }, 1 153 }, 154 { /* All machines with GMA36x0/Cedartrail, 0x0be0:0x0bef */ 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GMA3600_0, 156 0x0000, 0x0000 }, 157 { 0xffff, 0xfff0, 0x0000, 0x0000 }, 1 158 }, 159}; 160#endif 161 162int 163vga_pci_match(struct device *parent, void *match, void *aux) 164{ 165 struct pci_attach_args *pa = aux; 166 167 if (DEVICE_IS_VGA_PCI(pa->pa_class) == 0) 168 return (0); 169 170 /* check whether it is disabled by firmware */ 171 if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) 172 & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 173 != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 174 return (0); 175 176 /* If it's the console, we have a winner! */ 177 if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA)) 178 return (1); 179 180 /* 181 * If we might match, make sure that the card actually looks OK. 182 */ 183 if (!vga_common_probe(pa->pa_iot, pa->pa_memt)) 184 return (0); 185 186 return (1); 187} 188 189void 190vga_pci_attach(struct device *parent, struct device *self, void *aux) 191{ 192 struct pci_attach_args *pa = aux; 193 pcireg_t reg; 194 struct vga_pci_softc *sc = (struct vga_pci_softc *)self; 195#if !defined(SMALL_KERNEL) && NACPI > 0 196 int prod, vend, subid, subprod, subvend, i; 197#endif 198 199 /* 200 * Enable bus master; X might need this for accelerated graphics. 201 */ 202 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 203 reg |= PCI_COMMAND_MASTER_ENABLE; 204 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg); 205 206 sc->sc_type = WSDISPLAY_TYPE_PCIVGA; 207 208 printf("\n"); 209 210#if !defined(SMALL_KERNEL) && NACPI > 0 211 212#ifdef X86EMU 213 if ((sc->sc_posth = vga_post_init(pa->pa_bus, pa->pa_device, 214 pa->pa_function)) == NULL) 215 printf("couldn't set up vga POST handler\n"); 216#endif 217 218 vend = PCI_VENDOR(pa->pa_id); 219 prod = PCI_PRODUCT(pa->pa_id); 220 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 221 subvend = PCI_VENDOR(subid); 222 subprod = PCI_PRODUCT(subid); 223 224 for (i = 0; i < nitems(vga_devs); i++) 225 if ((vend & vga_devs[i].rmask[0]) == vga_devs[i].rval[0] && 226 (prod & vga_devs[i].rmask[1]) == vga_devs[i].rval[1] && 227 (subvend & vga_devs[i].rmask[2]) == vga_devs[i].rval[2] && 228 (subprod & vga_devs[i].rmask[3]) == vga_devs[i].rval[3]) { 229 vga_pci_do_post = vga_devs[i].vga_pci_post; 230 break; 231 } 232#endif 233 234#ifdef RAMDISK_HOOKS 235 if (vga_aperture_needed(pa)) 236 printf("%s: aperture needed\n", sc->sc_dev.dv_xname); 237#endif 238 239 sc->sc_vc = vga_common_attach(self, pa->pa_iot, pa->pa_memt, 240 sc->sc_type); 241} 242 243int 244vga_pci_activate(struct device *self, int act) 245{ 246 int rv = 0; 247 248#if !defined(SMALL_KERNEL) && NACPI > 0 249 struct vga_pci_softc *sc = (struct vga_pci_softc *)self; 250#endif 251 252 switch (act) { 253 case DVACT_SUSPEND: 254 rv = config_activate_children(self, act); 255#if !defined(SMALL_KERNEL) && NACPI > 0 256 /* 257 * Save the common vga state. This should theoretically only 258 * be necessary if we intend to POST, but it is preferable 259 * to do it unconditionally, as many systems do not restore 260 * this state correctly upon resume. 261 */ 262 vga_save_state(sc); 263#endif 264 break; 265 case DVACT_RESUME: 266#if !defined(SMALL_KERNEL) && NACPI > 0 267#if defined (X86EMU) 268 if (vga_pci_do_post) 269 vga_post_call(sc->sc_posth); 270#endif 271 vga_restore_state(sc); 272#endif 273 rv = config_activate_children(self, act); 274 break; 275 default: 276 rv = config_activate_children(self, act); 277 break; 278 } 279 280 return (rv); 281} 282 283paddr_t 284vga_pci_mmap(void *v, off_t off, int prot) 285{ 286 return -1; 287} 288 289int 290vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt, 291 pci_chipset_tag_t pc, int bus, int device, int function) 292{ 293 return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0)); 294} 295 296int 297vga_pci_ioctl(void *v, u_long cmd, caddr_t addr, int flag, struct proc *pb) 298{ 299 int error = 0; 300 301 switch (cmd) { 302 case WSDISPLAYIO_GETPARAM: 303 if (ws_get_param != NULL) 304 return (*ws_get_param)((struct wsdisplay_param *)addr); 305 else 306 error = ENOTTY; 307 break; 308 case WSDISPLAYIO_SETPARAM: 309 if (ws_set_param != NULL) 310 return (*ws_set_param)((struct wsdisplay_param *)addr); 311 else 312 error = ENOTTY; 313 break; 314 default: 315 error = ENOTTY; 316 } 317 318 return (error); 319} 320 321#if !defined(SMALL_KERNEL) && NACPI > 0 322void 323vga_save_state(struct vga_pci_softc *sc) 324{ 325 struct vga_config *vc = sc->sc_vc; 326 struct vga_handle *vh; 327 struct vgascreen *scr; 328 size_t i; 329 char *buf; 330 331 if (vc == NULL) 332 return; 333 334 vh = &vc->hdl; 335 336 /* 337 * Save sequencer registers 338 */ 339 vga_ts_write(vh, syncreset, 1); /* stop sequencer */ 340 buf = (char *)&sc->sc_save_ts; 341 *buf++ = 0; 342 for (i = 1; i < sizeof(sc->sc_save_ts); i++) 343 *buf++ = _vga_ts_read(vh, i); 344 vga_ts_write(vh, syncreset, 3); /* start sequencer */ 345 /* pretend screen is not blanked */ 346 sc->sc_save_ts.mode &= ~0x20; 347 sc->sc_save_ts.mode |= 0x80; 348 349 /* 350 * Save CRTC registers 351 */ 352 buf = (char *)&sc->sc_save_crtc; 353 for (i = 0; i < sizeof(sc->sc_save_crtc); i++) 354 *buf++ = _pcdisplay_6845_read(&vh->vh_ph, i); 355 356 /* 357 * Save ATC registers 358 */ 359 buf = (char *)&sc->sc_save_atc; 360 for (i = 0; i < sizeof(sc->sc_save_atc); i++) 361 *buf++ = _vga_attr_read(vh, i); 362 363 /* 364 * Save GDC registers 365 */ 366 buf = (char *)&sc->sc_save_gdc; 367 for (i = 0; i < sizeof(sc->sc_save_gdc); i++) 368 *buf++ = _vga_gdc_read(vh, i); 369 370 vga_save_palette(vc); 371 372 /* XXX should also save font data */ 373 374 /* 375 * Save current screen contents if we have backing store for it, 376 * and intend to POST on resume. 377 * XXX Since we don't allocate backing store unless the second VT is 378 * XXX created, we could theoretically have no backing store available 379 * XXX at this point. 380 */ 381 if (vga_pci_do_post) { 382 scr = vc->active; 383 if (scr != NULL && scr->pcs.active && scr->pcs.mem != NULL) 384 bus_space_read_region_2(vh->vh_memt, vh->vh_memh, 385 scr->pcs.dispoffset, scr->pcs.mem, 386 scr->pcs.type->ncols * scr->pcs.type->nrows); 387 } 388} 389 390void 391vga_restore_state(struct vga_pci_softc *sc) 392{ 393 struct vga_config *vc = sc->sc_vc; 394 struct vga_handle *vh; 395 struct vgascreen *scr; 396 size_t i; 397 char *buf; 398 399 if (vc == NULL) 400 return; 401 402 vh = &vc->hdl; 403 404 /* 405 * Restore sequencer registers 406 */ 407 vga_ts_write(vh, syncreset, 1); /* stop sequencer */ 408 buf = (char *)&sc->sc_save_ts + 1; 409 for (i = 1; i < sizeof(sc->sc_save_ts); i++) 410 _vga_ts_write(vh, i, *buf++); 411 vga_ts_write(vh, syncreset, 3); /* start sequencer */ 412 413 /* 414 * Restore CRTC registers 415 */ 416 /* unprotect registers 00-07 */ 417 vga_6845_write(vh, vsynce, 418 vga_6845_read(vh, vsynce) & ~0x80); 419 buf = (char *)&sc->sc_save_crtc; 420 for (i = 0; i < sizeof(sc->sc_save_crtc); i++) 421 _pcdisplay_6845_write(&vh->vh_ph, i, *buf++); 422 423 /* 424 * Restore ATC registers 425 */ 426 buf = (char *)&sc->sc_save_atc; 427 for (i = 0; i < sizeof(sc->sc_save_atc); i++) 428 _vga_attr_write(vh, i, *buf++); 429 430 /* 431 * Restore GDC registers 432 */ 433 buf = (char *)&sc->sc_save_gdc; 434 for (i = 0; i < sizeof(sc->sc_save_gdc); i++) 435 _vga_gdc_write(vh, i, *buf++); 436 437 vga_restore_fonts(vc); 438 vga_restore_palette(vc); 439 440 /* 441 * Restore current screen contents if we have backing store for it, 442 * and have POSTed on resume. 443 * XXX Since we don't allocate backing store unless the second VT is 444 * XXX created, we could theoretically have no backing store available 445 * XXX at this point. 446 */ 447 if (vga_pci_do_post) { 448 scr = vc->active; 449 if (scr != NULL && scr->pcs.active && scr->pcs.mem != NULL) 450 bus_space_write_region_2(vh->vh_memt, vh->vh_memh, 451 scr->pcs.dispoffset, scr->pcs.mem, 452 scr->pcs.type->ncols * scr->pcs.type->nrows); 453 } 454} 455#endif 456