1/* $OpenBSD: if_wi_pci.c,v 1.57 2024/05/24 06:02:57 jsg Exp $ */ 2 3/* 4 * Copyright (c) 2001-2003 Todd C. Miller <millert@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 * 18 * Sponsored in part by the Defense Advanced Research Projects 19 * Agency (DARPA) and Air Force Research Laboratory, Air Force 20 * Materiel Command, USAF, under agreement number F39502-99-1-0512. 21 */ 22 23/* 24 * PCI attachment for the Wavelan driver. There are two basic types 25 * of PCI card supported: 26 * 27 * 1) Cards based on the Prism2.5 Mini-PCI chipset 28 * 2) Cards that use a dumb PCMCIA->PCI bridge 29 * 30 * Only the first type are "true" PCI cards. 31 * 32 * The latter are simply PCMCIA cards (or the guts of same) with some 33 * type of dumb PCMCIA->PCI bridge. They are "dumb" in that they 34 * are not true PCMCIA bridges and really just serve to deal with 35 * the different interrupt types and timings of the ISA vs. PCI bus. 36 * 37 * The following bridge types are supported: 38 * o PLX 9052 (the most common) 39 * o TMD 7160 (found in some NDC/Sohoware NCP130 cards) 40 * o ACEX EP1K30 (really a PLD, found in Symbol cards and their OEMs) 41 */ 42 43#include <sys/param.h> 44#include <sys/systm.h> 45#include <sys/device.h> 46#include <sys/timeout.h> 47 48#include <net/if.h> 49#include <net/if_media.h> 50 51#include <netinet/in.h> 52#include <netinet/if_ether.h> 53 54#include <net80211/ieee80211_var.h> 55#include <net80211/ieee80211_ioctl.h> 56 57#include <machine/bus.h> 58 59#include <dev/pci/pcireg.h> 60#include <dev/pci/pcivar.h> 61#include <dev/pci/pcidevs.h> 62 63#include <dev/ic/if_wireg.h> 64#include <dev/ic/if_wi_ieee.h> 65#include <dev/ic/if_wivar.h> 66 67/* For printing CIS of the actual PCMCIA card */ 68#define CIS_MFG_NAME_OFFSET 0x16 69#define CIS_INFO_SIZE 256 70 71const struct wi_pci_product *wi_pci_lookup(struct pci_attach_args *pa); 72int wi_pci_match(struct device *, void *, void *); 73void wi_pci_attach(struct device *, struct device *, void *); 74int wi_pci_activate(struct device *, int); 75void wi_pci_wakeup(struct wi_softc *); 76int wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc); 77int wi_pci_plx_attach(struct pci_attach_args *pa, struct wi_softc *sc); 78int wi_pci_tmd_attach(struct pci_attach_args *pa, struct wi_softc *sc); 79int wi_pci_native_attach(struct pci_attach_args *pa, struct wi_softc *sc); 80int wi_pci_common_attach(struct pci_attach_args *pa, struct wi_softc *sc); 81void wi_pci_plx_print_cis(struct wi_softc *); 82 83struct wi_pci_softc { 84 struct wi_softc sc_wi; /* real softc */ 85}; 86 87const struct cfattach wi_pci_ca = { 88 sizeof (struct wi_pci_softc), wi_pci_match, wi_pci_attach, NULL, 89 wi_pci_activate 90}; 91 92static const struct wi_pci_product { 93 pci_vendor_id_t pp_vendor; 94 pci_product_id_t pp_product; 95 int (*pp_attach)(struct pci_attach_args *pa, struct wi_softc *sc); 96} wi_pci_products[] = { 97 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P, wi_pci_plx_attach }, 98 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P02, wi_pci_plx_attach }, 99 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P03, wi_pci_plx_attach }, 100 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_8031, wi_pci_plx_attach }, 101 { PCI_VENDOR_EUMITCOM, PCI_PRODUCT_EUMITCOM_WL11000P, wi_pci_plx_attach }, 102 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_WL11000P, wi_pci_plx_attach }, 103 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRWE777A, wi_pci_plx_attach }, 104 { PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_MA301, wi_pci_plx_attach }, 105 { PCI_VENDOR_EFFICIENTNETS, PCI_PRODUCT_EFFICIENTNETS_SS1023, wi_pci_plx_attach }, 106 { PCI_VENDOR_ADDTRON, PCI_PRODUCT_ADDTRON_AWA100, wi_pci_plx_attach }, 107 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6000, wi_pci_plx_attach }, 108 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130, wi_pci_plx_attach }, 109 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130A2, wi_pci_tmd_attach }, 110 { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN, wi_pci_native_attach }, 111 { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_ISL3872, wi_pci_native_attach }, 112 { PCI_VENDOR_SAMSUNG, PCI_PRODUCT_SAMSUNG_SWL2210P, wi_pci_native_attach }, 113 { PCI_VENDOR_NORTEL, PCI_PRODUCT_NORTEL_211818A, wi_pci_acex_attach }, 114 { PCI_VENDOR_SYMBOL, PCI_PRODUCT_SYMBOL_LA41X3, wi_pci_acex_attach }, 115 { 0, 0, 0 } 116}; 117 118const struct wi_pci_product * 119wi_pci_lookup(struct pci_attach_args *pa) 120{ 121 const struct wi_pci_product *pp; 122 123 for (pp = wi_pci_products; pp->pp_product != 0; pp++) { 124 if (PCI_VENDOR(pa->pa_id) == pp->pp_vendor && 125 PCI_PRODUCT(pa->pa_id) == pp->pp_product) 126 return (pp); 127 } 128 129 return (NULL); 130} 131 132int 133wi_pci_match(struct device *parent, void *match, void *aux) 134{ 135 return (wi_pci_lookup(aux) != NULL); 136} 137 138void 139wi_pci_attach(struct device *parent, struct device *self, void *aux) 140{ 141 struct wi_softc *sc = (struct wi_softc *)self; 142 struct pci_attach_args *pa = aux; 143 const struct wi_pci_product *pp; 144 145 pp = wi_pci_lookup(pa); 146 if (pp->pp_attach(pa, sc) != 0) 147 return; 148 printf("\n"); 149 wi_attach(sc, &wi_func_io); 150} 151 152int 153wi_pci_activate(struct device *self, int act) 154{ 155 struct wi_softc *sc = (struct wi_softc *)self; 156 struct ifnet *ifp = &sc->sc_ic.ic_if; 157 158 switch (act) { 159 case DVACT_SUSPEND: 160 if (ifp->if_flags & IFF_RUNNING) 161 wi_stop(sc); 162 break; 163 case DVACT_WAKEUP: 164 if (ifp->if_flags & IFF_UP) 165 wi_pci_wakeup(sc); 166 break; 167 } 168 return (0); 169} 170 171void 172wi_pci_wakeup(struct wi_softc *sc) 173{ 174 int s; 175 176 s = splnet(); 177 while (sc->wi_flags & WI_FLAGS_BUSY) 178 tsleep_nsec(&sc->wi_flags, 0, "wipwr", INFSLP); 179 sc->wi_flags |= WI_FLAGS_BUSY; 180 181 wi_init(sc); 182 183 sc->wi_flags &= ~WI_FLAGS_BUSY; 184 wakeup(&sc->wi_flags); 185 splx(s); 186} 187 188/* 189 * ACEX EP1K30-based PCMCIA->PCI bridge attachment. 190 * 191 * The ACEX EP1K30 is a programmable logic device (PLD) used as a 192 * PCMCIA->PCI bridge on the Symbol LA4123 and its OEM equivalents 193 * (such as the Nortel E-mobility 211818-A). There are 3 I/O ports: 194 * BAR0 at 0x10 appears to be a command port. 195 * BAR1 at 0x14 contains COR at offset 0xe0. 196 * BAR2 at 0x18 maps the actual PCMCIA card. 197 * 198 * The datasheet for the ACEX EP1K30 is available from Altera but that 199 * doesn't really help much since we don't know how it is programmed. 200 * Details for this attachment were gleaned from a version of the 201 * Linux orinoco driver modified by Tobias Hoffmann based on 202 * what he discovered from the Windows driver. 203 */ 204int 205wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc) 206{ 207 bus_space_handle_t commandh, localh, ioh; 208 bus_space_tag_t commandt, localt; 209 bus_space_tag_t iot = pa->pa_iot; 210 bus_size_t commandsize, localsize, iosize; 211 int i; 212 213 if (pci_mapreg_map(pa, WI_ACEX_CMDRES, PCI_MAPREG_TYPE_IO, 214 0, &commandt, &commandh, NULL, &commandsize, 0) != 0) { 215 printf(": can't map command i/o space\n"); 216 return (ENXIO); 217 } 218 219 if (pci_mapreg_map(pa, WI_ACEX_LOCALRES, PCI_MAPREG_TYPE_IO, 220 0, &localt, &localh, NULL, &localsize, 0) != 0) { 221 printf(": can't map local i/o space\n"); 222 bus_space_unmap(commandt, commandh, commandsize); 223 return (ENXIO); 224 } 225 sc->wi_ltag = localt; 226 sc->wi_lhandle = localh; 227 228 if (pci_mapreg_map(pa, WI_TMD_IORES, PCI_MAPREG_TYPE_IO, 229 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 230 printf(": can't map i/o space\n"); 231 bus_space_unmap(localt, localh, localsize); 232 bus_space_unmap(commandt, commandh, commandsize); 233 return (ENXIO); 234 } 235 sc->wi_btag = iot; 236 sc->wi_bhandle = ioh; 237 238 /* 239 * Setup bridge chip. 240 */ 241 if (bus_space_read_4(commandt, commandh, 0) & 1) { 242 printf(": bridge not ready\n"); 243 bus_space_unmap(iot, ioh, iosize); 244 bus_space_unmap(localt, localh, localsize); 245 bus_space_unmap(commandt, commandh, commandsize); 246 return (ENXIO); 247 } 248 bus_space_write_4(commandt, commandh, 2, 0x118); 249 bus_space_write_4(commandt, commandh, 2, 0x108); 250 DELAY(30 * 1000); 251 bus_space_write_4(commandt, commandh, 2, 0x8); 252 for (i = 0; i < 30; i++) { 253 DELAY(30 * 1000); 254 if (bus_space_read_4(commandt, commandh, 0) & 0x10) 255 break; 256 } 257 if (i == 30) { 258 printf(": bridge timeout\n"); 259 bus_space_unmap(iot, ioh, iosize); 260 bus_space_unmap(localt, localh, localsize); 261 bus_space_unmap(commandt, commandh, commandsize); 262 return (ENXIO); 263 } 264 if ((bus_space_read_4(localt, localh, 0xe0) & 1) || 265 (bus_space_read_4(localt, localh, 0xe2) & 1) || 266 (bus_space_read_4(localt, localh, 0xe4) & 1)) { 267 printf(": failed bridge setup\n"); 268 bus_space_unmap(iot, ioh, iosize); 269 bus_space_unmap(localt, localh, localsize); 270 bus_space_unmap(commandt, commandh, commandsize); 271 return (ENXIO); 272 } 273 274 if (wi_pci_common_attach(pa, sc) != 0) { 275 bus_space_unmap(iot, ioh, iosize); 276 bus_space_unmap(localt, localh, localsize); 277 bus_space_unmap(commandt, commandh, commandsize); 278 return (ENXIO); 279 } 280 281 /* 282 * Enable I/O mode and level interrupts on the embedded PCMCIA 283 * card. 284 */ 285 bus_space_write_1(localt, localh, WI_ACEX_COR_OFFSET, WI_COR_IOMODE); 286 sc->wi_cor_offset = WI_ACEX_COR_OFFSET; 287 288 /* Unmap registers we no longer need access to. */ 289 bus_space_unmap(commandt, commandh, commandsize); 290 291 return (0); 292} 293 294/* 295 * PLX 9052-based PCMCIA->PCI bridge attachment. 296 * 297 * These are often sold as "PCI wireless card adapters" and are 298 * sold by several vendors. Most are simply rebadged versions of the 299 * Eumitcom WL11000P or Global Sun Technology GL24110P02. 300 * These cards use the PLX 9052 dumb bridge chip to connect a PCMCIA 301 * wireless card to the PCI bus. Because it is a dumb bridge and 302 * not a true PCMCIA bridge, the PCMCIA subsystem is not involved 303 * (or even required). The PLX 9052 provides multiple PCI address 304 * space mappings. The primary mappings at PCI registers 0x10 (mem) 305 * and 0x14 (I/O) are for the PLX chip itself, *NOT* the PCMCIA card. 306 * The mem and I/O spaces for the PCMCIA card are mapped to 0x18 and 307 * 0x1C respectively. 308 * The PLX 9050/9052 datasheet may be downloaded from PLX at 309 * http://www.plxtech.com/products/toolbox/9050.htm 310 */ 311int 312wi_pci_plx_attach(struct pci_attach_args *pa, struct wi_softc *sc) 313{ 314 bus_space_handle_t localh, ioh, memh; 315 bus_space_tag_t localt; 316 bus_space_tag_t iot = pa->pa_iot; 317 bus_space_tag_t memt = pa->pa_memt; 318 bus_size_t localsize, memsize, iosize; 319 u_int32_t intcsr; 320 321 if (pci_mapreg_map(pa, WI_PLX_MEMRES, PCI_MAPREG_TYPE_MEM, 0, 322 &memt, &memh, NULL, &memsize, 0) != 0) { 323 printf(": can't map mem space\n"); 324 return (ENXIO); 325 } 326 sc->wi_ltag = memt; 327 sc->wi_lhandle = memh; 328 329 if (pci_mapreg_map(pa, WI_PLX_IORES, 330 PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 331 printf(": can't map i/o space\n"); 332 bus_space_unmap(memt, memh, memsize); 333 return (ENXIO); 334 } 335 sc->wi_btag = iot; 336 sc->wi_bhandle = ioh; 337 338 /* 339 * Some cards, such as the PLX version of the NDC NCP130, 340 * don't have the PLX local registers mapped. In general 341 * this is OK since on those cards the serial EEPROM has 342 * already set things up for us. 343 * As such, we don't consider an error here to be fatal. 344 */ 345 localsize = 0; 346 if (pci_mapreg_type(pa->pa_pc, pa->pa_tag, WI_PLX_LOCALRES) 347 == PCI_MAPREG_TYPE_IO) { 348 if (pci_mapreg_map(pa, WI_PLX_LOCALRES, PCI_MAPREG_TYPE_IO, 349 0, &localt, &localh, NULL, &localsize, 0) != 0) 350 printf(": can't map PLX I/O space\n"); 351 } 352 353 if (wi_pci_common_attach(pa, sc) != 0) { 354 if (localsize) 355 bus_space_unmap(localt, localh, localsize); 356 bus_space_unmap(iot, ioh, iosize); 357 bus_space_unmap(memt, memh, memsize); 358 return (ENXIO); 359 } 360 361 if (localsize != 0) { 362 intcsr = bus_space_read_4(localt, localh, 363 WI_PLX_INTCSR); 364 365 /* 366 * The Netgear MA301 has local interrupt 1 active 367 * when there is no card in the adapter. We bail 368 * early in this case since our attempt to check 369 * for the presence of a card later will hang the 370 * MA301. 371 */ 372 if (intcsr & WI_PLX_LINT1STAT) { 373 printf("\n%s: no PCMCIA card detected in bridge card\n", 374 WI_PRT_ARG(sc)); 375 pci_intr_disestablish(pa->pa_pc, sc->sc_ih); 376 if (localsize) 377 bus_space_unmap(localt, localh, localsize); 378 bus_space_unmap(iot, ioh, iosize); 379 bus_space_unmap(memt, memh, memsize); 380 return (ENXIO); 381 } 382 383 /* 384 * Enable PCI interrupts on the PLX chip if they are 385 * not already enabled. On most adapters the serial 386 * EEPROM has done this for us but some (such as 387 * the Netgear MA301) do not. 388 */ 389 if (!(intcsr & WI_PLX_INTEN)) { 390 intcsr |= WI_PLX_INTEN; 391 bus_space_write_4(localt, localh, WI_PLX_INTCSR, 392 intcsr); 393 } 394 } 395 396 /* 397 * Enable I/O mode and level interrupts on the PCMCIA card. 398 * The PCMCIA card's COR is the first byte after the CIS. 399 */ 400 bus_space_write_1(memt, memh, WI_PLX_COR_OFFSET, WI_COR_IOMODE); 401 sc->wi_cor_offset = WI_PLX_COR_OFFSET; 402 403 if (localsize != 0) { 404 /* 405 * Test the presence of a wi(4) card by writing 406 * a magic number to the first software support 407 * register and then reading it back. 408 */ 409 CSR_WRITE_2(sc, WI_SW0, WI_DRVR_MAGIC); 410 DELAY(1000); 411 if (CSR_READ_2(sc, WI_SW0) != WI_DRVR_MAGIC) { 412 printf("\n%s: no PCMCIA card detected in bridge card\n", 413 WI_PRT_ARG(sc)); 414 pci_intr_disestablish(pa->pa_pc, sc->sc_ih); 415 if (localsize) 416 bus_space_unmap(localt, localh, localsize); 417 bus_space_unmap(iot, ioh, iosize); 418 bus_space_unmap(memt, memh, memsize); 419 return (ENXIO); 420 } 421 422 /* Unmap registers we no longer need access to. */ 423 bus_space_unmap(localt, localh, localsize); 424 425 /* Print PCMCIA card's CIS strings. */ 426 wi_pci_plx_print_cis(sc); 427 } 428 429 return (0); 430} 431 432/* 433 * TMD 7160-based PCMCIA->PCI bridge attachment. 434 * 435 * The TMD7160 dumb bridge chip is used on some versions of the 436 * NDC/Sohoware NCP130. The TMD7160 provides two PCI I/O registers. 437 * The first, at 0x14, maps to the Prism2 COR. 438 * The second, at 0x18, is for the Prism2 chip itself. 439 * 440 * The datasheet for the TMD7160 does not seem to be publicly available. 441 * Details for this attachment were gleaned from a version of the 442 * Linux WLAN driver modified by NDC. 443 */ 444int 445wi_pci_tmd_attach(struct pci_attach_args *pa, struct wi_softc *sc) 446{ 447 bus_space_handle_t localh, ioh; 448 bus_space_tag_t localt; 449 bus_space_tag_t iot = pa->pa_iot; 450 bus_size_t localsize, iosize; 451 452 if (pci_mapreg_map(pa, WI_TMD_LOCALRES, PCI_MAPREG_TYPE_IO, 453 0, &localt, &localh, NULL, &localsize, 0) != 0) { 454 printf(": can't map TMD I/O space\n"); 455 return (ENXIO); 456 } 457 sc->wi_ltag = localt; 458 sc->wi_lhandle = localh; 459 460 if (pci_mapreg_map(pa, WI_TMD_IORES, PCI_MAPREG_TYPE_IO, 461 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 462 printf(": can't map i/o space\n"); 463 bus_space_unmap(localt, localh, localsize); 464 return (ENXIO); 465 } 466 sc->wi_btag = iot; 467 sc->wi_bhandle = ioh; 468 469 if (wi_pci_common_attach(pa, sc) != 0) { 470 bus_space_unmap(iot, ioh, iosize); 471 bus_space_unmap(localt, localh, localsize); 472 return (ENXIO); 473 } 474 475 /* 476 * Enable I/O mode and level interrupts on the embedded PCMCIA 477 * card. The PCMCIA card's COR is the first byte of BAR 0. 478 */ 479 bus_space_write_1(localt, localh, 0, WI_COR_IOMODE); 480 sc->wi_cor_offset = 0; 481 482 return (0); 483} 484 485int 486wi_pci_native_attach(struct pci_attach_args *pa, struct wi_softc *sc) 487{ 488 bus_space_handle_t ioh; 489 bus_space_tag_t iot = pa->pa_iot; 490 bus_size_t iosize; 491 492 if (pci_mapreg_map(pa, WI_PCI_CBMA, PCI_MAPREG_TYPE_MEM, 493 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 494 printf(": can't map mem space\n"); 495 return (ENXIO); 496 } 497 sc->wi_ltag = iot; 498 sc->wi_lhandle = ioh; 499 sc->wi_btag = iot; 500 sc->wi_bhandle = ioh; 501 sc->sc_pci = 1; 502 503 if (wi_pci_common_attach(pa, sc) != 0) { 504 bus_space_unmap(iot, ioh, iosize); 505 return (ENXIO); 506 } 507 508 /* Do a soft reset of the HFA3842 MAC core */ 509 bus_space_write_2(iot, ioh, WI_PCI_COR_OFFSET, WI_COR_SOFT_RESET); 510 DELAY(100*1000); /* 100 m sec */ 511 bus_space_write_2(iot, ioh, WI_PCI_COR_OFFSET, WI_COR_CLEAR); 512 DELAY(100*1000); /* 100 m sec */ 513 sc->wi_cor_offset = WI_PCI_COR_OFFSET; 514 515 return (0); 516} 517 518int 519wi_pci_common_attach(struct pci_attach_args *pa, struct wi_softc *sc) 520{ 521 pci_intr_handle_t ih; 522 pci_chipset_tag_t pc = pa->pa_pc; 523 const char *intrstr; 524 525 /* Make sure interrupts are disabled. */ 526 CSR_WRITE_2(sc, WI_INT_EN, 0); 527 CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF); 528 529 /* Map and establish the interrupt. */ 530 if (pci_intr_map(pa, &ih)) { 531 printf(": couldn't map interrupt\n"); 532 return (ENXIO); 533 } 534 intrstr = pci_intr_string(pc, ih); 535 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc, 536 sc->sc_dev.dv_xname); 537 if (sc->sc_ih == NULL) { 538 printf(": couldn't establish interrupt"); 539 if (intrstr != NULL) 540 printf(" at %s", intrstr); 541 printf("\n"); 542 return (ENXIO); 543 } 544 printf(": %s", intrstr); 545 546 return (0); 547} 548 549void 550wi_pci_plx_print_cis(struct wi_softc *sc) 551{ 552 int i, stringno; 553 char cisbuf[CIS_INFO_SIZE]; 554 char *cis_strings[3]; 555 u_int8_t value; 556 const u_int8_t cis_magic[] = { 557 0x01, 0x03, 0x00, 0x00, 0xff, 0x17, 0x04, 0x67 558 }; 559 560 /* Make sure the CIS data is valid. */ 561 for (i = 0; i < 8; i++) { 562 value = bus_space_read_1(sc->wi_ltag, sc->wi_lhandle, i * 2); 563 if (value != cis_magic[i]) 564 return; 565 } 566 567 cis_strings[0] = cisbuf; 568 stringno = 0; 569 for (i = 0; i < CIS_INFO_SIZE && stringno < 3; i++) { 570 cisbuf[i] = bus_space_read_1(sc->wi_ltag, 571 sc->wi_lhandle, (CIS_MFG_NAME_OFFSET + i) * 2); 572 if (cisbuf[i] == '\0' && ++stringno < 3) 573 cis_strings[stringno] = &cisbuf[i + 1]; 574 } 575 cisbuf[CIS_INFO_SIZE - 1] = '\0'; 576 printf("\n%s: \"%s, %s, %s\"", WI_PRT_ARG(sc), 577 cis_strings[0], cis_strings[1], cis_strings[2]); 578} 579