if_ixgb.h revision 1.4 
1/**************************************************************************
2
3Copyright (c) 2001-2005, Intel Corporation
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10    this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13    notice, this list of conditions and the following disclaimer in the
14    documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17    contributors may be used to endorse or promote products derived from
18    this software without specific prior written permission.
19
20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32***************************************************************************/
33
34/* $OpenBSD: if_ixgb.h,v 1.4 2006/03/27 17:07:10 brad Exp $ */
35
36#ifndef _IXGB_H_DEFINED_
37#define _IXGB_H_DEFINED_
38
39#include "bpfilter.h"
40#include "vlan.h"
41
42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/sockio.h>
45#include <sys/mbuf.h>
46#include <sys/malloc.h>
47#include <sys/kernel.h>
48#include <sys/device.h>
49#include <sys/socket.h>
50
51#include <net/if.h>
52#include <net/if_dl.h>
53#include <net/if_media.h>
54
55#ifdef INET
56#include <netinet/in.h>
57#include <netinet/in_systm.h>
58#include <netinet/in_var.h>
59#include <netinet/ip.h>
60#include <netinet/if_ether.h>
61#include <netinet/tcp.h>
62#include <netinet/udp.h>
63#endif
64
65#if NVLAN > 0
66#include <net/if_types.h>
67#include <net/if_vlan_var.h>
68#endif
69
70#if NBPFILTER > 0
71#include <net/bpf.h>
72#endif
73
74#include <uvm/uvm_extern.h>
75
76#include <dev/pci/pcireg.h>
77#include <dev/pci/pcivar.h>
78#include <dev/pci/pcidevs.h>
79
80#include <dev/pci/ixgb_hw.h>
81#include <dev/pci/ixgb_ee.h>
82#include <dev/pci/ixgb_ids.h>
83
84/* Tunables */
85
86/*
87 * TxDescriptors Valid Range: 64-4096 Default Value: 1024 This value is the
88 * number of transmit descriptors allocated by the driver. Increasing this
89 * value allows the driver to queue more transmits. Each descriptor is 16
90 * bytes.
91 */
92#define IXGB_MAX_TXD                      1024
93
94/*
95 * RxDescriptors Valid Range: 64-4096 Default Value: 1024 This value is the
96 * number of receive descriptors allocated by the driver. Increasing this
97 * value allows the driver to buffer more incoming packets. Each descriptor
98 * is 16 bytes.  A receive buffer is also allocated for each descriptor. The
99 * maximum MTU size is 16110.
100 */
101#define IXGB_MAX_RXD                     1024
102
103/*
104 * TxIntDelay Valid Range: 0-65535 (0=off) Default Value: 32 This value
105 * delays the generation of transmit interrupts in units of 1.024
106 * microseconds. Transmit interrupt reduction can improve CPU efficiency if
107 * properly tuned for specific network traffic. If the system is reporting
108 * dropped transmits, this value may be set too high causing the driver to
109 * run out of available transmit descriptors.
110 */
111#define TIDV 32
112
113/*
114 * RxIntDelay Valid Range: 0-65535 (0=off) Default Value: 72 This value
115 * delays the generation of receive interrupts in units of 1.024
116 * microseconds.  Receive interrupt reduction can improve CPU efficiency if
117 * properly tuned for specific network traffic. Increasing this value adds
118 * extra latency to frame reception and can end up decreasing the throughput
119 * of TCP traffic. If the system is reporting dropped receives, this value
120 * may be set too high, causing the driver to run out of available receive
121 * descriptors.
122 */
123#define RDTR 72
124
125/*
126 * This parameter controls the duration of transmit watchdog timer.
127 */
128#define IXGB_TX_TIMEOUT                   5	/* set to 5 seconds */
129
130/*
131 * This parameter controls when the driver calls the routine to reclaim
132 * transmit descriptors.
133 */
134#define IXGB_TX_CLEANUP_THRESHOLD         IXGB_MAX_TXD / 8
135
136/*
137 * Flow Control Types.
138 * 1. ixgb_fc_none - Flow Control Disabled
139 * 2. ixgb_fc_rx_pause - Flow Control Receive Only
140 * 3. ixgb_fc_tx_pause - Flow Control Transmit Only
141 * 4. ixgb_fc_full - Flow Control Enabled
142 */
143#define FLOW_CONTROL_NONE    	ixgb_fc_none
144#define FLOW_CONTROL_RX_PAUSE   ixgb_fc_rx_pause
145#define FLOW_CONTROL_TX_PAUSE   ixgb_fc_tx_pause
146#define FLOW_CONTROL_FULL       ixgb_fc_full
147
148/*
149 * Set the flow control type. Assign one of the above flow control types to be enabled.
150 * Default Value: FLOW_CONTROL_FULL
151 */
152#define FLOW_CONTROL	        FLOW_CONTROL_FULL
153
154/*
155 * Receive Flow control low threshold (when we send a resume frame) (FCRTL)
156 * Valid Range: 64 - 262,136 (0x40 - 0x3FFF8, 8 byte granularity) must be
157 * less than high threshold by at least 8 bytes Default Value:  163,840
158 * (0x28000)
159 */
160#define FCRTL                   0x28000
161
162/*
163 * Receive Flow control high threshold (when we send a pause frame) (FCRTH)
164 * Valid Range: 1,536 - 262,136 (0x600 - 0x3FFF8, 8 byte granularity) Default
165 * Value: 196,608 (0x30000)
166 */
167#define FCRTH                   0x30000
168
169/*
170 * Flow control request timeout (how long to pause the link partner's tx)
171 * (PAP 15:0) Valid Range: 1 - 65535 Default Value:  256 (0x100)
172 */
173#define FCPAUSE		     0x100
174
175/* Tunables -- End */
176
177
178#define IXGB_VENDOR_ID                    0x8086
179#define IXGB_MMBA                         0x0010	/* Mem base address */
180#define IXGB_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
181
182#define IOCTL_CMD_TYPE                  u_long
183#define MAX_NUM_MULTICAST_ADDRESSES     128
184#define PCI_ANY_ID                      (~0U)
185
186/* Defines for printing debug information */
187#define DEBUG_INIT  0
188#define DEBUG_IOCTL 0
189#define DEBUG_HW    0
190
191#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
192#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
193#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
194#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
195#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
196#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
197#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
198#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
199#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
200
201
202/* Supported RX Buffer Sizes */
203#define IXGB_RXBUFFER_2048        2048
204#define IXGB_RXBUFFER_4096        4096
205#define IXGB_RXBUFFER_8192        8192
206#define IXGB_RXBUFFER_16384      16384
207
208#define IXGB_MAX_SCATTER           100
209
210struct ixgb_buffer {
211	struct mbuf    *m_head;
212	bus_dmamap_t    map;	/* bus_dma map for packet */
213};
214
215struct ixgb_q {
216	bus_dmamap_t    map;	/* bus_dma map for packet */
217};
218
219/*
220 * Bus dma allocation structure used by ixgb_dma_malloc and ixgb_dma_free.
221 */
222struct ixgb_dma_alloc {
223	bus_addr_t      dma_paddr;
224	caddr_t         dma_vaddr;
225	bus_dma_tag_t   dma_tag;
226	bus_dmamap_t    dma_map;
227	bus_dma_segment_t dma_seg;
228	bus_size_t      dma_size;
229	int             dma_nseg;
230};
231
232typedef enum _XSUM_CONTEXT_T {
233	OFFLOAD_NONE,
234	OFFLOAD_TCP_IP,
235	OFFLOAD_UDP_IP
236}               XSUM_CONTEXT_T;
237
238/* Our adapter structure */
239struct ixgb_softc {
240	struct device	sc_dv;
241	struct arpcom   interface_data;
242	struct ixgb_hw  hw;
243
244	/* OpenBSD operating-system-specific structures */
245	struct ixgb_osdep osdep;
246	struct ifmedia  media;
247	int             io_rid;
248
249	void            *sc_intrhand;
250	struct timeout	ixgb_intr_enable;
251	struct timeout	timer_handle;
252	void		*sc_powerhook;
253	void		*sc_shutdownhook;
254
255	/* Info about the board itself */
256	u_int32_t       part_num;
257	u_int8_t        link_active;
258	u_int16_t       link_speed;
259	u_int16_t       link_duplex;
260	u_int32_t       tx_int_delay;
261	u_int32_t       tx_abs_int_delay;
262	u_int32_t       rx_int_delay;
263	u_int32_t       rx_abs_int_delay;
264
265	int             raidc;
266
267	XSUM_CONTEXT_T  active_checksum_context;
268
269	/*
270	 * Transmit definitions
271	 *
272	 * We have an array of num_tx_desc descriptors (handled by the
273	 * controller) paired with an array of tx_buffers (at
274	 * tx_buffer_area). The index of the next available descriptor is
275	 * next_avail_tx_desc. The number of remaining tx_desc is
276	 * num_tx_desc_avail.
277	 */
278	struct ixgb_dma_alloc txdma;	/* bus_dma glue for tx desc */
279	struct ixgb_tx_desc *tx_desc_base;
280	u_int32_t       next_avail_tx_desc;
281	u_int32_t       oldest_used_tx_desc;
282	                volatile u_int16_t num_tx_desc_avail;
283	u_int16_t       num_tx_desc;
284	u_int32_t       txd_cmd;
285	struct ixgb_buffer *tx_buffer_area;
286	bus_dma_tag_t   txtag;	/* dma tag for tx */
287
288	/*
289	 * Receive definitions
290	 *
291	 * we have an array of num_rx_desc rx_desc (handled by the controller),
292	 * and paired with an array of rx_buffers (at rx_buffer_area). The
293	 * next pair to check on receive is at offset next_rx_desc_to_check
294	 */
295	struct ixgb_dma_alloc rxdma;	/* bus_dma glue for rx desc */
296	struct ixgb_rx_desc *rx_desc_base;
297	u_int32_t       next_rx_desc_to_check;
298	u_int16_t       num_rx_desc;
299	u_int32_t       rx_buffer_len;
300	struct ixgb_buffer *rx_buffer_area;
301	bus_dma_tag_t   rxtag;	/* dma tag for Rx */
302	u_int32_t       next_rx_desc_to_use;
303
304	/* Jumbo frame */
305	struct mbuf    *fmp;
306	struct mbuf    *lmp;
307
308	/* Misc stats maintained by the driver */
309	unsigned long   dropped_pkts;
310	unsigned long   mbuf_alloc_failed;
311	unsigned long   mbuf_cluster_failed;
312	unsigned long   no_tx_desc_avail1;
313	unsigned long   no_tx_desc_avail2;
314	unsigned long   no_tx_map_avail;
315	unsigned long   no_tx_dma_setup;
316	unsigned long	watchdog_events;
317
318	struct ixgb_hw_stats stats;
319};
320
321#endif				/* _IXGB_H_DEFINED_ */
322