if_ixgb.h revision 1.16
1/************************************************************************** 2 3Copyright (c) 2001-2005, Intel Corporation 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30POSSIBILITY OF SUCH DAMAGE. 31 32***************************************************************************/ 33 34/* $OpenBSD: if_ixgb.h,v 1.16 2014/07/22 13:12:11 mpi Exp $ */ 35 36#ifndef _IXGB_H_DEFINED_ 37#define _IXGB_H_DEFINED_ 38 39#include "bpfilter.h" 40#include "vlan.h" 41 42#include <sys/param.h> 43#include <sys/systm.h> 44#include <sys/sockio.h> 45#include <sys/mbuf.h> 46#include <sys/malloc.h> 47#include <sys/kernel.h> 48#include <sys/device.h> 49#include <sys/socket.h> 50#include <sys/timeout.h> 51 52#include <net/if.h> 53#include <net/if_dl.h> 54#include <net/if_media.h> 55 56#ifdef INET 57#include <netinet/in.h> 58#include <netinet/ip.h> 59#include <netinet/if_ether.h> 60#include <netinet/tcp.h> 61#include <netinet/udp.h> 62#endif 63 64#if NVLAN > 0 65#include <net/if_types.h> 66#include <net/if_vlan_var.h> 67#endif 68 69#if NBPFILTER > 0 70#include <net/bpf.h> 71#endif 72 73typedef int boolean_t; 74#define TRUE 1 75#define FALSE 0 76 77#include <dev/pci/pcireg.h> 78#include <dev/pci/pcivar.h> 79#include <dev/pci/pcidevs.h> 80 81#include <dev/pci/ixgb_hw.h> 82#include <dev/pci/ixgb_ee.h> 83#include <dev/pci/ixgb_ids.h> 84 85/* Tunables */ 86 87/* 88 * TxDescriptors Valid Range: 64-4096 Default Value: 2048 This value is the 89 * number of transmit descriptors allocated by the driver. Increasing this 90 * value allows the driver to queue more transmits. Each descriptor is 16 91 * bytes. 92 */ 93#define IXGB_MAX_TXD 2048 94 95/* 96 * RxDescriptors Valid Range: 64-4096 Default Value: 1024 This value is the 97 * number of receive descriptors allocated by the driver. Increasing this 98 * value allows the driver to buffer more incoming packets. Each descriptor 99 * is 16 bytes. A receive buffer is also allocated for each descriptor. The 100 * maximum MTU size is 16110. 101 */ 102#define IXGB_MAX_RXD 1024 103 104/* 105 * TxIntDelay Valid Range: 0-65535 (0=off) Default Value: 32 This value 106 * delays the generation of transmit interrupts in units of 1.024 107 * microseconds. Transmit interrupt reduction can improve CPU efficiency if 108 * properly tuned for specific network traffic. If the system is reporting 109 * dropped transmits, this value may be set too high causing the driver to 110 * run out of available transmit descriptors. 111 */ 112#define TIDV 32 113 114/* 115 * RxIntDelay Valid Range: 0-65535 (0=off) Default Value: 72 This value 116 * delays the generation of receive interrupts in units of 1.024 117 * microseconds. Receive interrupt reduction can improve CPU efficiency if 118 * properly tuned for specific network traffic. Increasing this value adds 119 * extra latency to frame reception and can end up decreasing the throughput 120 * of TCP traffic. If the system is reporting dropped receives, this value 121 * may be set too high, causing the driver to run out of available receive 122 * descriptors. 123 */ 124#define RDTR 72 125 126/* 127 * This parameter controls the duration of transmit watchdog timer. 128 */ 129#define IXGB_TX_TIMEOUT 5 /* set to 5 seconds */ 130 131/* 132 * This parameter controls when the driver calls the routine to reclaim 133 * transmit descriptors. 134 */ 135#define IXGB_TX_CLEANUP_THRESHOLD (sc->num_tx_desc / 8) 136 137/* 138 * Flow Control Types. 139 * 1. ixgb_fc_none - Flow Control Disabled 140 * 2. ixgb_fc_rx_pause - Flow Control Receive Only 141 * 3. ixgb_fc_tx_pause - Flow Control Transmit Only 142 * 4. ixgb_fc_full - Flow Control Enabled 143 */ 144#define FLOW_CONTROL_NONE ixgb_fc_none 145#define FLOW_CONTROL_RX_PAUSE ixgb_fc_rx_pause 146#define FLOW_CONTROL_TX_PAUSE ixgb_fc_tx_pause 147#define FLOW_CONTROL_FULL ixgb_fc_full 148 149/* 150 * Set the flow control type. Assign one of the above flow control types to be enabled. 151 * Default Value: FLOW_CONTROL_FULL 152 */ 153#define FLOW_CONTROL FLOW_CONTROL_FULL 154 155/* 156 * Receive Flow control low threshold (when we send a resume frame) (FCRTL) 157 * Valid Range: 64 - 262,136 (0x40 - 0x3FFF8, 8 byte granularity) must be 158 * less than high threshold by at least 8 bytes Default Value: 163,840 159 * (0x28000) 160 */ 161#define FCRTL 0x28000 162 163/* 164 * Receive Flow control high threshold (when we send a pause frame) (FCRTH) 165 * Valid Range: 1,536 - 262,136 (0x600 - 0x3FFF8, 8 byte granularity) Default 166 * Value: 196,608 (0x30000) 167 */ 168#define FCRTH 0x30000 169 170/* 171 * Flow control request timeout (how long to pause the link partner's tx) 172 * (PAP 15:0) Valid Range: 1 - 65535 Default Value: 256 (0x100) 173 */ 174#define FCPAUSE 0x100 175 176/* Tunables -- End */ 177 178#define IXGB_MMBA 0x0010 /* Mem base address */ 179#define IXGB_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 180 181#define MAX_NUM_MULTICAST_ADDRESSES 128 182 183/* Defines for printing debug information */ 184#define DEBUG_INIT 0 185#define DEBUG_IOCTL 0 186#define DEBUG_HW 0 187 188#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 189#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 190#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 191#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 192#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 193#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 194#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 195#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 196#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 197 198/* Supported RX Buffer Sizes */ 199#define IXGB_RXBUFFER_2048 2048 200#define IXGB_RXBUFFER_4096 4096 201#define IXGB_RXBUFFER_8192 8192 202#define IXGB_RXBUFFER_16384 16384 203 204#define IXGB_MAX_SCATTER 100 205 206struct ixgb_buffer { 207 struct mbuf *m_head; 208 bus_dmamap_t map; /* bus_dma map for packet */ 209}; 210 211/* 212 * Bus dma allocation structure used by 213 * ixgb_dma_malloc and ixgb_dma_free. 214 */ 215struct ixgb_dma_alloc { 216 bus_addr_t dma_paddr; 217 caddr_t dma_vaddr; 218 bus_dma_tag_t dma_tag; 219 bus_dmamap_t dma_map; 220 bus_dma_segment_t dma_seg; 221 bus_size_t dma_size; 222 int dma_nseg; 223}; 224 225typedef enum _XSUM_CONTEXT_T { 226 OFFLOAD_NONE, 227 OFFLOAD_TCP_IP, 228 OFFLOAD_UDP_IP 229} XSUM_CONTEXT_T; 230 231/* Our adapter structure */ 232struct ixgb_softc { 233 struct device sc_dv; 234 struct arpcom interface_data; 235 struct ixgb_hw hw; 236 237 /* OpenBSD operating-system-specific structures */ 238 struct ixgb_osdep osdep; 239 struct ifmedia media; 240 int io_rid; 241 242 void *sc_intrhand; 243 struct timeout ixgb_intr_enable; 244 struct timeout timer_handle; 245 int if_flags; 246 247 /* Info about the board itself */ 248 u_int32_t part_num; 249 u_int8_t link_active; 250 u_int16_t link_speed; 251 u_int16_t link_duplex; 252 u_int32_t tx_int_delay; 253 u_int32_t tx_abs_int_delay; 254 u_int32_t rx_int_delay; 255 u_int32_t rx_abs_int_delay; 256 257 int raidc; 258 259 XSUM_CONTEXT_T active_checksum_context; 260 261 /* 262 * Transmit definitions 263 * 264 * We have an array of num_tx_desc descriptors (handled by the 265 * controller) paired with an array of tx_buffers (at 266 * tx_buffer_area). The index of the next available descriptor is 267 * next_avail_tx_desc. The number of remaining tx_desc is 268 * num_tx_desc_avail. 269 */ 270 struct ixgb_dma_alloc txdma; /* bus_dma glue for tx desc */ 271 struct ixgb_tx_desc *tx_desc_base; 272 u_int32_t next_avail_tx_desc; 273 u_int32_t oldest_used_tx_desc; 274 volatile u_int16_t num_tx_desc_avail; 275 u_int16_t num_tx_desc; 276 u_int32_t txd_cmd; 277 struct ixgb_buffer *tx_buffer_area; 278 bus_dma_tag_t txtag; /* dma tag for tx */ 279 280 /* 281 * Receive definitions 282 * 283 * we have an array of num_rx_desc rx_desc (handled by the controller), 284 * and paired with an array of rx_buffers (at rx_buffer_area). The 285 * next pair to check on receive is at offset next_rx_desc_to_check 286 */ 287 struct ixgb_dma_alloc rxdma; /* bus_dma glue for rx desc */ 288 struct ixgb_rx_desc *rx_desc_base; 289 u_int32_t next_rx_desc_to_check; 290 u_int16_t num_rx_desc; 291 u_int32_t rx_buffer_len; 292 struct ixgb_buffer *rx_buffer_area; 293 bus_dma_tag_t rxtag; /* dma tag for Rx */ 294 u_int32_t next_rx_desc_to_use; 295 296 /* 297 * First/last mbuf pointers, for 298 * collecting multisegment RX packets. 299 */ 300 struct mbuf *fmp; 301 struct mbuf *lmp; 302 303 /* Misc stats maintained by the driver */ 304 unsigned long dropped_pkts; 305 unsigned long mbuf_alloc_failed; 306 unsigned long mbuf_cluster_failed; 307 unsigned long no_tx_desc_avail1; 308 unsigned long no_tx_desc_avail2; 309 unsigned long no_tx_map_avail; 310 unsigned long no_tx_dma_setup; 311 unsigned long watchdog_events; 312 313 struct ixgb_hw_stats stats; 314}; 315 316#endif /* _IXGB_H_DEFINED_ */ 317