if_ixgb.h revision 1.15
1/**************************************************************************
2
3Copyright (c) 2001-2005, Intel Corporation
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10    this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13    notice, this list of conditions and the following disclaimer in the
14    documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17    contributors may be used to endorse or promote products derived from
18    this software without specific prior written permission.
19
20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32***************************************************************************/
33
34/* $OpenBSD: if_ixgb.h,v 1.15 2014/07/10 14:21:20 deraadt Exp $ */
35
36#ifndef _IXGB_H_DEFINED_
37#define _IXGB_H_DEFINED_
38
39#include "bpfilter.h"
40#include "vlan.h"
41
42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/sockio.h>
45#include <sys/mbuf.h>
46#include <sys/malloc.h>
47#include <sys/kernel.h>
48#include <sys/device.h>
49#include <sys/socket.h>
50#include <sys/timeout.h>
51
52#include <net/if.h>
53#include <net/if_dl.h>
54#include <net/if_media.h>
55
56#ifdef INET
57#include <netinet/in.h>
58#include <netinet/in_systm.h>
59#include <netinet/ip.h>
60#include <netinet/if_ether.h>
61#include <netinet/tcp.h>
62#include <netinet/udp.h>
63#endif
64
65#if NVLAN > 0
66#include <net/if_types.h>
67#include <net/if_vlan_var.h>
68#endif
69
70#if NBPFILTER > 0
71#include <net/bpf.h>
72#endif
73
74typedef int	boolean_t;
75#define TRUE	1
76#define FALSE	0
77
78#include <dev/pci/pcireg.h>
79#include <dev/pci/pcivar.h>
80#include <dev/pci/pcidevs.h>
81
82#include <dev/pci/ixgb_hw.h>
83#include <dev/pci/ixgb_ee.h>
84#include <dev/pci/ixgb_ids.h>
85
86/* Tunables */
87
88/*
89 * TxDescriptors Valid Range: 64-4096 Default Value: 2048 This value is the
90 * number of transmit descriptors allocated by the driver. Increasing this
91 * value allows the driver to queue more transmits. Each descriptor is 16
92 * bytes.
93 */
94#define IXGB_MAX_TXD			2048
95
96/*
97 * RxDescriptors Valid Range: 64-4096 Default Value: 1024 This value is the
98 * number of receive descriptors allocated by the driver. Increasing this
99 * value allows the driver to buffer more incoming packets. Each descriptor
100 * is 16 bytes.  A receive buffer is also allocated for each descriptor. The
101 * maximum MTU size is 16110.
102 */
103#define IXGB_MAX_RXD			1024
104
105/*
106 * TxIntDelay Valid Range: 0-65535 (0=off) Default Value: 32 This value
107 * delays the generation of transmit interrupts in units of 1.024
108 * microseconds. Transmit interrupt reduction can improve CPU efficiency if
109 * properly tuned for specific network traffic. If the system is reporting
110 * dropped transmits, this value may be set too high causing the driver to
111 * run out of available transmit descriptors.
112 */
113#define TIDV				32
114
115/*
116 * RxIntDelay Valid Range: 0-65535 (0=off) Default Value: 72 This value
117 * delays the generation of receive interrupts in units of 1.024
118 * microseconds.  Receive interrupt reduction can improve CPU efficiency if
119 * properly tuned for specific network traffic. Increasing this value adds
120 * extra latency to frame reception and can end up decreasing the throughput
121 * of TCP traffic. If the system is reporting dropped receives, this value
122 * may be set too high, causing the driver to run out of available receive
123 * descriptors.
124 */
125#define RDTR				72
126
127/*
128 * This parameter controls the duration of transmit watchdog timer.
129 */
130#define IXGB_TX_TIMEOUT			5	/* set to 5 seconds */
131
132/*
133 * This parameter controls when the driver calls the routine to reclaim
134 * transmit descriptors.
135 */
136#define IXGB_TX_CLEANUP_THRESHOLD	(sc->num_tx_desc / 8)
137
138/*
139 * Flow Control Types.
140 * 1. ixgb_fc_none - Flow Control Disabled
141 * 2. ixgb_fc_rx_pause - Flow Control Receive Only
142 * 3. ixgb_fc_tx_pause - Flow Control Transmit Only
143 * 4. ixgb_fc_full - Flow Control Enabled
144 */
145#define FLOW_CONTROL_NONE	ixgb_fc_none
146#define FLOW_CONTROL_RX_PAUSE	ixgb_fc_rx_pause
147#define FLOW_CONTROL_TX_PAUSE	ixgb_fc_tx_pause
148#define FLOW_CONTROL_FULL	ixgb_fc_full
149
150/*
151 * Set the flow control type. Assign one of the above flow control types to be enabled.
152 * Default Value: FLOW_CONTROL_FULL
153 */
154#define FLOW_CONTROL		FLOW_CONTROL_FULL
155
156/*
157 * Receive Flow control low threshold (when we send a resume frame) (FCRTL)
158 * Valid Range: 64 - 262,136 (0x40 - 0x3FFF8, 8 byte granularity) must be
159 * less than high threshold by at least 8 bytes Default Value:  163,840
160 * (0x28000)
161 */
162#define FCRTL			0x28000
163
164/*
165 * Receive Flow control high threshold (when we send a pause frame) (FCRTH)
166 * Valid Range: 1,536 - 262,136 (0x600 - 0x3FFF8, 8 byte granularity) Default
167 * Value: 196,608 (0x30000)
168 */
169#define FCRTH			0x30000
170
171/*
172 * Flow control request timeout (how long to pause the link partner's tx)
173 * (PAP 15:0) Valid Range: 1 - 65535 Default Value:  256 (0x100)
174 */
175#define FCPAUSE			0x100
176
177/* Tunables -- End */
178
179#define IXGB_MMBA		0x0010	/* Mem base address */
180#define IXGB_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
181
182#define MAX_NUM_MULTICAST_ADDRESSES	128
183
184/* Defines for printing debug information */
185#define DEBUG_INIT	0
186#define DEBUG_IOCTL	0
187#define DEBUG_HW	0
188
189#define INIT_DEBUGOUT(S)		if (DEBUG_INIT)  printf(S "\n")
190#define INIT_DEBUGOUT1(S, A)		if (DEBUG_INIT)  printf(S "\n", A)
191#define INIT_DEBUGOUT2(S, A, B)		if (DEBUG_INIT)  printf(S "\n", A, B)
192#define IOCTL_DEBUGOUT(S)		if (DEBUG_IOCTL) printf(S "\n")
193#define IOCTL_DEBUGOUT1(S, A)		if (DEBUG_IOCTL) printf(S "\n", A)
194#define IOCTL_DEBUGOUT2(S, A, B)	if (DEBUG_IOCTL) printf(S "\n", A, B)
195#define HW_DEBUGOUT(S)			if (DEBUG_HW) printf(S "\n")
196#define HW_DEBUGOUT1(S, A)		if (DEBUG_HW) printf(S "\n", A)
197#define HW_DEBUGOUT2(S, A, B)		if (DEBUG_HW) printf(S "\n", A, B)
198
199/* Supported RX Buffer Sizes */
200#define IXGB_RXBUFFER_2048	2048
201#define IXGB_RXBUFFER_4096	4096
202#define IXGB_RXBUFFER_8192	8192
203#define IXGB_RXBUFFER_16384	16384
204
205#define IXGB_MAX_SCATTER	100
206
207struct ixgb_buffer {
208	struct mbuf    *m_head;
209	bus_dmamap_t    map;	/* bus_dma map for packet */
210};
211
212/*
213 * Bus dma allocation structure used by
214 * ixgb_dma_malloc and ixgb_dma_free.
215 */
216struct ixgb_dma_alloc {
217	bus_addr_t		dma_paddr;
218	caddr_t			dma_vaddr;
219	bus_dma_tag_t		dma_tag;
220	bus_dmamap_t		dma_map;
221	bus_dma_segment_t	dma_seg;
222	bus_size_t		dma_size;
223	int			dma_nseg;
224};
225
226typedef enum _XSUM_CONTEXT_T {
227	OFFLOAD_NONE,
228	OFFLOAD_TCP_IP,
229	OFFLOAD_UDP_IP
230} XSUM_CONTEXT_T;
231
232/* Our adapter structure */
233struct ixgb_softc {
234	struct device	sc_dv;
235	struct arpcom	interface_data;
236	struct ixgb_hw	hw;
237
238	/* OpenBSD operating-system-specific structures */
239	struct ixgb_osdep osdep;
240	struct ifmedia	media;
241	int		io_rid;
242
243	void		*sc_intrhand;
244	struct timeout	ixgb_intr_enable;
245	struct timeout	timer_handle;
246	int		if_flags;
247
248	/* Info about the board itself */
249	u_int32_t	part_num;
250	u_int8_t	link_active;
251	u_int16_t	link_speed;
252	u_int16_t	link_duplex;
253	u_int32_t	tx_int_delay;
254	u_int32_t	tx_abs_int_delay;
255	u_int32_t	rx_int_delay;
256	u_int32_t	rx_abs_int_delay;
257
258	int		raidc;
259
260	XSUM_CONTEXT_T	active_checksum_context;
261
262	/*
263	 * Transmit definitions
264	 *
265	 * We have an array of num_tx_desc descriptors (handled by the
266	 * controller) paired with an array of tx_buffers (at
267	 * tx_buffer_area). The index of the next available descriptor is
268	 * next_avail_tx_desc. The number of remaining tx_desc is
269	 * num_tx_desc_avail.
270	 */
271	struct ixgb_dma_alloc	txdma;		/* bus_dma glue for tx desc */
272	struct ixgb_tx_desc	*tx_desc_base;
273	u_int32_t		next_avail_tx_desc;
274	u_int32_t		oldest_used_tx_desc;
275	volatile u_int16_t	num_tx_desc_avail;
276	u_int16_t		num_tx_desc;
277	u_int32_t		txd_cmd;
278	struct ixgb_buffer	*tx_buffer_area;
279	bus_dma_tag_t		txtag;		/* dma tag for tx */
280
281	/*
282	 * Receive definitions
283	 *
284	 * we have an array of num_rx_desc rx_desc (handled by the controller),
285	 * and paired with an array of rx_buffers (at rx_buffer_area). The
286	 * next pair to check on receive is at offset next_rx_desc_to_check
287	 */
288	struct ixgb_dma_alloc	rxdma;		/* bus_dma glue for rx desc */
289	struct ixgb_rx_desc	*rx_desc_base;
290	u_int32_t		next_rx_desc_to_check;
291	u_int16_t		num_rx_desc;
292	u_int32_t		rx_buffer_len;
293	struct ixgb_buffer	*rx_buffer_area;
294	bus_dma_tag_t		rxtag;		/* dma tag for Rx */
295	u_int32_t		next_rx_desc_to_use;
296
297	/*
298	 * First/last mbuf pointers, for
299	 * collecting multisegment RX packets.
300	 */
301	struct mbuf		*fmp;
302	struct mbuf		*lmp;
303
304	/* Misc stats maintained by the driver */
305	unsigned long		dropped_pkts;
306	unsigned long		mbuf_alloc_failed;
307	unsigned long		mbuf_cluster_failed;
308	unsigned long		no_tx_desc_avail1;
309	unsigned long		no_tx_desc_avail2;
310	unsigned long		no_tx_map_avail;
311	unsigned long		no_tx_dma_setup;
312	unsigned long		watchdog_events;
313
314	struct ixgb_hw_stats	stats;
315};
316
317#endif /* _IXGB_H_DEFINED_ */
318