1/* $OpenBSD: if_fxp_pci.c,v 1.68 2024/05/24 06:02:53 jsg Exp $ */ 2 3/* 4 * Copyright (c) 1995, David Greenman 5 * All rights reserved. 6 * 7 * Modifications to support NetBSD: 8 * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice unmodified, this list of conditions, and the following 15 * disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * Id: if_fxp.c,v 1.55 1998/08/04 08:53:12 dg Exp 33 */ 34 35/* 36 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 37 */ 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/timeout.h> 42 43#include <net/if.h> 44#include <net/if_media.h> 45 46#include <netinet/in.h> 47 48#include <sys/device.h> 49 50#include <netinet/if_ether.h> 51 52#include <machine/bus.h> 53#include <machine/intr.h> 54 55#include <dev/mii/miivar.h> 56 57#include <dev/ic/fxpreg.h> 58#include <dev/ic/fxpvar.h> 59 60#include <dev/pci/pcivar.h> 61#include <dev/pci/pcireg.h> 62#include <dev/pci/pcidevs.h> 63 64int fxp_pci_match(struct device *, void *, void *); 65void fxp_pci_attach(struct device *, struct device *, void *); 66int fxp_pci_detach(struct device *, int); 67 68struct fxp_pci_softc { 69 struct fxp_softc psc_softc; 70 pci_chipset_tag_t psc_pc; 71 bus_size_t psc_mapsize; 72}; 73 74const struct cfattach fxp_pci_ca = { 75 sizeof(struct fxp_pci_softc), fxp_pci_match, fxp_pci_attach, 76 fxp_pci_detach, fxp_activate 77}; 78 79const struct pci_matchid fxp_pci_devices[] = { 80 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8255X }, 81 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82552 }, 82 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82559 }, 83 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82559ER }, 84 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562 }, 85 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_0 }, 86 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_1 }, 87 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_2 }, 88 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_0 }, 89 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_1 }, 90 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_2 }, 91 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_3 }, 92 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_4 }, 93 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_5 }, 94 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_6 }, 95 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_7 }, 96 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_8 }, 97 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_0 }, 98 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_1 }, 99 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_2 }, 100 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_3 }, 101 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_4 }, 102 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_5 }, 103 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_6 }, 104 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_7 }, 105 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_8 }, 106 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_9 }, 107 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_10 }, 108 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_11 }, 109 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_12 }, 110 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_13 }, 111 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_14 }, 112 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_15 }, 113 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_16 }, 114 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_17 }, 115 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_18 }, 116 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_19 }, 117 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_M }, 118 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100 }, 119 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_LAN }, 120 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_LAN_1 }, 121 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_LAN_2 }, 122 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LAN }, 123 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LAN_2 }, 124 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FBM_LAN }, 125 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GB_LAN }, 126 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GB_LAN_2 }, 127}; 128 129int 130fxp_pci_match(struct device *parent, void *match, void *aux) 131{ 132 return (pci_matchbyid((struct pci_attach_args *)aux, fxp_pci_devices, 133 nitems(fxp_pci_devices))); 134} 135 136void 137fxp_pci_attach(struct device *parent, struct device *self, void *aux) 138{ 139 struct fxp_pci_softc *psc = (void *)self; 140 struct fxp_softc *sc = &psc->psc_softc; 141 struct pci_attach_args *pa = aux; 142 pci_chipset_tag_t pc = pa->pa_pc; 143 pci_intr_handle_t ih; 144 const char *chipname = NULL; 145 const char *intrstr = NULL; 146 147 if (pci_mapreg_map(pa, FXP_PCI_IOBA, PCI_MAPREG_TYPE_IO, 0, 148 &sc->sc_st, &sc->sc_sh, NULL, &psc->psc_mapsize, 0)) { 149 printf(": can't map i/o space\n"); 150 return; 151 } 152 psc->psc_pc = pa->pa_pc; 153 sc->sc_dmat = pa->pa_dmat; 154 155 sc->sc_revision = PCI_REVISION(pa->pa_class); 156 157 /* 158 * Allocate our interrupt. 159 */ 160 if (pci_intr_map(pa, &ih)) { 161 printf(": couldn't map interrupt\n"); 162 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->psc_mapsize); 163 return; 164 } 165 166 intrstr = pci_intr_string(pc, ih); 167 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc, 168 self->dv_xname); 169 if (sc->sc_ih == NULL) { 170 printf(": couldn't establish interrupt"); 171 if (intrstr != NULL) 172 printf(" at %s", intrstr); 173 printf("\n"); 174 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->psc_mapsize); 175 return; 176 } 177 178 switch (PCI_PRODUCT(pa->pa_id)) { 179 case PCI_PRODUCT_INTEL_8255X: 180 case PCI_PRODUCT_INTEL_82559: 181 case PCI_PRODUCT_INTEL_82559ER: 182 chipname = "i82557"; 183 if (sc->sc_revision >= FXP_REV_82558_A4) 184 chipname = "i82558"; 185 if (sc->sc_revision >= FXP_REV_82559_A0) 186 chipname = "i82559"; 187 if (sc->sc_revision >= FXP_REV_82559S_A) 188 chipname = "i82559S"; 189 if (sc->sc_revision >= FXP_REV_82550) 190 chipname = "i82550"; 191 if (sc->sc_revision >= FXP_REV_82551_E) 192 chipname = "i82551"; 193 break; 194 case PCI_PRODUCT_INTEL_82552: 195 chipname = "i82552"; 196 break; 197 default: 198 chipname = "i82562"; 199 break; 200 } 201 202 if (chipname != NULL) 203 printf(", %s", chipname); 204 205 /* 206 * Cards for which we should WRITE TO THE EEPROM 207 * to turn off dynamic standby mode to avoid 208 * a problem where the card will fail to resume when 209 * entering the IDLE state. We use this nasty if statement 210 * and corresponding pci dev numbers directly so that people 211 * know not to add new cards to this unless you are really 212 * certain what you are doing and are not going to end up 213 * killing people's eeproms. 214 */ 215 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) && 216 (PCI_PRODUCT(pa->pa_id) == 0x2449 || 217 (PCI_PRODUCT(pa->pa_id) > 0x1030 && 218 PCI_PRODUCT(pa->pa_id) < 0x1039) || 219 (PCI_PRODUCT(pa->pa_id) == 0x1229 && 220 (sc->sc_revision >= 8 && sc->sc_revision <= 16)))) 221 sc->sc_flags |= FXPF_DISABLE_STANDBY; 222 223 /* 224 * enable PCI Memory Write and Invalidate command 225 */ 226 if (sc->sc_revision >= FXP_REV_82558_A4) 227 if (PCI_CACHELINE(pci_conf_read(pa->pa_pc, pa->pa_tag, 228 PCI_BHLC_REG))) { 229 pci_conf_write(pa->pa_pc, pa->pa_tag, 230 PCI_COMMAND_STATUS_REG, 231 PCI_COMMAND_INVALIDATE_ENABLE | 232 pci_conf_read(pa->pa_pc, pa->pa_tag, 233 PCI_COMMAND_STATUS_REG)); 234 sc->sc_flags |= FXPF_MWI_ENABLE; 235 } 236 237 /* Do generic parts of attach. */ 238 if (fxp_attach(sc, intrstr)) { 239 /* Failed! */ 240 pci_intr_disestablish(pc, sc->sc_ih); 241 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->psc_mapsize); 242 return; 243 } 244} 245 246int 247fxp_pci_detach(struct device *self, int flags) 248{ 249 struct fxp_pci_softc *psc = (void *)self; 250 struct fxp_softc *sc = &psc->psc_softc; 251 252 if (sc->sc_ih != NULL) 253 pci_intr_disestablish(psc->psc_pc, sc->sc_ih); 254 fxp_detach(sc); 255 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->psc_mapsize); 256 257 return (0); 258} 259