if_dc_pci.c revision 1.78
1/* $OpenBSD: if_dc_pci.c,v 1.78 2022/03/11 18:00:45 mpi Exp $ */ 2 3/* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/mbuf.h> 42#include <sys/socket.h> 43#include <sys/ioctl.h> 44#include <sys/errno.h> 45#include <sys/timeout.h> 46#include <sys/malloc.h> 47#include <sys/kernel.h> 48#include <sys/device.h> 49 50#include <net/if.h> 51 52#include <netinet/in.h> 53#include <netinet/if_ether.h> 54 55#include <net/if_media.h> 56 57#if NBPFILTER > 0 58#include <net/bpf.h> 59#endif 60 61#include <dev/mii/miivar.h> 62 63#include <dev/pci/pcireg.h> 64#include <dev/pci/pcivar.h> 65#include <dev/pci/pcidevs.h> 66 67#ifdef __sparc64__ 68#include <dev/ofw/openfirm.h> 69#endif 70 71#ifndef __hppa__ 72#define DC_USEIOSPACE 73#endif 74 75#include <dev/ic/dcreg.h> 76 77/* 78 * Various supported device vendors/types and their names. 79 */ 80struct dc_type dc_devs[] = { 81 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 }, 82 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 83 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9009 }, 84 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 }, 85 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 }, 86 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511 }, 87 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513 }, 88 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 }, 89 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 }, 90 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A }, 91 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 }, 92 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 }, 93 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 }, 94 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 }, 95 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC }, 96 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII }, 97 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 }, 98 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 99 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_RS7112 }, 100 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21145 }, 101 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSHO100BTX }, 102 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN130 }, 103 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143 }, 104 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985 }, 105 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500 }, 106 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500MX }, 107 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_PCM200 }, 108 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DRP32TXD }, 109 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCMPC200 }, 110 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCM200 }, 111 { PCI_VENDOR_HAWKING, PCI_PRODUCT_HAWKING_PN672TX }, 112 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN120 }, 113 { 0, 0 } 114}; 115 116int dc_pci_match(struct device *, void *, void *); 117void dc_pci_attach(struct device *, struct device *, void *); 118int dc_pci_detach(struct device *, int); 119 120struct dc_pci_softc { 121 struct dc_softc psc_softc; 122 pci_chipset_tag_t psc_pc; 123 bus_size_t psc_mapsize; 124}; 125 126/* 127 * Probe for a 21143 or clone chip. Check the PCI vendor and device 128 * IDs against our list and return a device name if we find a match. 129 */ 130int 131dc_pci_match(struct device *parent, void *match, void *aux) 132{ 133 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 134 struct dc_type *t; 135 136 /* 137 * Support for the 21140 chip is experimental. If it works for you, 138 * that's great. By default, this chip will use de. 139 */ 140 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 141 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140) 142 return (1); 143 144 /* 145 * The following chip revision doesn't seem to work so well with dc, 146 * so let's have de handle it. (de will return a match of 2) 147 */ 148 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 149 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 && 150 PCI_REVISION(pa->pa_class) == 0x21) 151 return (1); 152 153 for (t = dc_devs; t->dc_vid != 0; t++) { 154 if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) && 155 (PCI_PRODUCT(pa->pa_id) == t->dc_did)) { 156 return (3); 157 } 158 } 159 160 return (0); 161} 162 163/* 164 * Attach the interface. Allocate softc structures, do ifmedia 165 * setup and ethernet/BPF attach. 166 */ 167void 168dc_pci_attach(struct device *parent, struct device *self, void *aux) 169{ 170 const char *intrstr = NULL; 171 pcireg_t command; 172 struct dc_pci_softc *psc = (struct dc_pci_softc *)self; 173 struct dc_softc *sc = &psc->psc_softc; 174 struct pci_attach_args *pa = aux; 175 pci_chipset_tag_t pc = pa->pa_pc; 176 pci_intr_handle_t ih; 177 int found = 0; 178 179 psc->psc_pc = pa->pa_pc; 180 sc->sc_dmat = pa->pa_dmat; 181 182 pci_set_powerstate(pa->pa_pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 183 184 sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 185 186 /* 187 * Map control/status registers. 188 */ 189#ifdef DC_USEIOSPACE 190 if (pci_mapreg_map(pa, DC_PCI_CFBIO, 191 PCI_MAPREG_TYPE_IO, 0, 192 &sc->dc_btag, &sc->dc_bhandle, NULL, &psc->psc_mapsize, 0)) { 193 printf(": can't map i/o space\n"); 194 return; 195 } 196#else 197 if (pci_mapreg_map(pa, DC_PCI_CFBMA, 198 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 199 &sc->dc_btag, &sc->dc_bhandle, NULL, &psc->psc_mapsize, 0)) { 200 printf(": can't map mem space\n"); 201 return; 202 } 203#endif 204 205 /* Allocate interrupt */ 206 if (pci_intr_map(pa, &ih)) { 207 printf(": couldn't map interrupt\n"); 208 goto fail_1; 209 } 210 intrstr = pci_intr_string(pc, ih); 211 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc, 212 self->dv_xname); 213 if (sc->sc_ih == NULL) { 214 printf(": couldn't establish interrupt"); 215 if (intrstr != NULL) 216 printf(" at %s", intrstr); 217 printf("\n"); 218 goto fail_1; 219 } 220 printf(": %s", intrstr); 221 222 /* Need this info to decide on a chip type. */ 223 sc->dc_revision = PCI_REVISION(pa->pa_class); 224 225 /* Get the eeprom width, if possible */ 226 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LITEON && 227 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC)) 228 ; /* PNIC has non-standard eeprom */ 229 else if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_XIRCOM && 230 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_XIRCOM_X3201_3_21143)) 231 ; /* XIRCOM has non-standard eeprom */ 232 else 233 dc_eeprom_width(sc); 234 235 switch (PCI_VENDOR(pa->pa_id)) { 236 case PCI_VENDOR_DEC: 237 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 || 238 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) { 239 found = 1; 240 sc->dc_type = DC_TYPE_21143; 241 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 242 sc->dc_flags |= DC_REDUCED_MII_POLL; 243 dc_read_srom(sc, sc->dc_romwidth); 244 } 245 break; 246 case PCI_VENDOR_INTEL: 247 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_21145) { 248 found = 1; 249 sc->dc_type = DC_TYPE_21145; 250 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 251 sc->dc_flags |= DC_REDUCED_MII_POLL; 252 dc_read_srom(sc, sc->dc_romwidth); 253 } 254 break; 255 case PCI_VENDOR_DAVICOM: 256 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 || 257 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102 || 258 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9009) { 259 found = 1; 260 sc->dc_type = DC_TYPE_DM9102; 261 sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; 262 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; 263 sc->dc_flags |= DC_TX_ALIGN; 264 sc->dc_pmode = DC_PMODE_MII; 265 266 /* Increase the latency timer value. */ 267 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT); 268 command &= 0xFFFF00FF; 269 command |= 0x00008000; 270 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command); 271 } 272 break; 273 case PCI_VENDOR_ADMTEK: 274 case PCI_VENDOR_3COM: 275 case PCI_VENDOR_MICROSOFT: 276 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) { 277 found = 1; 278 sc->dc_type = DC_TYPE_AL981; 279 sc->dc_flags |= DC_TX_USE_TX_INTR; 280 sc->dc_flags |= DC_TX_ADMTEK_WAR; 281 sc->dc_pmode = DC_PMODE_MII; 282 dc_read_srom(sc, sc->dc_romwidth); 283 } 284 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_ADM9511 || 285 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_ADM9513 || 286 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983 || 287 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3COM_3CSHO100BTX || 288 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MICROSOFT_MN130) { 289 found = 1; 290 sc->dc_type = DC_TYPE_AN983; 291 sc->dc_flags |= DC_TX_USE_TX_INTR; 292 sc->dc_flags |= DC_TX_ADMTEK_WAR; 293 sc->dc_flags |= DC_64BIT_HASH; 294 sc->dc_pmode = DC_PMODE_MII; 295 /* Don't read SROM for - auto-loaded on reset */ 296 } 297 break; 298 case PCI_VENDOR_MACRONIX: 299 case PCI_VENDOR_ACCTON: 300 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) { 301 found = 1; 302 sc->dc_type = DC_TYPE_AN983; 303 sc->dc_flags |= DC_TX_USE_TX_INTR; 304 sc->dc_flags |= DC_TX_ADMTEK_WAR; 305 sc->dc_flags |= DC_64BIT_HASH; 306 sc->dc_pmode = DC_PMODE_MII; 307 /* Don't read SROM for - auto-loaded on reset */ 308 } 309 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) { 310 found = 1; 311 if (sc->dc_revision < DC_REVISION_98713A) 312 sc->dc_type = DC_TYPE_98713; 313 if (sc->dc_revision >= DC_REVISION_98713A) { 314 sc->dc_type = DC_TYPE_98713A; 315 sc->dc_flags |= DC_21143_NWAY; 316 } 317 sc->dc_flags |= DC_REDUCED_MII_POLL; 318 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 319 } 320 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 || 321 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) { 322 found = 1; 323 if (sc->dc_revision >= DC_REVISION_98715AEC_C && 324 sc->dc_revision < DC_REVISION_98725) 325 sc->dc_flags |= DC_128BIT_HASH; 326 sc->dc_type = DC_TYPE_987x5; 327 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 328 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 329 } 330 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) { 331 found = 1; 332 sc->dc_type = DC_TYPE_987x5; 333 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 334 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 335 } 336 break; 337 case PCI_VENDOR_COMPEX: 338 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) { 339 found = 1; 340 if (sc->dc_revision < DC_REVISION_98713A) { 341 sc->dc_type = DC_TYPE_98713; 342 sc->dc_flags |= DC_REDUCED_MII_POLL; 343 } 344 if (sc->dc_revision >= DC_REVISION_98713A) 345 sc->dc_type = DC_TYPE_98713A; 346 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 347 } 348 break; 349 case PCI_VENDOR_LITEON: 350 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) { 351 found = 1; 352 sc->dc_type = DC_TYPE_PNICII; 353 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 354 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 355 sc->dc_flags |= DC_128BIT_HASH; 356 } 357 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) { 358 found = 1; 359 sc->dc_type = DC_TYPE_PNIC; 360 sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS; 361 sc->dc_flags |= DC_PNIC_RX_BUG_WAR; 362 sc->dc_pnic_rx_buf = malloc(ETHER_MAX_DIX_LEN * 5, 363 M_DEVBUF, M_NOWAIT); 364 if (sc->dc_pnic_rx_buf == NULL) 365 panic("dc_pci_attach"); 366 if (sc->dc_revision < DC_REVISION_82C169) 367 sc->dc_pmode = DC_PMODE_SYM; 368 } 369 break; 370 case PCI_VENDOR_ASIX: 371 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) { 372 found = 1; 373 sc->dc_type = DC_TYPE_ASIX; 374 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG; 375 sc->dc_flags |= DC_REDUCED_MII_POLL; 376 sc->dc_pmode = DC_PMODE_MII; 377 } 378 break; 379 case PCI_VENDOR_CONEXANT: 380 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CONEXANT_RS7112) { 381 found = 1; 382 sc->dc_type = DC_TYPE_CONEXANT; 383 sc->dc_flags |= DC_TX_INTR_ALWAYS; 384 sc->dc_flags |= DC_REDUCED_MII_POLL; 385 sc->dc_pmode = DC_PMODE_MII; 386 dc_read_srom(sc, sc->dc_romwidth); 387 } 388 break; 389 case PCI_VENDOR_XIRCOM: 390 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_XIRCOM_X3201_3_21143) { 391 found = 1; 392 sc->dc_type = DC_TYPE_XIRCOM; 393 sc->dc_flags |= DC_TX_INTR_ALWAYS; 394 sc->dc_flags |= DC_TX_COALESCE; 395 sc->dc_flags |= DC_TX_ALIGN; 396 sc->dc_pmode = DC_PMODE_MII; 397 } 398 break; 399 } 400 if (found == 0) { 401 /* This shouldn't happen if probe has done its job... */ 402 printf(": unknown device: %x:%x\n", 403 PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 404 goto fail_2; 405 } 406 407 /* Save the cache line size. */ 408 if (DC_IS_DAVICOM(sc)) 409 sc->dc_cachesize = 0; 410 else 411 sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag, 412 DC_PCI_CFLT) & 0xFF; 413 414 /* Reset the adapter. */ 415 dc_reset(sc); 416 417 /* Take 21143 out of snooze mode */ 418 if (DC_IS_INTEL(sc) || DC_IS_XIRCOM(sc)) { 419 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 420 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 421 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command); 422 } 423 424 /* 425 * If we discover later (in dc_attach) that we have an 426 * MII with no PHY, we need to have the 21143 drive the LEDs. 427 * Except there are some systems like the NEC VersaPro NoteBook PC 428 * which have no LEDs, and twiddling these bits has adverse effects 429 * on them. (I.e. you suddenly can't get a link.) 430 * 431 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS 432 * bit set, else we clear it. Since our dc(4) driver is split into 433 * bus-dependent and bus-independent parts, we must do set this bit 434 * here while we are able to do PCI configuration reads. 435 */ 436 if (DC_IS_INTEL(sc)) { 437 if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033) 438 sc->dc_flags |= DC_TULIP_LEDS; 439 } 440 441 /* 442 * Try to learn something about the supported media. 443 * We know that ASIX and ADMtek and Davicom devices 444 * will *always* be using MII media, so that's a no-brainer. 445 * The tricky ones are the Macronix/PNIC II and the 446 * Intel 21143. 447 */ 448 if (DC_IS_INTEL(sc)) 449 dc_parse_21143_srom(sc); 450 else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { 451 if (sc->dc_type == DC_TYPE_98713) 452 sc->dc_pmode = DC_PMODE_MII; 453 else 454 sc->dc_pmode = DC_PMODE_SYM; 455 } else if (!sc->dc_pmode) 456 sc->dc_pmode = DC_PMODE_MII; 457 458#ifdef __sparc64__ 459 { 460 extern void myetheraddr(u_char *); 461 462 if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address", 463 sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0) 464 myetheraddr(sc->sc_arpcom.ac_enaddr); 465 if (sc->sc_arpcom.ac_enaddr[0] == 0x00 && 466 sc->sc_arpcom.ac_enaddr[1] == 0x03 && 467 sc->sc_arpcom.ac_enaddr[2] == 0xcc) 468 sc->dc_flags |= DC_MOMENCO_BOTCH; 469 sc->sc_hasmac = 1; 470 } 471#endif 472 473#ifdef SRM_MEDIA 474 sc->dc_srm_media = 0; 475 476 /* Remember the SRM console media setting */ 477 if (DC_IS_INTEL(sc)) { 478 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 479 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 480 switch ((command >> 8) & 0xff) { 481 case 3: 482 sc->dc_srm_media = IFM_10_T; 483 break; 484 case 4: 485 sc->dc_srm_media = IFM_10_T | IFM_FDX; 486 break; 487 case 5: 488 sc->dc_srm_media = IFM_100_TX; 489 break; 490 case 6: 491 sc->dc_srm_media = IFM_100_TX | IFM_FDX; 492 break; 493 } 494 if (sc->dc_srm_media) 495 sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER; 496 } 497#endif 498 dc_attach(sc); 499 500 return; 501 502fail_2: 503 pci_intr_disestablish(pc, sc->sc_ih); 504 505fail_1: 506 bus_space_unmap(sc->dc_btag, sc->dc_bhandle, psc->psc_mapsize); 507} 508 509int 510dc_pci_detach(struct device *self, int flags) 511{ 512 struct dc_pci_softc *psc = (void *)self; 513 struct dc_softc *sc = &psc->psc_softc; 514 515 if (sc->sc_ih != NULL) 516 pci_intr_disestablish(psc->psc_pc, sc->sc_ih); 517 dc_detach(sc); 518 bus_space_unmap(sc->dc_btag, sc->dc_bhandle, psc->psc_mapsize); 519 520 return (0); 521} 522 523const struct cfattach dc_pci_ca = { 524 sizeof(struct dc_softc), dc_pci_match, dc_pci_attach, dc_pci_detach, 525 dc_activate 526}; 527