if_dc_pci.c revision 1.63
1/* $OpenBSD: if_dc_pci.c,v 1.63 2009/06/02 15:39:35 jsg Exp $ */ 2 3/* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/mbuf.h> 42#include <sys/protosw.h> 43#include <sys/socket.h> 44#include <sys/ioctl.h> 45#include <sys/errno.h> 46#include <sys/timeout.h> 47#include <sys/malloc.h> 48#include <sys/kernel.h> 49#include <sys/device.h> 50 51#include <net/if.h> 52#include <net/if_dl.h> 53#include <net/if_types.h> 54 55#ifdef INET 56#include <netinet/in.h> 57#include <netinet/in_systm.h> 58#include <netinet/in_var.h> 59#include <netinet/ip.h> 60#include <netinet/if_ether.h> 61#endif 62 63#include <net/if_media.h> 64 65#if NBPFILTER > 0 66#include <net/bpf.h> 67#endif 68 69#include <dev/mii/mii.h> 70#include <dev/mii/miivar.h> 71 72#include <dev/pci/pcireg.h> 73#include <dev/pci/pcivar.h> 74#include <dev/pci/pcidevs.h> 75 76#ifdef __sparc64__ 77#include <dev/ofw/openfirm.h> 78#endif 79 80#ifndef __hppa__ 81#define DC_USEIOSPACE 82#endif 83 84#include <dev/ic/dcreg.h> 85 86/* 87 * Various supported device vendors/types and their names. 88 */ 89struct dc_type dc_devs[] = { 90 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 }, 91 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 92 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9009 }, 93 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 }, 94 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 }, 95 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511 }, 96 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513 }, 97 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 }, 98 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 }, 99 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A }, 100 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 }, 101 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 }, 102 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 }, 103 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 }, 104 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC }, 105 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII }, 106 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 }, 107 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 108 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_RS7112 }, 109 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21145 }, 110 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSHO100BTX }, 111 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN130 }, 112 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143 }, 113 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985 }, 114 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500MX }, 115 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_PCM200 }, 116 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DRP32TXD }, 117 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCMPC200 }, 118 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCM200 }, 119 { PCI_VENDOR_HAWKING, PCI_PRODUCT_HAWKING_PN672TX }, 120 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN120 }, 121 { 0, 0 } 122}; 123 124int dc_pci_match(struct device *, void *, void *); 125void dc_pci_attach(struct device *, struct device *, void *); 126int dc_pci_detach(struct device *, int); 127void dc_pci_acpi(struct device *, void *); 128 129struct dc_pci_softc { 130 struct dc_softc psc_softc; 131 pci_chipset_tag_t psc_pc; 132 bus_size_t psc_mapsize; 133}; 134 135/* 136 * Probe for a 21143 or clone chip. Check the PCI vendor and device 137 * IDs against our list and return a device name if we find a match. 138 */ 139int 140dc_pci_match(struct device *parent, void *match, void *aux) 141{ 142 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 143 struct dc_type *t; 144 145 /* 146 * Support for the 21140 chip is experimental. If it works for you, 147 * that's great. By default, this chip will use de. 148 */ 149 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 150 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140) 151 return (1); 152 153 /* 154 * The following chip revision doesn't seem to work so well with dc, 155 * so let's have de handle it. (de will return a match of 2) 156 */ 157 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 158 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 && 159 PCI_REVISION(pa->pa_class) == 0x21) 160 return (1); 161 162 for (t = dc_devs; t->dc_vid != 0; t++) { 163 if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) && 164 (PCI_PRODUCT(pa->pa_id) == t->dc_did)) { 165 return (3); 166 } 167 } 168 169 return (0); 170} 171 172void 173dc_pci_acpi(struct device *self, void *aux) 174{ 175 struct dc_pci_softc *psc = (struct dc_pci_softc *)self; 176 struct dc_softc *sc = &psc->psc_softc; 177 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 178 pci_chipset_tag_t pc = pa->pa_pc; 179 u_int32_t r, cptr; 180 181 /* Find the location of the capabilities block */ 182 cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF; 183 184 r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF; 185 if (r == 0x01) { 186 187 r = pci_conf_read(pc, pa->pa_tag, cptr + PCI_PMCSR); 188 if (r & DC_PSTATE_D3) { 189 u_int32_t iobase, membase, irq; 190 191 /* Save important PCI config data. */ 192 iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO); 193 membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA); 194 irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT); 195 196 /* Reset the power state. */ 197 printf("%s: chip is in D%d power mode " 198 "-- setting to D0\n", sc->sc_dev.dv_xname, 199 r & DC_PSTATE_D3); 200 r &= 0xFFFFFFFC; 201 pci_conf_write(pc, pa->pa_tag, cptr + PCI_PMCSR, r); 202 203 /* Restore PCI config data. */ 204 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase); 205 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase); 206 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq); 207 } 208 } 209 return; 210} 211 212/* 213 * Attach the interface. Allocate softc structures, do ifmedia 214 * setup and ethernet/BPF attach. 215 */ 216void 217dc_pci_attach(struct device *parent, struct device *self, void *aux) 218{ 219 const char *intrstr = NULL; 220 pcireg_t command; 221 struct dc_pci_softc *psc = (struct dc_pci_softc *)self; 222 struct dc_softc *sc = &psc->psc_softc; 223 struct pci_attach_args *pa = aux; 224 pci_chipset_tag_t pc = pa->pa_pc; 225 pci_intr_handle_t ih; 226 int found = 0; 227 228 psc->psc_pc = pa->pa_pc; 229 sc->sc_dmat = pa->pa_dmat; 230 231 /* 232 * Handle power management nonsense. 233 */ 234 dc_pci_acpi(self, aux); 235 236 sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 237 238 /* 239 * Map control/status registers. 240 */ 241#ifdef DC_USEIOSPACE 242 if (pci_mapreg_map(pa, DC_PCI_CFBIO, 243 PCI_MAPREG_TYPE_IO, 0, 244 &sc->dc_btag, &sc->dc_bhandle, NULL, &psc->psc_mapsize, 0)) { 245 printf(": can't map i/o space\n"); 246 return; 247 } 248#else 249 if (pci_mapreg_map(pa, DC_PCI_CFBMA, 250 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 251 &sc->dc_btag, &sc->dc_bhandle, NULL, &psc->psc_mapsize, 0)) { 252 printf(": can't map mem space\n"); 253 return; 254 } 255#endif 256 257 /* Allocate interrupt */ 258 if (pci_intr_map(pa, &ih)) { 259 printf(": couldn't map interrupt\n"); 260 goto fail_1; 261 } 262 intrstr = pci_intr_string(pc, ih); 263 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc, 264 self->dv_xname); 265 if (sc->sc_ih == NULL) { 266 printf(": couldn't establish interrupt"); 267 if (intrstr != NULL) 268 printf(" at %s", intrstr); 269 printf("\n"); 270 goto fail_1; 271 } 272 printf(": %s", intrstr); 273 274 /* Need this info to decide on a chip type. */ 275 sc->dc_revision = PCI_REVISION(pa->pa_class); 276 277 /* Get the eeprom width, but PNIC has no eeprom */ 278 if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LITEON && 279 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC)) 280 dc_eeprom_width(sc); 281 282 switch (PCI_VENDOR(pa->pa_id)) { 283 case PCI_VENDOR_DEC: 284 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 || 285 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) { 286 found = 1; 287 sc->dc_type = DC_TYPE_21143; 288 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 289 sc->dc_flags |= DC_REDUCED_MII_POLL; 290 dc_read_srom(sc, sc->dc_romwidth); 291 } 292 break; 293 case PCI_VENDOR_INTEL: 294 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_21145) { 295 found = 1; 296 sc->dc_type = DC_TYPE_21145; 297 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 298 sc->dc_flags |= DC_REDUCED_MII_POLL; 299 dc_read_srom(sc, sc->dc_romwidth); 300 } 301 break; 302 case PCI_VENDOR_DAVICOM: 303 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 || 304 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102 || 305 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9009) { 306 found = 1; 307 sc->dc_type = DC_TYPE_DM9102; 308 sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; 309 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; 310 sc->dc_flags |= DC_TX_ALIGN; 311 sc->dc_pmode = DC_PMODE_MII; 312 313 /* Increase the latency timer value. */ 314 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT); 315 command &= 0xFFFF00FF; 316 command |= 0x00008000; 317 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command); 318 } 319 break; 320 case PCI_VENDOR_ADMTEK: 321 case PCI_VENDOR_3COM: 322 case PCI_VENDOR_MICROSOFT: 323 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) { 324 found = 1; 325 sc->dc_type = DC_TYPE_AL981; 326 sc->dc_flags |= DC_TX_USE_TX_INTR; 327 sc->dc_flags |= DC_TX_ADMTEK_WAR; 328 sc->dc_pmode = DC_PMODE_MII; 329 dc_read_srom(sc, sc->dc_romwidth); 330 } 331 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_ADM9511 || 332 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_ADM9513 || 333 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983 || 334 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3COM_3CSHO100BTX || 335 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MICROSOFT_MN130) { 336 found = 1; 337 sc->dc_type = DC_TYPE_AN983; 338 sc->dc_flags |= DC_TX_USE_TX_INTR; 339 sc->dc_flags |= DC_TX_ADMTEK_WAR; 340 sc->dc_flags |= DC_64BIT_HASH; 341 sc->dc_pmode = DC_PMODE_MII; 342 /* Don't read SROM for - auto-loaded on reset */ 343 } 344 break; 345 case PCI_VENDOR_MACRONIX: 346 case PCI_VENDOR_ACCTON: 347 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) { 348 found = 1; 349 sc->dc_type = DC_TYPE_AN983; 350 sc->dc_flags |= DC_TX_USE_TX_INTR; 351 sc->dc_flags |= DC_TX_ADMTEK_WAR; 352 sc->dc_flags |= DC_64BIT_HASH; 353 sc->dc_pmode = DC_PMODE_MII; 354 /* Don't read SROM for - auto-loaded on reset */ 355 } 356 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) { 357 found = 1; 358 if (sc->dc_revision < DC_REVISION_98713A) 359 sc->dc_type = DC_TYPE_98713; 360 if (sc->dc_revision >= DC_REVISION_98713A) { 361 sc->dc_type = DC_TYPE_98713A; 362 sc->dc_flags |= DC_21143_NWAY; 363 } 364 sc->dc_flags |= DC_REDUCED_MII_POLL; 365 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 366 } 367 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 || 368 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) { 369 found = 1; 370 if (sc->dc_revision >= DC_REVISION_98715AEC_C && 371 sc->dc_revision < DC_REVISION_98725) 372 sc->dc_flags |= DC_128BIT_HASH; 373 sc->dc_type = DC_TYPE_987x5; 374 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 375 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 376 } 377 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) { 378 found = 1; 379 sc->dc_type = DC_TYPE_987x5; 380 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 381 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 382 } 383 break; 384 case PCI_VENDOR_COMPEX: 385 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) { 386 found = 1; 387 if (sc->dc_revision < DC_REVISION_98713A) { 388 sc->dc_type = DC_TYPE_98713; 389 sc->dc_flags |= DC_REDUCED_MII_POLL; 390 } 391 if (sc->dc_revision >= DC_REVISION_98713A) 392 sc->dc_type = DC_TYPE_98713A; 393 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 394 } 395 break; 396 case PCI_VENDOR_LITEON: 397 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) { 398 found = 1; 399 sc->dc_type = DC_TYPE_PNICII; 400 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 401 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 402 sc->dc_flags |= DC_128BIT_HASH; 403 } 404 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) { 405 found = 1; 406 sc->dc_type = DC_TYPE_PNIC; 407 sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS; 408 sc->dc_flags |= DC_PNIC_RX_BUG_WAR; 409 sc->dc_pnic_rx_buf = malloc(ETHER_MAX_DIX_LEN * 5, M_DEVBUF, 410 M_NOWAIT); 411 if (sc->dc_pnic_rx_buf == NULL) 412 panic("dc_pci_attach"); 413 if (sc->dc_revision < DC_REVISION_82C169) 414 sc->dc_pmode = DC_PMODE_SYM; 415 } 416 break; 417 case PCI_VENDOR_ASIX: 418 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) { 419 found = 1; 420 sc->dc_type = DC_TYPE_ASIX; 421 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG; 422 sc->dc_flags |= DC_REDUCED_MII_POLL; 423 sc->dc_pmode = DC_PMODE_MII; 424 } 425 break; 426 case PCI_VENDOR_CONEXANT: 427 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CONEXANT_RS7112) { 428 found = 1; 429 sc->dc_type = DC_TYPE_CONEXANT; 430 sc->dc_flags |= DC_TX_INTR_ALWAYS; 431 sc->dc_flags |= DC_REDUCED_MII_POLL; 432 sc->dc_pmode = DC_PMODE_MII; 433 dc_read_srom(sc, sc->dc_romwidth); 434 } 435 break; 436 } 437 if (found == 0) { 438 /* This shouldn't happen if probe has done its job... */ 439 printf(": unknown device: %x:%x\n", 440 PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 441 goto fail_2; 442 } 443 444 /* Save the cache line size. */ 445 if (DC_IS_DAVICOM(sc)) 446 sc->dc_cachesize = 0; 447 else 448 sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag, 449 DC_PCI_CFLT) & 0xFF; 450 451 /* Reset the adapter. */ 452 dc_reset(sc); 453 454 /* Take 21143 out of snooze mode */ 455 if (DC_IS_INTEL(sc)) { 456 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 457 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 458 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command); 459 } 460 461 /* 462 * If we discover later (in dc_attach) that we have an 463 * MII with no PHY, we need to have the 21143 drive the LEDs. 464 * Except there are some systems like the NEC VersaPro NoteBook PC 465 * which have no LEDs, and twiddling these bits has adverse effects 466 * on them. (I.e. you suddenly can't get a link.) 467 * 468 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS 469 * bit set, else we clear it. Since our dc(4) driver is split into 470 * bus-dependent and bus-independent parts, we must do set this bit 471 * here while we are able to do PCI configuration reads. 472 */ 473 if (DC_IS_INTEL(sc)) { 474 if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033) 475 sc->dc_flags |= DC_TULIP_LEDS; 476 } 477 478 /* 479 * Try to learn something about the supported media. 480 * We know that ASIX and ADMtek and Davicom devices 481 * will *always* be using MII media, so that's a no-brainer. 482 * The tricky ones are the Macronix/PNIC II and the 483 * Intel 21143. 484 */ 485 if (DC_IS_INTEL(sc)) 486 dc_parse_21143_srom(sc); 487 else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { 488 if (sc->dc_type == DC_TYPE_98713) 489 sc->dc_pmode = DC_PMODE_MII; 490 else 491 sc->dc_pmode = DC_PMODE_SYM; 492 } else if (!sc->dc_pmode) 493 sc->dc_pmode = DC_PMODE_MII; 494 495#ifdef __sparc64__ 496 { 497 extern void myetheraddr(u_char *); 498 499 if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address", 500 sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0) 501 myetheraddr(sc->sc_arpcom.ac_enaddr); 502 if (sc->sc_arpcom.ac_enaddr[0] == 0x00 && 503 sc->sc_arpcom.ac_enaddr[1] == 0x03 && 504 sc->sc_arpcom.ac_enaddr[2] == 0xcc) 505 sc->dc_flags |= DC_MOMENCO_BOTCH; 506 sc->sc_hasmac = 1; 507 } 508#endif 509 510#ifdef SRM_MEDIA 511 sc->dc_srm_media = 0; 512 513 /* Remember the SRM console media setting */ 514 if (DC_IS_INTEL(sc)) { 515 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 516 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 517 switch ((command >> 8) & 0xff) { 518 case 3: 519 sc->dc_srm_media = IFM_10_T; 520 break; 521 case 4: 522 sc->dc_srm_media = IFM_10_T | IFM_FDX; 523 break; 524 case 5: 525 sc->dc_srm_media = IFM_100_TX; 526 break; 527 case 6: 528 sc->dc_srm_media = IFM_100_TX | IFM_FDX; 529 break; 530 } 531 if (sc->dc_srm_media) 532 sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER; 533 } 534#endif 535 dc_attach(sc); 536 537 return; 538 539fail_2: 540 pci_intr_disestablish(pc, sc->sc_ih); 541 542fail_1: 543 bus_space_unmap(sc->dc_btag, sc->dc_bhandle, psc->psc_mapsize); 544} 545 546int 547dc_pci_detach(struct device *self, int flags) 548{ 549 struct dc_pci_softc *psc = (void *)self; 550 struct dc_softc *sc = &psc->psc_softc; 551 int rv = 0; 552 553 rv = dc_detach(sc); 554 if (rv) 555 return (rv); 556 557 if (sc->sc_ih != NULL) 558 pci_intr_disestablish(psc->psc_pc, sc->sc_ih); 559 560 bus_space_unmap(sc->dc_btag, sc->dc_bhandle, psc->psc_mapsize); 561 562 return (rv); 563} 564 565struct cfattach dc_pci_ca = { 566 sizeof(struct dc_softc), dc_pci_match, dc_pci_attach, dc_pci_detach 567}; 568