if_dc_pci.c revision 1.53
1/* $OpenBSD: if_dc_pci.c,v 1.53 2006/06/17 18:00:43 brad Exp $ */ 2 3/* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/mbuf.h> 42#include <sys/protosw.h> 43#include <sys/socket.h> 44#include <sys/ioctl.h> 45#include <sys/errno.h> 46#include <sys/timeout.h> 47#include <sys/malloc.h> 48#include <sys/kernel.h> 49#include <sys/device.h> 50 51#include <net/if.h> 52#include <net/if_dl.h> 53#include <net/if_types.h> 54 55#ifdef INET 56#include <netinet/in.h> 57#include <netinet/in_systm.h> 58#include <netinet/in_var.h> 59#include <netinet/ip.h> 60#include <netinet/if_ether.h> 61#endif 62 63#include <net/if_media.h> 64 65#if NBPFILTER > 0 66#include <net/bpf.h> 67#endif 68 69#include <dev/mii/mii.h> 70#include <dev/mii/miivar.h> 71 72#include <dev/pci/pcireg.h> 73#include <dev/pci/pcivar.h> 74#include <dev/pci/pcidevs.h> 75 76#ifdef __sparc64__ 77#include <dev/ofw/openfirm.h> 78#endif 79 80#ifndef __hppa__ 81#define DC_USEIOSPACE 82#endif 83 84#include <dev/ic/dcreg.h> 85 86/* 87 * Various supported device vendors/types and their names. 88 */ 89struct dc_type dc_devs[] = { 90 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 }, 91 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 92 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9009 }, 93 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 }, 94 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 }, 95 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 }, 96 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 }, 97 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A }, 98 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 }, 99 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 }, 100 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 }, 101 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 }, 102 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC }, 103 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII }, 104 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 }, 105 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 106 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_RS7112 }, 107 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21145 }, 108 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSHO100BTX }, 109 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN130 }, 110 { 0, 0 } 111}; 112 113int dc_pci_match(struct device *, void *, void *); 114void dc_pci_attach(struct device *, struct device *, void *); 115void dc_pci_acpi(struct device *, void *); 116 117/* 118 * Probe for a 21143 or clone chip. Check the PCI vendor and device 119 * IDs against our list and return a device name if we find a match. 120 */ 121int 122dc_pci_match(parent, match, aux) 123 struct device *parent; 124 void *match, *aux; 125{ 126 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 127 struct dc_type *t; 128 129 /* 130 * Support for the 21140 chip is experimental. If it works for you, 131 * that's great. By default, this chip will use de. 132 */ 133 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 134 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140) 135 return (1); 136 137 /* 138 * The following chip revision doesn't seem to work so well with dc, 139 * so let's have de handle it. (de will return a match of 2) 140 */ 141 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 142 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 && 143 PCI_REVISION(pa->pa_class) == 0x21) 144 return (1); 145 146 /* 147 * Since dc doesn't fit on the alpha floppy, we want de to win by 148 * default on alpha so that RAMDISK* and GENERIC will use the same 149 * driver. 150 */ 151 for (t = dc_devs; t->dc_vid != 0; t++) { 152 if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) && 153 (PCI_PRODUCT(pa->pa_id) == t->dc_did)) { 154#ifdef __alpha__ 155 return (1); 156#else 157 return (3); 158#endif 159 } 160 } 161 162 return (0); 163} 164 165void dc_pci_acpi(self, aux) 166 struct device *self; 167 void *aux; 168{ 169 struct dc_softc *sc = (struct dc_softc *)self; 170 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 171 pci_chipset_tag_t pc = pa->pa_pc; 172 u_int32_t r, cptr; 173 174 /* Find the location of the capabilities block */ 175 cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF; 176 177 r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF; 178 if (r == 0x01) { 179 180 r = pci_conf_read(pc, pa->pa_tag, cptr + PCI_PMCSR); 181 if (r & DC_PSTATE_D3) { 182 u_int32_t iobase, membase, irq; 183 184 /* Save important PCI config data. */ 185 iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO); 186 membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA); 187 irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT); 188 189 /* Reset the power state. */ 190 printf("%s: chip is in D%d power mode " 191 "-- setting to D0\n", sc->sc_dev.dv_xname, 192 r & DC_PSTATE_D3); 193 r &= 0xFFFFFFFC; 194 pci_conf_write(pc, pa->pa_tag, cptr + PCI_PMCSR, r); 195 196 /* Restore PCI config data. */ 197 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase); 198 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase); 199 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq); 200 } 201 } 202 return; 203} 204 205/* 206 * Attach the interface. Allocate softc structures, do ifmedia 207 * setup and ethernet/BPF attach. 208 */ 209void dc_pci_attach(parent, self, aux) 210 struct device *parent, *self; 211 void *aux; 212{ 213 const char *intrstr = NULL; 214 pcireg_t command; 215 struct dc_softc *sc = (struct dc_softc *)self; 216 struct pci_attach_args *pa = aux; 217 pci_chipset_tag_t pc = pa->pa_pc; 218 pci_intr_handle_t ih; 219 bus_size_t size; 220 u_int32_t revision; 221 int found = 0; 222 223 sc->sc_dmat = pa->pa_dmat; 224 225 /* 226 * Handle power management nonsense. 227 */ 228 dc_pci_acpi(self, aux); 229 230 sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 231 232 /* 233 * Map control/status registers. 234 */ 235#ifdef DC_USEIOSPACE 236 if (pci_mapreg_map(pa, DC_PCI_CFBIO, 237 PCI_MAPREG_TYPE_IO, 0, 238 &sc->dc_btag, &sc->dc_bhandle, NULL, &size, 0)) { 239 printf(": can't map i/o space\n"); 240 return; 241 } 242#else 243 if (pci_mapreg_map(pa, DC_PCI_CFBMA, 244 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 245 &sc->dc_btag, &sc->dc_bhandle, NULL, &size, 0)) { 246 printf(": can't map mem space\n"); 247 return; 248 } 249#endif 250 251 /* Allocate interrupt */ 252 if (pci_intr_map(pa, &ih)) { 253 printf(": couldn't map interrupt\n"); 254 goto fail_1; 255 } 256 intrstr = pci_intr_string(pc, ih); 257 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc, 258 self->dv_xname); 259 if (sc->sc_ih == NULL) { 260 printf(": couldn't establish interrupt"); 261 if (intrstr != NULL) 262 printf(" at %s", intrstr); 263 printf("\n"); 264 goto fail_1; 265 } 266 printf(": %s,", intrstr); 267 268 /* Need this info to decide on a chip type. */ 269 sc->dc_revision = revision = PCI_REVISION(pa->pa_class); 270 271 /* Get the eeprom width, but PNIC has no eeprom */ 272 if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LITEON && 273 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC)) 274 dc_eeprom_width(sc); 275 276 switch (PCI_VENDOR(pa->pa_id)) { 277 case PCI_VENDOR_DEC: 278 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 || 279 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) { 280 found = 1; 281 sc->dc_type = DC_TYPE_21143; 282 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 283 sc->dc_flags |= DC_REDUCED_MII_POLL; 284 dc_read_srom(sc, sc->dc_romwidth); 285 } 286 break; 287 case PCI_VENDOR_INTEL: 288 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_21145) { 289 found = 1; 290 sc->dc_type = DC_TYPE_21145; 291 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 292 sc->dc_flags |= DC_REDUCED_MII_POLL; 293 dc_read_srom(sc, sc->dc_romwidth); 294 } 295 case PCI_VENDOR_DAVICOM: 296 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 || 297 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102 || 298 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9009) { 299 found = 1; 300 sc->dc_type = DC_TYPE_DM9102; 301 sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; 302 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; 303 sc->dc_flags |= DC_TX_ALIGN; 304 sc->dc_pmode = DC_PMODE_MII; 305 306 /* Increase the latency timer value. */ 307 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT); 308 command &= 0xFFFF00FF; 309 command |= 0x00008000; 310 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command); 311 } 312 break; 313 case PCI_VENDOR_ADMTEK: 314 case PCI_VENDOR_3COM: 315 case PCI_VENDOR_MICROSOFT: 316 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) { 317 found = 1; 318 sc->dc_type = DC_TYPE_AL981; 319 sc->dc_flags |= DC_TX_USE_TX_INTR; 320 sc->dc_flags |= DC_TX_ADMTEK_WAR; 321 sc->dc_pmode = DC_PMODE_MII; 322 dc_read_srom(sc, sc->dc_romwidth); 323 } 324 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983 || 325 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3COM_3CSHO100BTX || 326 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MICROSOFT_MN130) { 327 found = 1; 328 sc->dc_type = DC_TYPE_AN983; 329 sc->dc_flags |= DC_TX_USE_TX_INTR; 330 sc->dc_flags |= DC_TX_ADMTEK_WAR; 331 sc->dc_flags |= DC_64BIT_HASH; 332 sc->dc_pmode = DC_PMODE_MII; 333 /* Don't read SROM for - auto-loaded on reset */ 334 } 335 break; 336 case PCI_VENDOR_MACRONIX: 337 case PCI_VENDOR_ACCTON: 338 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) { 339 found = 1; 340 sc->dc_type = DC_TYPE_AN983; 341 sc->dc_flags |= DC_TX_USE_TX_INTR; 342 sc->dc_flags |= DC_TX_ADMTEK_WAR; 343 sc->dc_flags |= DC_64BIT_HASH; 344 sc->dc_pmode = DC_PMODE_MII; 345 /* Don't read SROM for - auto-loaded on reset */ 346 } 347 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) { 348 found = 1; 349 if (revision < DC_REVISION_98713A) { 350 sc->dc_type = DC_TYPE_98713; 351 } 352 if (revision >= DC_REVISION_98713A) { 353 sc->dc_type = DC_TYPE_98713A; 354 sc->dc_flags |= DC_21143_NWAY; 355 } 356 sc->dc_flags |= DC_REDUCED_MII_POLL; 357 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 358 } 359 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 || 360 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) { 361 found = 1; 362 if (revision >= DC_REVISION_98715AEC_C && 363 revision < DC_REVISION_98725) 364 sc->dc_flags |= DC_128BIT_HASH; 365 sc->dc_type = DC_TYPE_987x5; 366 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 367 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 368 } 369 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) { 370 found = 1; 371 sc->dc_type = DC_TYPE_987x5; 372 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 373 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 374 } 375 break; 376 case PCI_VENDOR_COMPEX: 377 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) { 378 found = 1; 379 if (revision < DC_REVISION_98713A) { 380 sc->dc_type = DC_TYPE_98713; 381 sc->dc_flags |= DC_REDUCED_MII_POLL; 382 } 383 if (revision >= DC_REVISION_98713A) 384 sc->dc_type = DC_TYPE_98713A; 385 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 386 } 387 break; 388 case PCI_VENDOR_LITEON: 389 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) { 390 found = 1; 391 sc->dc_type = DC_TYPE_PNICII; 392 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 393 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 394 sc->dc_flags |= DC_128BIT_HASH; 395 } 396 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) { 397 found = 1; 398 sc->dc_type = DC_TYPE_PNIC; 399 sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS; 400 sc->dc_flags |= DC_PNIC_RX_BUG_WAR; 401 sc->dc_pnic_rx_buf = malloc(ETHER_MAX_DIX_LEN * 5, M_DEVBUF, 402 M_NOWAIT); 403 if (sc->dc_pnic_rx_buf == NULL) 404 panic("dc_pci_attach"); 405 if (revision < DC_REVISION_82C169) 406 sc->dc_pmode = DC_PMODE_SYM; 407 } 408 break; 409 case PCI_VENDOR_ASIX: 410 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) { 411 found = 1; 412 sc->dc_type = DC_TYPE_ASIX; 413 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG; 414 sc->dc_flags |= DC_REDUCED_MII_POLL; 415 sc->dc_pmode = DC_PMODE_MII; 416 } 417 break; 418 case PCI_VENDOR_CONEXANT: 419 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CONEXANT_RS7112) { 420 found = 1; 421 sc->dc_type = DC_TYPE_CONEXANT; 422 sc->dc_flags |= DC_TX_INTR_ALWAYS; 423 sc->dc_flags |= DC_REDUCED_MII_POLL; 424 sc->dc_pmode = DC_PMODE_MII; 425 dc_read_srom(sc, sc->dc_romwidth); 426 } 427 break; 428 } 429 if (found == 0) { 430 /* This shouldn't happen if probe has done it's job... */ 431 printf(": unknown device: %x:%x\n", 432 PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 433 goto fail_2; 434 } 435 436 /* Save the cache line size. */ 437 if (DC_IS_DAVICOM(sc)) 438 sc->dc_cachesize = 0; 439 else 440 sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag, 441 DC_PCI_CFLT) & 0xFF; 442 443 /* Reset the adapter. */ 444 dc_reset(sc); 445 446 /* Take 21143 out of snooze mode */ 447 if (DC_IS_INTEL(sc)) { 448 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 449 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 450 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command); 451 } 452 453 /* 454 * If we discover later (in dc_attach) that we have an 455 * MII with no PHY, we need to have the 21143 drive the LEDs. 456 * Except there are some systems like the NEC VersaPro NoteBook PC 457 * which have no LEDs, and twiddling these bits has adverse effects 458 * on them. (I.e. you suddenly can't get a link.) 459 * 460 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS 461 * bit set, else we clear it. Since our dc(4) driver is split into 462 * bus-dependent and bus-independent parts, we must do set this bit 463 * here while we are able to do PCI configuration reads. 464 */ 465 if (DC_IS_INTEL(sc)) { 466 if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033) 467 sc->dc_flags |= DC_TULIP_LEDS; 468 } 469 470 /* 471 * Try to learn something about the supported media. 472 * We know that ASIX and ADMtek and Davicom devices 473 * will *always* be using MII media, so that's a no-brainer. 474 * The tricky ones are the Macronix/PNIC II and the 475 * Intel 21143. 476 */ 477 if (DC_IS_INTEL(sc)) 478 dc_parse_21143_srom(sc); 479 else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { 480 if (sc->dc_type == DC_TYPE_98713) 481 sc->dc_pmode = DC_PMODE_MII; 482 else 483 sc->dc_pmode = DC_PMODE_SYM; 484 } else if (!sc->dc_pmode) 485 sc->dc_pmode = DC_PMODE_MII; 486 487#ifdef __sparc64__ 488 { 489 extern void myetheraddr(u_char *); 490 491 if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address", 492 sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0) 493 myetheraddr(sc->sc_arpcom.ac_enaddr); 494 if (sc->sc_arpcom.ac_enaddr[0] == 0x00 && 495 sc->sc_arpcom.ac_enaddr[1] == 0x03 && 496 sc->sc_arpcom.ac_enaddr[2] == 0xcc) 497 sc->dc_flags |= DC_MOMENCO_BOTCH; 498 sc->sc_hasmac = 1; 499 } 500#endif 501 502#ifdef SRM_MEDIA 503 sc->dc_srm_media = 0; 504 505 /* Remember the SRM console media setting */ 506 if (DC_IS_INTEL(sc)) { 507 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 508 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 509 switch ((command >> 8) & 0xff) { 510 case 3: 511 sc->dc_srm_media = IFM_10_T; 512 break; 513 case 4: 514 sc->dc_srm_media = IFM_10_T | IFM_FDX; 515 break; 516 case 5: 517 sc->dc_srm_media = IFM_100_TX; 518 break; 519 case 6: 520 sc->dc_srm_media = IFM_100_TX | IFM_FDX; 521 break; 522 } 523 if (sc->dc_srm_media) 524 sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER; 525 } 526#endif 527 dc_attach(sc); 528 529 return; 530 531fail_2: 532 pci_intr_disestablish(pc, sc->sc_ih); 533 534fail_1: 535 bus_space_unmap(sc->dc_btag, sc->dc_bhandle, size); 536} 537 538struct cfattach dc_pci_ca = { 539 sizeof(struct dc_softc), dc_pci_match, dc_pci_attach 540}; 541