if_dc_pci.c revision 1.50
1/* $OpenBSD: if_dc_pci.c,v 1.50 2005/03/26 15:49:09 mickey Exp $ */ 2 3/* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/mbuf.h> 42#include <sys/protosw.h> 43#include <sys/socket.h> 44#include <sys/ioctl.h> 45#include <sys/errno.h> 46#include <sys/malloc.h> 47#include <sys/kernel.h> 48#include <sys/device.h> 49 50#include <net/if.h> 51#include <net/if_dl.h> 52#include <net/if_types.h> 53 54#ifdef INET 55#include <netinet/in.h> 56#include <netinet/in_systm.h> 57#include <netinet/in_var.h> 58#include <netinet/ip.h> 59#include <netinet/if_ether.h> 60#endif 61 62#include <net/if_media.h> 63 64#if NBPFILTER > 0 65#include <net/bpf.h> 66#endif 67 68#include <dev/mii/mii.h> 69#include <dev/mii/miivar.h> 70 71#include <dev/pci/pcireg.h> 72#include <dev/pci/pcivar.h> 73#include <dev/pci/pcidevs.h> 74 75#ifdef __sparc64__ 76#include <dev/ofw/openfirm.h> 77#endif 78 79#ifndef __hppa__ 80#define DC_USEIOSPACE 81#endif 82 83#include <dev/ic/dcreg.h> 84 85/* 86 * Various supported device vendors/types and their names. 87 */ 88struct dc_type dc_devs[] = { 89 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 }, 90 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 91 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9009 }, 92 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 }, 93 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 }, 94 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 }, 95 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 }, 96 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A }, 97 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 }, 98 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 }, 99 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 }, 100 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 }, 101 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC }, 102 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII }, 103 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 }, 104 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 105 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_RS7112 }, 106 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21145 }, 107 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSHO100BTX }, 108 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN130 }, 109 { 0, 0 } 110}; 111 112int dc_pci_match(struct device *, void *, void *); 113void dc_pci_attach(struct device *, struct device *, void *); 114void dc_pci_acpi(struct device *, void *); 115 116/* 117 * Probe for a 21143 or clone chip. Check the PCI vendor and device 118 * IDs against our list and return a device name if we find a match. 119 */ 120int 121dc_pci_match(parent, match, aux) 122 struct device *parent; 123 void *match, *aux; 124{ 125 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 126 struct dc_type *t; 127 128 /* 129 * Support for the 21140 chip is experimental. If it works for you, 130 * that's great. By default, this chip will use de. 131 */ 132 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 133 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140) 134 return (1); 135 136 /* 137 * The following chip revision doesn't seem to work so well with dc, 138 * so let's have de handle it. (de will return a match of 2) 139 */ 140 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 141 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 && 142 PCI_REVISION(pa->pa_class) == 0x21) 143 return (1); 144 145 /* 146 * Since dc doesn't fit on the alpha floppy, we want de to win by 147 * default on alpha so that RAMDISK* and GENERIC will use the same 148 * driver. 149 */ 150 for (t = dc_devs; t->dc_vid != 0; t++) { 151 if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) && 152 (PCI_PRODUCT(pa->pa_id) == t->dc_did)) { 153#ifdef __alpha__ 154 return (1); 155#else 156 return (3); 157#endif 158 } 159 } 160 161 return (0); 162} 163 164void dc_pci_acpi(self, aux) 165 struct device *self; 166 void *aux; 167{ 168 struct dc_softc *sc = (struct dc_softc *)self; 169 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 170 pci_chipset_tag_t pc = pa->pa_pc; 171 u_int32_t r, cptr; 172 173 /* Find the location of the capabilities block */ 174 cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF; 175 176 r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF; 177 if (r == 0x01) { 178 179 r = pci_conf_read(pc, pa->pa_tag, cptr + PCI_PMCSR); 180 if (r & DC_PSTATE_D3) { 181 u_int32_t iobase, membase, irq; 182 183 /* Save important PCI config data. */ 184 iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO); 185 membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA); 186 irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT); 187 188 /* Reset the power state. */ 189 printf("%s: chip is in D%d power mode " 190 "-- setting to D0\n", sc->sc_dev.dv_xname, 191 r & DC_PSTATE_D3); 192 r &= 0xFFFFFFFC; 193 pci_conf_write(pc, pa->pa_tag, cptr + PCI_PMCSR, r); 194 195 /* Restore PCI config data. */ 196 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase); 197 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase); 198 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq); 199 } 200 } 201 return; 202} 203 204/* 205 * Attach the interface. Allocate softc structures, do ifmedia 206 * setup and ethernet/BPF attach. 207 */ 208void dc_pci_attach(parent, self, aux) 209 struct device *parent, *self; 210 void *aux; 211{ 212 int s; 213 const char *intrstr = NULL; 214 u_int32_t command; 215 struct dc_softc *sc = (struct dc_softc *)self; 216 struct pci_attach_args *pa = aux; 217 pci_chipset_tag_t pc = pa->pa_pc; 218 pci_intr_handle_t ih; 219 bus_size_t iosize; 220 u_int32_t revision; 221 int found = 0; 222 223 s = splimp(); 224 sc->sc_dmat = pa->pa_dmat; 225 226 /* 227 * Handle power management nonsense. 228 */ 229 dc_pci_acpi(self, aux); 230 231 /* 232 * Map control/status registers. 233 */ 234 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 235 command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 236 PCI_COMMAND_MASTER_ENABLE; 237 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 238 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 239 240 sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 241 242#ifdef DC_USEIOSPACE 243 if (pci_mapreg_map(pa, DC_PCI_CFBIO, PCI_MAPREG_TYPE_IO, 0, 244 &sc->dc_btag, &sc->dc_bhandle, NULL, &iosize, 0)) { 245 printf(": can't map i/o space\n"); 246 return; 247 } 248#else 249 if (pci_mapreg_map(pa, DC_PCI_CFBMA, PCI_MAPREG_TYPE_MEM, 0, 250 &sc->dc_btag, &sc->dc_bhandle, NULL, &iosize, 0)) { 251 printf(": can't map mem space\n"); 252 return; 253 } 254#endif 255 256 /* Allocate interrupt */ 257 if (pci_intr_map(pa, &ih)) { 258 printf(": couldn't map interrupt\n"); 259 goto fail; 260 } 261 intrstr = pci_intr_string(pc, ih); 262 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc, 263 self->dv_xname); 264 if (sc->sc_ih == NULL) { 265 printf(": couldn't establish interrupt"); 266 if (intrstr != NULL) 267 printf(" at %s", intrstr); 268 printf("\n"); 269 goto fail; 270 } 271 printf(": %s,", intrstr); 272 273 /* Need this info to decide on a chip type. */ 274 sc->dc_revision = revision = PCI_REVISION(pa->pa_class); 275 276 /* Get the eeprom width, but PNIC has no eeprom */ 277 if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LITEON && 278 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC)) 279 dc_eeprom_width(sc); 280 281 switch (PCI_VENDOR(pa->pa_id)) { 282 case PCI_VENDOR_DEC: 283 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 || 284 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) { 285 found = 1; 286 sc->dc_type = DC_TYPE_21143; 287 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 288 sc->dc_flags |= DC_REDUCED_MII_POLL; 289 dc_read_srom(sc, sc->dc_romwidth); 290 } 291 break; 292 case PCI_VENDOR_INTEL: 293 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_21145) { 294 found = 1; 295 sc->dc_type = DC_TYPE_21145; 296 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 297 sc->dc_flags |= DC_REDUCED_MII_POLL; 298 dc_read_srom(sc, sc->dc_romwidth); 299 } 300 case PCI_VENDOR_DAVICOM: 301 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 || 302 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102 || 303 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9009) { 304 found = 1; 305 sc->dc_type = DC_TYPE_DM9102; 306 sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; 307 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; 308 sc->dc_flags |= DC_TX_ALIGN; 309 sc->dc_pmode = DC_PMODE_MII; 310 311 /* Increase the latency timer value. */ 312 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT); 313 command &= 0xFFFF00FF; 314 command |= 0x00008000; 315 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command); 316 } 317 break; 318 case PCI_VENDOR_ADMTEK: 319 case PCI_VENDOR_3COM: 320 case PCI_VENDOR_MICROSOFT: 321 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) { 322 found = 1; 323 sc->dc_type = DC_TYPE_AL981; 324 sc->dc_flags |= DC_TX_USE_TX_INTR; 325 sc->dc_flags |= DC_TX_ADMTEK_WAR; 326 sc->dc_pmode = DC_PMODE_MII; 327 dc_read_srom(sc, sc->dc_romwidth); 328 } 329 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983 || 330 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3COM_3CSHO100BTX || 331 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MICROSOFT_MN130) { 332 found = 1; 333 sc->dc_type = DC_TYPE_AN983; 334 sc->dc_flags |= DC_TX_USE_TX_INTR; 335 sc->dc_flags |= DC_TX_ADMTEK_WAR; 336 sc->dc_flags |= DC_64BIT_HASH; 337 sc->dc_pmode = DC_PMODE_MII; 338 /* Don't read SROM for - auto-loaded on reset */ 339 } 340 break; 341 case PCI_VENDOR_MACRONIX: 342 case PCI_VENDOR_ACCTON: 343 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) { 344 found = 1; 345 sc->dc_type = DC_TYPE_AN983; 346 sc->dc_flags |= DC_TX_USE_TX_INTR; 347 sc->dc_flags |= DC_TX_ADMTEK_WAR; 348 sc->dc_flags |= DC_64BIT_HASH; 349 sc->dc_pmode = DC_PMODE_MII; 350 /* Don't read SROM for - auto-loaded on reset */ 351 } 352 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) { 353 found = 1; 354 if (revision < DC_REVISION_98713A) { 355 sc->dc_type = DC_TYPE_98713; 356 } 357 if (revision >= DC_REVISION_98713A) { 358 sc->dc_type = DC_TYPE_98713A; 359 sc->dc_flags |= DC_21143_NWAY; 360 } 361 sc->dc_flags |= DC_REDUCED_MII_POLL; 362 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 363 } 364 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 || 365 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) { 366 found = 1; 367 if (revision >= DC_REVISION_98715AEC_C && 368 revision < DC_REVISION_98725) 369 sc->dc_flags |= DC_128BIT_HASH; 370 sc->dc_type = DC_TYPE_987x5; 371 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 372 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 373 } 374 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) { 375 found = 1; 376 sc->dc_type = DC_TYPE_987x5; 377 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 378 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 379 } 380 break; 381 case PCI_VENDOR_COMPEX: 382 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) { 383 found = 1; 384 if (revision < DC_REVISION_98713A) { 385 sc->dc_type = DC_TYPE_98713; 386 sc->dc_flags |= DC_REDUCED_MII_POLL; 387 } 388 if (revision >= DC_REVISION_98713A) 389 sc->dc_type = DC_TYPE_98713A; 390 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 391 } 392 break; 393 case PCI_VENDOR_LITEON: 394 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) { 395 found = 1; 396 sc->dc_type = DC_TYPE_PNICII; 397 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 398 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 399 sc->dc_flags |= DC_128BIT_HASH; 400 } 401 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) { 402 found = 1; 403 sc->dc_type = DC_TYPE_PNIC; 404 sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS; 405 sc->dc_flags |= DC_PNIC_RX_BUG_WAR; 406 sc->dc_pnic_rx_buf = malloc(ETHER_MAX_DIX_LEN * 5, M_DEVBUF, 407 M_NOWAIT); 408 if (sc->dc_pnic_rx_buf == NULL) 409 panic("dc_pci_attach"); 410 if (revision < DC_REVISION_82C169) 411 sc->dc_pmode = DC_PMODE_SYM; 412 } 413 break; 414 case PCI_VENDOR_ASIX: 415 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) { 416 found = 1; 417 sc->dc_type = DC_TYPE_ASIX; 418 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG; 419 sc->dc_flags |= DC_REDUCED_MII_POLL; 420 sc->dc_pmode = DC_PMODE_MII; 421 } 422 break; 423 case PCI_VENDOR_CONEXANT: 424 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CONEXANT_RS7112) { 425 found = 1; 426 sc->dc_type = DC_TYPE_CONEXANT; 427 sc->dc_flags |= DC_TX_INTR_ALWAYS; 428 sc->dc_flags |= DC_REDUCED_MII_POLL; 429 sc->dc_pmode = DC_PMODE_MII; 430 dc_read_srom(sc, sc->dc_romwidth); 431 } 432 break; 433 } 434 if (found == 0) { 435 /* This shouldn't happen if probe has done it's job... */ 436 printf(": unknown device: %x:%x\n", 437 PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 438 goto fail; 439 } 440 441 /* Save the cache line size. */ 442 if (DC_IS_DAVICOM(sc)) 443 sc->dc_cachesize = 0; 444 else 445 sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag, 446 DC_PCI_CFLT) & 0xFF; 447 448 /* Reset the adapter. */ 449 dc_reset(sc); 450 451 /* Take 21143 out of snooze mode */ 452 if (DC_IS_INTEL(sc)) { 453 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 454 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 455 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command); 456 } 457 458 /* 459 * If we discover later (in dc_attach) that we have an 460 * MII with no PHY, we need to have the 21143 drive the LEDs. 461 * Except there are some systems like the NEC VersaPro NoteBook PC 462 * which have no LEDs, and twiddling these bits has adverse effects 463 * on them. (I.e. you suddenly can't get a link.) 464 * 465 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS 466 * bit set, else we clear it. Since our dc(4) driver is split into 467 * bus-dependent and bus-independent parts, we must do set this bit 468 * here while we are able to do PCI configuration reads. 469 */ 470 if (DC_IS_INTEL(sc)) { 471 if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033) 472 sc->dc_flags |= DC_TULIP_LEDS; 473 } 474 475 /* 476 * Try to learn something about the supported media. 477 * We know that ASIX and ADMtek and Davicom devices 478 * will *always* be using MII media, so that's a no-brainer. 479 * The tricky ones are the Macronix/PNIC II and the 480 * Intel 21143. 481 */ 482 if (DC_IS_INTEL(sc)) 483 dc_parse_21143_srom(sc); 484 else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { 485 if (sc->dc_type == DC_TYPE_98713) 486 sc->dc_pmode = DC_PMODE_MII; 487 else 488 sc->dc_pmode = DC_PMODE_SYM; 489 } else if (!sc->dc_pmode) 490 sc->dc_pmode = DC_PMODE_MII; 491 492#ifdef __sparc64__ 493 { 494 extern void myetheraddr(u_char *); 495 496 if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address", 497 sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0) 498 myetheraddr(sc->sc_arpcom.ac_enaddr); 499 if (sc->sc_arpcom.ac_enaddr[0] == 0x00 && 500 sc->sc_arpcom.ac_enaddr[1] == 0x03 && 501 sc->sc_arpcom.ac_enaddr[2] == 0xcc) 502 sc->dc_flags |= DC_MOMENCO_BOTCH; 503 sc->sc_hasmac = 1; 504 } 505#endif 506 507#ifdef SRM_MEDIA 508 sc->dc_srm_media = 0; 509 510 /* Remember the SRM console media setting */ 511 if (DC_IS_INTEL(sc)) { 512 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 513 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 514 switch ((command >> 8) & 0xff) { 515 case 3: 516 sc->dc_srm_media = IFM_10_T; 517 break; 518 case 4: 519 sc->dc_srm_media = IFM_10_T | IFM_FDX; 520 break; 521 case 5: 522 sc->dc_srm_media = IFM_100_TX; 523 break; 524 case 6: 525 sc->dc_srm_media = IFM_100_TX | IFM_FDX; 526 break; 527 } 528 if (sc->dc_srm_media) 529 sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER; 530 } 531#endif 532 dc_attach(sc); 533 534fail: 535 splx(s); 536} 537 538struct cfattach dc_pci_ca = { 539 sizeof(struct dc_softc), dc_pci_match, dc_pci_attach 540}; 541