if_dc_pci.c revision 1.44
1/* $OpenBSD: if_dc_pci.c,v 1.44 2004/08/04 15:02:29 mickey Exp $ */ 2 3/* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/mbuf.h> 42#include <sys/protosw.h> 43#include <sys/socket.h> 44#include <sys/ioctl.h> 45#include <sys/errno.h> 46#include <sys/malloc.h> 47#include <sys/kernel.h> 48#include <sys/device.h> 49 50#include <net/if.h> 51#include <net/if_dl.h> 52#include <net/if_types.h> 53 54#ifdef INET 55#include <netinet/in.h> 56#include <netinet/in_systm.h> 57#include <netinet/in_var.h> 58#include <netinet/ip.h> 59#include <netinet/if_ether.h> 60#endif 61 62#include <net/if_media.h> 63 64#if NBPFILTER > 0 65#include <net/bpf.h> 66#endif 67 68#include <dev/mii/mii.h> 69#include <dev/mii/miivar.h> 70 71#include <dev/pci/pcireg.h> 72#include <dev/pci/pcivar.h> 73#include <dev/pci/pcidevs.h> 74 75#ifdef __sparc64__ 76#include <dev/ofw/openfirm.h> 77#endif 78 79#ifndef __hppa__ 80#define DC_USEIOSPACE 81#endif 82 83#include <dev/ic/dcreg.h> 84 85/* 86 * Various supported device vendors/types and their names. 87 */ 88struct dc_type dc_devs[] = { 89 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 }, 90 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 91 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9009 }, 92 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 }, 93 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 }, 94 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 }, 95 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 }, 96 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A }, 97 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 }, 98 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 }, 99 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 }, 100 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 }, 101 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC }, 102 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII }, 103 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 }, 104 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 105 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_RS7112 }, 106 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21145 }, 107 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSHO100BTX }, 108 { 0, 0 } 109}; 110 111int dc_pci_match(struct device *, void *, void *); 112void dc_pci_attach(struct device *, struct device *, void *); 113void dc_pci_acpi(struct device *, void *); 114 115/* 116 * Probe for a 21143 or clone chip. Check the PCI vendor and device 117 * IDs against our list and return a device name if we find a match. 118 */ 119int 120dc_pci_match(parent, match, aux) 121 struct device *parent; 122 void *match, *aux; 123{ 124 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 125 struct dc_type *t; 126 127 /* 128 * Support for the 21140 chip is experimental. If it works for you, 129 * that's great. By default, this chip will use de. 130 */ 131 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 132 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140) 133 return (1); 134 135 /* 136 * The following chip revision doesn't seem to work so well with dc, 137 * so let's have de handle it. (de will return a match of 2) 138 */ 139 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 140 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 && 141 PCI_REVISION(pa->pa_class) == 0x21) 142 return (1); 143 144 /* 145 * Since dc doesn't fit on the alpha floppy, we want de to win by 146 * default on alpha so that RAMDISK* and GENERIC will use the same 147 * driver. 148 */ 149 for (t = dc_devs; t->dc_vid != 0; t++) { 150 if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) && 151 (PCI_PRODUCT(pa->pa_id) == t->dc_did)) { 152#ifdef __alpha__ 153 return (1); 154#else 155 return (3); 156#endif 157 } 158 } 159 160 return (0); 161} 162 163void dc_pci_acpi(self, aux) 164 struct device *self; 165 void *aux; 166{ 167 struct dc_softc *sc = (struct dc_softc *)self; 168 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 169 pci_chipset_tag_t pc = pa->pa_pc; 170 u_int32_t r, cptr; 171 172 /* Find the location of the capabilities block */ 173 cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF; 174 175 r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF; 176 if (r == 0x01) { 177 178 r = pci_conf_read(pc, pa->pa_tag, cptr + PCI_PMCSR); 179 if (r & DC_PSTATE_D3) { 180 u_int32_t iobase, membase, irq; 181 182 /* Save important PCI config data. */ 183 iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO); 184 membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA); 185 irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT); 186 187 /* Reset the power state. */ 188 printf("%s: chip is in D%d power mode " 189 "-- setting to D0\n", sc->sc_dev.dv_xname, 190 r & DC_PSTATE_D3); 191 r &= 0xFFFFFFFC; 192 pci_conf_write(pc, pa->pa_tag, cptr + PCI_PMCSR, r); 193 194 /* Restore PCI config data. */ 195 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase); 196 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase); 197 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq); 198 } 199 } 200 return; 201} 202 203/* 204 * Attach the interface. Allocate softc structures, do ifmedia 205 * setup and ethernet/BPF attach. 206 */ 207void dc_pci_attach(parent, self, aux) 208 struct device *parent, *self; 209 void *aux; 210{ 211 int s; 212 const char *intrstr = NULL; 213 u_int32_t command; 214 struct dc_softc *sc = (struct dc_softc *)self; 215 struct pci_attach_args *pa = aux; 216 pci_chipset_tag_t pc = pa->pa_pc; 217 pci_intr_handle_t ih; 218 bus_addr_t iobase; 219 bus_size_t iosize; 220 u_int32_t revision; 221 int found = 0; 222 223 s = splimp(); 224 sc->sc_dmat = pa->pa_dmat; 225 226 /* 227 * Handle power management nonsense. 228 */ 229 dc_pci_acpi(self, aux); 230 231 /* 232 * Map control/status registers. 233 */ 234 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 235 command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 236 PCI_COMMAND_MASTER_ENABLE; 237 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 238 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 239 240 sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 241 242#ifdef DC_USEIOSPACE 243 if (!(command & PCI_COMMAND_IO_ENABLE)) { 244 printf(": failed to enable I/O ports\n"); 245 goto fail; 246 } 247 if (pci_io_find(pc, pa->pa_tag, DC_PCI_CFBIO, &iobase, &iosize)) { 248 printf(": can't find I/O space\n"); 249 goto fail; 250 } 251 if (bus_space_map(pa->pa_iot, iobase, iosize, 0, &sc->dc_bhandle)) { 252 printf(": can't map I/O space\n"); 253 goto fail; 254 } 255 sc->dc_btag = pa->pa_iot; 256#else 257 if (!(command & PCI_COMMAND_MEM_ENABLE)) { 258 printf(": failed to enable memory mapping\n"); 259 goto fail; 260 } 261 if (pci_mem_find(pc, pa->pa_tag, DC_PCI_CFBMA, &iobase, &iosize, NULL)){ 262 printf(": can't find mem space\n"); 263 goto fail; 264 } 265 if (bus_space_map(pa->pa_memt, iobase, iosize, 0, &sc->dc_bhandle)) { 266 printf(": can't map mem space\n"); 267 goto fail; 268 } 269 sc->dc_btag = pa->pa_memt; 270#endif 271 272 /* Allocate interrupt */ 273 if (pci_intr_map(pa, &ih)) { 274 printf(": couldn't map interrupt\n"); 275 goto fail; 276 } 277 intrstr = pci_intr_string(pc, ih); 278 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc, 279 self->dv_xname); 280 if (sc->sc_ih == NULL) { 281 printf(": couldn't establish interrupt"); 282 if (intrstr != NULL) 283 printf(" at %s", intrstr); 284 printf("\n"); 285 goto fail; 286 } 287 printf(": %s,", intrstr); 288 289 /* Need this info to decide on a chip type. */ 290 sc->dc_revision = revision = PCI_REVISION(pa->pa_class); 291 292 switch (PCI_VENDOR(pa->pa_id)) { 293 case PCI_VENDOR_DEC: 294 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 || 295 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) { 296 found = 1; 297 sc->dc_type = DC_TYPE_21143; 298 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 299 sc->dc_flags |= DC_REDUCED_MII_POLL; 300 dc_eeprom_width(sc); 301 dc_read_srom(sc, sc->dc_romwidth); 302 } 303 break; 304 case PCI_VENDOR_INTEL: 305 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_21145) { 306 found = 1; 307 sc->dc_type = DC_TYPE_21145; 308 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 309 sc->dc_flags |= DC_REDUCED_MII_POLL; 310 dc_eeprom_width(sc); 311 dc_read_srom(sc, sc->dc_romwidth); 312 } 313 case PCI_VENDOR_DAVICOM: 314 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 || 315 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102 || 316 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9009) { 317 found = 1; 318 sc->dc_type = DC_TYPE_DM9102; 319 sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; 320 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; 321 sc->dc_pmode = DC_PMODE_MII; 322 323 /* Increase the latency timer value. */ 324 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT); 325 command &= 0xFFFF00FF; 326 command |= 0x00008000; 327 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command); 328 } 329 break; 330 case PCI_VENDOR_3COM: 331 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3COM_3CSHO100BTX) { 332 found = 1; 333 sc->dc_type = DC_TYPE_AN983; 334 sc->dc_flags |= DC_TX_USE_TX_INTR; 335 sc->dc_flags |= DC_TX_ADMTEK_WAR; 336 sc->dc_pmode = DC_PMODE_MII; 337 } 338 dc_eeprom_width(sc); 339 dc_read_srom(sc, sc->dc_romwidth); 340 break; 341 case PCI_VENDOR_ADMTEK: 342 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) { 343 found = 1; 344 sc->dc_type = DC_TYPE_AL981; 345 sc->dc_flags |= DC_TX_USE_TX_INTR; 346 sc->dc_flags |= DC_TX_ADMTEK_WAR; 347 sc->dc_pmode = DC_PMODE_MII; 348 } 349 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983) { 350 found = 1; 351 sc->dc_type = DC_TYPE_AN983; 352 sc->dc_flags |= DC_TX_USE_TX_INTR; 353 sc->dc_flags |= DC_TX_ADMTEK_WAR; 354 sc->dc_flags |= DC_64BIT_HASH; 355 sc->dc_pmode = DC_PMODE_MII; 356 } 357 dc_eeprom_width(sc); 358 dc_read_srom(sc, sc->dc_romwidth); 359 break; 360 case PCI_VENDOR_MACRONIX: 361 case PCI_VENDOR_ACCTON: 362 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) { 363 found = 1; 364 sc->dc_type = DC_TYPE_AN983; 365 sc->dc_flags |= DC_TX_USE_TX_INTR; 366 sc->dc_flags |= DC_TX_ADMTEK_WAR; 367 sc->dc_pmode = DC_PMODE_MII; 368 369 dc_eeprom_width(sc); 370 dc_read_srom(sc, sc->dc_romwidth); 371 } 372 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) { 373 found = 1; 374 if (revision < DC_REVISION_98713A) { 375 sc->dc_type = DC_TYPE_98713; 376 } 377 if (revision >= DC_REVISION_98713A) { 378 sc->dc_type = DC_TYPE_98713A; 379 sc->dc_flags |= DC_21143_NWAY; 380 } 381 sc->dc_flags |= DC_REDUCED_MII_POLL; 382 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 383 } 384 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 || 385 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) { 386 found = 1; 387 if (revision >= DC_REVISION_98715AEC_C && 388 revision < DC_REVISION_98725) 389 sc->dc_flags |= DC_128BIT_HASH; 390 sc->dc_type = DC_TYPE_987x5; 391 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 392 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 393 } 394 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) { 395 found = 1; 396 sc->dc_type = DC_TYPE_987x5; 397 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 398 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 399 } 400 break; 401 case PCI_VENDOR_COMPEX: 402 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) { 403 found = 1; 404 if (revision < DC_REVISION_98713A) { 405 sc->dc_type = DC_TYPE_98713; 406 sc->dc_flags |= DC_REDUCED_MII_POLL; 407 } 408 if (revision >= DC_REVISION_98713A) 409 sc->dc_type = DC_TYPE_98713A; 410 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 411 } 412 break; 413 case PCI_VENDOR_LITEON: 414 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) { 415 found = 1; 416 sc->dc_type = DC_TYPE_PNICII; 417 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 418 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 419 sc->dc_flags |= DC_128BIT_HASH; 420 } 421 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) { 422 found = 1; 423 sc->dc_type = DC_TYPE_PNIC; 424 sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS; 425 sc->dc_flags |= DC_PNIC_RX_BUG_WAR; 426 sc->dc_pnic_rx_buf = malloc(DC_RXLEN * 5, M_DEVBUF, 427 M_NOWAIT); 428 if (sc->dc_pnic_rx_buf == NULL) 429 panic("dc_pci_attach"); 430 if (revision < DC_REVISION_82C169) 431 sc->dc_pmode = DC_PMODE_SYM; 432 } 433 break; 434 case PCI_VENDOR_ASIX: 435 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) { 436 found = 1; 437 sc->dc_type = DC_TYPE_ASIX; 438 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG; 439 sc->dc_flags |= DC_REDUCED_MII_POLL; 440 sc->dc_pmode = DC_PMODE_MII; 441 } 442 break; 443 case PCI_VENDOR_CONEXANT: 444 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CONEXANT_RS7112) { 445 found = 1; 446 sc->dc_type = DC_TYPE_CONEXANT; 447 sc->dc_flags |= DC_TX_INTR_ALWAYS; 448 sc->dc_flags |= DC_REDUCED_MII_POLL; 449 sc->dc_pmode = DC_PMODE_MII; 450 dc_eeprom_width(sc); 451 dc_read_srom(sc, sc->dc_romwidth); 452 } 453 break; 454 } 455 if (found == 0) { 456 /* This shouldn't happen if probe has done it's job... */ 457 printf(": unknown device: %x:%x\n", 458 PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 459 goto fail; 460 } 461 462 /* Save the cache line size. */ 463 if (DC_IS_DAVICOM(sc)) 464 sc->dc_cachesize = 0; 465 else 466 sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag, 467 DC_PCI_CFLT) & 0xFF; 468 469 /* Reset the adapter. */ 470 dc_reset(sc); 471 472 /* Take 21143 out of snooze mode */ 473 if (DC_IS_INTEL(sc)) { 474 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 475 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 476 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command); 477 } 478 479 /* 480 * If we discover later (in dc_attach) that we have an 481 * MII with no PHY, we need to have the 21143 drive the LEDs. 482 * Except there are some systems like the NEC VersaPro NoteBook PC 483 * which have no LEDs, and twiddling these bits has adverse effects 484 * on them. (I.e. you suddenly can't get a link.) 485 * 486 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS 487 * bit set, else we clear it. Since our dc(4) driver is split into 488 * bus-dependent and bus-independent parts, we must do set this bit 489 * here while we are able to do PCI configuration reads. 490 */ 491 if (DC_IS_INTEL(sc)) { 492 if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033) 493 sc->dc_flags |= DC_TULIP_LEDS; 494 } 495 496 /* 497 * Try to learn something about the supported media. 498 * We know that ASIX and ADMtek and Davicom devices 499 * will *always* be using MII media, so that's a no-brainer. 500 * The tricky ones are the Macronix/PNIC II and the 501 * Intel 21143. 502 */ 503 if (DC_IS_INTEL(sc)) 504 dc_parse_21143_srom(sc); 505 else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { 506 if (sc->dc_type == DC_TYPE_98713) 507 sc->dc_pmode = DC_PMODE_MII; 508 else 509 sc->dc_pmode = DC_PMODE_SYM; 510 } else if (!sc->dc_pmode) 511 sc->dc_pmode = DC_PMODE_MII; 512 513#ifdef __sparc64__ 514 { 515 extern void myetheraddr(u_char *); 516 517 if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address", 518 sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0) 519 myetheraddr(sc->sc_arpcom.ac_enaddr); 520 if (sc->sc_arpcom.ac_enaddr[0] == 0x00 && 521 sc->sc_arpcom.ac_enaddr[1] == 0x03 && 522 sc->sc_arpcom.ac_enaddr[2] == 0xcc) 523 sc->dc_flags |= DC_MOMENCO_BOTCH; 524 sc->sc_hasmac = 1; 525 } 526#endif 527 528#ifdef SRM_MEDIA 529 sc->dc_srm_media = 0; 530 531 /* Remember the SRM console media setting */ 532 if (DC_IS_INTEL(sc)) { 533 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 534 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 535 switch ((command >> 8) & 0xff) { 536 case 3: 537 sc->dc_srm_media = IFM_10_T; 538 break; 539 case 4: 540 sc->dc_srm_media = IFM_10_T | IFM_FDX; 541 break; 542 case 5: 543 sc->dc_srm_media = IFM_100_TX; 544 break; 545 case 6: 546 sc->dc_srm_media = IFM_100_TX | IFM_FDX; 547 break; 548 } 549 if (sc->dc_srm_media) 550 sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER; 551 } 552#endif 553 dc_eeprom_width(sc); 554 dc_attach(sc); 555 556fail: 557 splx(s); 558} 559 560struct cfattach dc_pci_ca = { 561 sizeof(struct dc_softc), dc_pci_match, dc_pci_attach 562}; 563