if_dc_pci.c revision 1.34
1/*	$OpenBSD: if_dc_pci.c,v 1.34 2002/10/20 16:46:28 henning Exp $	*/
2
3/*
4 * Copyright (c) 1997, 1998, 1999
5 *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *	This product includes software developed by Bill Paul.
18 * 4. Neither the name of the author nor the names of any co-contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 * THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $
35 */
36
37#include "bpfilter.h"
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/mbuf.h>
42#include <sys/protosw.h>
43#include <sys/socket.h>
44#include <sys/ioctl.h>
45#include <sys/errno.h>
46#include <sys/malloc.h>
47#include <sys/kernel.h>
48#include <sys/device.h>
49
50#include <net/if.h>
51#include <net/if_dl.h>
52#include <net/if_types.h>
53
54#ifdef INET
55#include <netinet/in.h>
56#include <netinet/in_systm.h>
57#include <netinet/in_var.h>
58#include <netinet/ip.h>
59#include <netinet/if_ether.h>
60#endif
61
62#include <net/if_media.h>
63
64#if NBPFILTER > 0
65#include <net/bpf.h>
66#endif
67
68#include <dev/mii/mii.h>
69#include <dev/mii/miivar.h>
70
71#include <dev/pci/pcireg.h>
72#include <dev/pci/pcivar.h>
73#include <dev/pci/pcidevs.h>
74
75#ifdef __sparc64__
76#include <dev/ofw/openfirm.h>
77#endif
78
79#define DC_USEIOSPACE
80
81#include <dev/ic/dcreg.h>
82
83/*
84 * Various supported device vendors/types and their names.
85 */
86struct dc_type dc_devs[] = {
87	{ PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 },
88	{ PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 },
89	{ PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 },
90	{ PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 },
91	{ PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 },
92	{ PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 },
93	{ PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A },
94	{ PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 },
95	{ PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 },
96	{ PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 },
97	{ PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 },
98	{ PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC },
99	{ PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII },
100	{ PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 },
101	{ PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 },
102	{ PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_RS7112 },
103	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21145 },
104	{ 0, 0 }
105};
106
107int dc_pci_match(struct device *, void *, void *);
108void dc_pci_attach(struct device *, struct device *, void *);
109void dc_pci_acpi(struct device *, void *);
110
111/*
112 * Probe for a 21143 or clone chip. Check the PCI vendor and device
113 * IDs against our list and return a device name if we find a match.
114 */
115int
116dc_pci_match(parent, match, aux)
117	struct device *parent;
118	void *match, *aux;
119{
120	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
121	struct dc_type *t;
122
123	/*
124	 * Support for the 21140 chip is experimental.  If it works for you,
125	 * that's great.  By default, this chip will use de.
126	 */
127        if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC &&
128	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140)
129		return (1);
130
131	/*
132	 * The following chip revision doesn't seem to work so well with dc,
133	 * so let's have de handle it.  (de will return a match of 2)
134	 */
135        if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC &&
136	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 &&
137	    PCI_REVISION(pa->pa_class) == 0x21)
138		return (1);
139
140	/*
141	 * Since dc doesn't fit on the alpha floppy, we want de to win by
142	 * default on alpha so that RAMDISK* and GENERIC will use the same
143	 * driver.
144	 */
145	for (t = dc_devs; t->dc_vid != 0; t++) {
146		if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) &&
147		    (PCI_PRODUCT(pa->pa_id) == t->dc_did)) {
148#ifdef __alpha__
149			return (1);
150#else
151			return (3);
152#endif
153		}
154	}
155
156	return (0);
157}
158
159void dc_pci_acpi(self, aux)
160	struct device *self;
161	void *aux;
162{
163	struct dc_softc		*sc = (struct dc_softc *)self;
164	struct pci_attach_args	*pa = (struct pci_attach_args *)aux;
165	pci_chipset_tag_t	pc = pa->pa_pc;
166	u_int32_t		r, cptr;
167	int			unit;
168
169	unit = sc->dc_unit;
170
171	/* Find the location of the capabilities block */
172	cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF;
173
174	r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF;
175	if (r == 0x01) {
176
177		r = pci_conf_read(pc, pa->pa_tag, cptr + 4);
178		if (r & DC_PSTATE_D3) {
179			u_int32_t		iobase, membase, irq;
180
181			/* Save important PCI config data. */
182			iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO);
183			membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA);
184			irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT);
185
186			/* Reset the power state. */
187			printf("dc%d: chip is in D%d power mode "
188			    "-- setting to D0\n", unit, r & DC_PSTATE_D3);
189			r &= 0xFFFFFFFC;
190			pci_conf_write(pc, pa->pa_tag, cptr + 4, r);
191
192			/* Restore PCI config data. */
193			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase);
194			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase);
195			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq);
196		}
197	}
198	return;
199}
200
201/*
202 * Attach the interface. Allocate softc structures, do ifmedia
203 * setup and ethernet/BPF attach.
204 */
205void dc_pci_attach(parent, self, aux)
206	struct device *parent, *self;
207	void *aux;
208{
209	int			s;
210	const char		*intrstr = NULL;
211	u_int32_t		command;
212	struct dc_softc		*sc = (struct dc_softc *)self;
213	struct pci_attach_args	*pa = aux;
214	pci_chipset_tag_t	pc = pa->pa_pc;
215	pci_intr_handle_t	ih;
216	bus_addr_t		iobase;
217	bus_size_t		iosize;
218	u_int32_t		revision;
219	int			found = 0;
220
221	s = splimp();
222	sc->sc_dmat = pa->pa_dmat;
223	sc->dc_unit = sc->sc_dev.dv_unit;
224
225	/*
226	 * Handle power management nonsense.
227	 */
228	dc_pci_acpi(self, aux);
229
230	/*
231	 * Map control/status registers.
232	 */
233	command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
234	command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
235	    PCI_COMMAND_MASTER_ENABLE;
236	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
237	command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
238
239	sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
240
241#ifdef DC_USEIOSPACE
242	if (!(command & PCI_COMMAND_IO_ENABLE)) {
243		printf(": failed to enable I/O ports\n");
244		goto fail;
245	}
246	if (pci_io_find(pc, pa->pa_tag, DC_PCI_CFBIO, &iobase, &iosize)) {
247		printf(": can't find I/O space\n");
248		goto fail;
249	}
250	if (bus_space_map(pa->pa_iot, iobase, iosize, 0, &sc->dc_bhandle)) {
251		printf(": can't map I/O space\n");
252		goto fail;
253	}
254	sc->dc_btag = pa->pa_iot;
255#else
256	if (!(command & PCI_COMMAND_MEM_ENABLE)) {
257		printf(": failed to enable memory mapping\n");
258		goto fail;
259	}
260	if (pci_mem_find(pc, pa->pa_tag, DC_PCI_CFBMA, &iobase, &iosize, NULL)){
261		printf(": can't find mem space\n");
262		goto fail;
263	}
264	if (bus_space_map(pa->pa_memt, iobase, iosize, 0, &sc->dc_bhandle)) {
265		printf(": can't map mem space\n");
266		goto fail;
267	}
268	sc->dc_btag = pa->pa_memt;
269#endif
270
271	/* Allocate interrupt */
272	if (pci_intr_map(pa, &ih)) {
273		printf(": couldn't map interrupt\n");
274		goto fail;
275	}
276	intrstr = pci_intr_string(pc, ih);
277	sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc,
278	    self->dv_xname);
279	if (sc->sc_ih == NULL) {
280		printf(": couldn't establish interrupt");
281		if (intrstr != NULL)
282			printf(" at %s", intrstr);
283		printf("\n");
284		goto fail;
285	}
286	printf(": %s", intrstr);
287
288	/* Need this info to decide on a chip type. */
289	sc->dc_revision = revision = PCI_REVISION(pa->pa_class);
290
291	switch (PCI_VENDOR(pa->pa_id)) {
292	case PCI_VENDOR_DEC:
293		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 ||
294		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) {
295			found = 1;
296			sc->dc_type = DC_TYPE_21143;
297			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
298			sc->dc_flags |= DC_REDUCED_MII_POLL;
299			dc_eeprom_width(sc);
300			dc_read_srom(sc, sc->dc_romwidth);
301		}
302		break;
303	case PCI_VENDOR_INTEL:
304		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_21145) {
305			found = 1;
306			sc->dc_type = DC_TYPE_21145;
307			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
308			sc->dc_flags |= DC_REDUCED_MII_POLL;
309			dc_eeprom_width(sc);
310			dc_read_srom(sc, sc->dc_romwidth);
311		}
312	case PCI_VENDOR_DAVICOM:
313		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 ||
314		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102) {
315			found = 1;
316			sc->dc_type = DC_TYPE_DM9102;
317			sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS;
318			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD;
319			sc->dc_pmode = DC_PMODE_MII;
320
321			/* Increase the latency timer value. */
322			command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT);
323			command &= 0xFFFF00FF;
324			command |= 0x00008000;
325			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command);
326		}
327		break;
328	case PCI_VENDOR_ADMTEK:
329		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) {
330			found = 1;
331			sc->dc_type = DC_TYPE_AL981;
332			sc->dc_flags |= DC_TX_USE_TX_INTR;
333			sc->dc_flags |= DC_TX_ADMTEK_WAR;
334			sc->dc_pmode = DC_PMODE_MII;
335		}
336		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983) {
337			found = 1;
338			sc->dc_type = DC_TYPE_AN983;
339			sc->dc_flags |= DC_TX_USE_TX_INTR;
340			sc->dc_flags |= DC_TX_ADMTEK_WAR;
341			sc->dc_pmode = DC_PMODE_MII;
342		}
343		dc_eeprom_width(sc);
344		dc_read_srom(sc, sc->dc_romwidth);
345		break;
346	case PCI_VENDOR_MACRONIX:
347	case PCI_VENDOR_ACCTON:
348		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) {
349			found = 1;
350			sc->dc_type = DC_TYPE_AN983;
351			sc->dc_flags |= DC_TX_USE_TX_INTR;
352			sc->dc_flags |= DC_TX_ADMTEK_WAR;
353			sc->dc_pmode = DC_PMODE_MII;
354
355			dc_eeprom_width(sc);
356			dc_read_srom(sc, sc->dc_romwidth);
357		}
358		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) {
359			found = 1;
360			if (revision < DC_REVISION_98713A) {
361				sc->dc_type = DC_TYPE_98713;
362			}
363			if (revision >= DC_REVISION_98713A) {
364				sc->dc_type = DC_TYPE_98713A;
365				sc->dc_flags |= DC_21143_NWAY;
366			}
367			sc->dc_flags |= DC_REDUCED_MII_POLL;
368			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
369		}
370		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 ||
371		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) {
372			found = 1;
373			if (revision >= DC_REVISION_98715AEC_C &&
374			    revision < DC_REVISION_98725)
375				sc->dc_flags |= DC_128BIT_HASH;
376			sc->dc_type = DC_TYPE_987x5;
377			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
378			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
379		}
380		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) {
381			found = 1;
382			sc->dc_type = DC_TYPE_987x5;
383			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
384			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
385		}
386		break;
387	case PCI_VENDOR_COMPEX:
388		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) {
389			found = 1;
390			if (revision < DC_REVISION_98713A) {
391				sc->dc_type = DC_TYPE_98713;
392				sc->dc_flags |= DC_REDUCED_MII_POLL;
393			}
394			if (revision >= DC_REVISION_98713A)
395				sc->dc_type = DC_TYPE_98713A;
396			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
397		}
398		break;
399	case PCI_VENDOR_LITEON:
400		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) {
401			found = 1;
402			sc->dc_type = DC_TYPE_PNICII;
403			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
404			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
405			sc->dc_flags |= DC_128BIT_HASH;
406		}
407		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) {
408			found = 1;
409			sc->dc_type = DC_TYPE_PNIC;
410			sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS;
411			sc->dc_flags |= DC_PNIC_RX_BUG_WAR;
412			sc->dc_pnic_rx_buf = malloc(DC_RXLEN * 5, M_DEVBUF,
413			    M_NOWAIT);
414			if (sc->dc_pnic_rx_buf == NULL)
415				panic("dc_pci_attach");
416			if (revision < DC_REVISION_82C169)
417				sc->dc_pmode = DC_PMODE_SYM;
418		}
419		break;
420	case PCI_VENDOR_ASIX:
421		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) {
422			found = 1;
423			sc->dc_type = DC_TYPE_ASIX;
424			sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG;
425			sc->dc_flags |= DC_REDUCED_MII_POLL;
426			sc->dc_pmode = DC_PMODE_MII;
427		}
428		break;
429	case PCI_VENDOR_CONEXANT:
430		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CONEXANT_RS7112) {
431			found = 1;
432			sc->dc_type = DC_TYPE_CONEXANT;
433			sc->dc_flags |= DC_TX_INTR_ALWAYS;
434			sc->dc_flags |= DC_REDUCED_MII_POLL;
435			sc->dc_pmode = DC_PMODE_MII;
436			dc_eeprom_width(sc);
437			dc_read_srom(sc, sc->dc_romwidth);
438		}
439		break;
440	}
441	if (found == 0) {
442		/* This shouldn't happen if probe has done it's job... */
443		printf(": unknown device: %x:%x\n",
444		    PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id));
445		goto fail;
446	}
447
448	/* Save the cache line size. */
449	if (DC_IS_DAVICOM(sc))
450		sc->dc_cachesize = 0;
451	else
452		sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag,
453		    DC_PCI_CFLT) & 0xFF;
454
455	/* Reset the adapter. */
456	dc_reset(sc);
457
458	/* Take 21143 out of snooze mode */
459	if (DC_IS_INTEL(sc)) {
460		command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD);
461		command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE);
462		pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command);
463	}
464
465	/*
466	 * If we discover later (in dc_attach) that we have an
467	 * MII with no PHY, we need to have the 21143 drive the LEDs.
468	 * Except there are some systems like the NEC VersaPro NoteBook PC
469	 * which have no LEDs, and twiddling these bits has adverse effects
470	 * on them. (I.e. you suddenly can't get a link.)
471	 *
472	 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS
473	 * bit set, else we clear it. Since our dc(4) driver is split into
474	 * bus-dependent and bus-independent parts, we must do set this bit
475	 * here while we are able to do PCI configuration reads.
476	 */
477	if (DC_IS_INTEL(sc)) {
478		if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033)
479			sc->dc_flags |= DC_TULIP_LEDS;
480	}
481
482	/*
483	 * Try to learn something about the supported media.
484	 * We know that ASIX and ADMtek and Davicom devices
485	 * will *always* be using MII media, so that's a no-brainer.
486	 * The tricky ones are the Macronix/PNIC II and the
487	 * Intel 21143.
488	 */
489	if (DC_IS_INTEL(sc))
490		dc_parse_21143_srom(sc);
491	else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) {
492		if (sc->dc_type == DC_TYPE_98713)
493			sc->dc_pmode = DC_PMODE_MII;
494		else
495			sc->dc_pmode = DC_PMODE_SYM;
496	} else if (!sc->dc_pmode)
497		sc->dc_pmode = DC_PMODE_MII;
498
499#ifdef __sparc64__
500	{
501		extern void myetheraddr(u_char *);
502
503		if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address",
504		    sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0)
505			myetheraddr(sc->sc_arpcom.ac_enaddr);
506		sc->sc_hasmac = 1;
507	}
508#endif
509
510#ifdef SRM_MEDIA
511	sc->dc_srm_media = 0;
512
513	/* Remember the SRM console media setting */
514	if (DC_IS_INTEL(sc)) {
515		command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD);
516		command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE);
517		switch ((command >> 8) & 0xff) {
518		case 3:
519			sc->dc_srm_media = IFM_10_T;
520			break;
521		case 4:
522			sc->dc_srm_media = IFM_10_T | IFM_FDX;
523			break;
524		case 5:
525			sc->dc_srm_media = IFM_100_TX;
526			break;
527		case 6:
528			sc->dc_srm_media = IFM_100_TX | IFM_FDX;
529			break;
530		}
531		if (sc->dc_srm_media)
532			sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER;
533	}
534#endif
535	dc_eeprom_width(sc);
536	dc_attach(sc);
537
538fail:
539	splx(s);
540}
541
542struct cfattach dc_pci_ca = {
543	sizeof(struct dc_softc), dc_pci_match, dc_pci_attach
544};
545