if_dc_pci.c revision 1.32
1/* $OpenBSD: if_dc_pci.c,v 1.32 2002/04/18 19:11:18 jason Exp $ */ 2 3/* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/mbuf.h> 42#include <sys/protosw.h> 43#include <sys/socket.h> 44#include <sys/ioctl.h> 45#include <sys/errno.h> 46#include <sys/malloc.h> 47#include <sys/kernel.h> 48#include <sys/device.h> 49 50#include <net/if.h> 51#include <net/if_dl.h> 52#include <net/if_types.h> 53 54#ifdef INET 55#include <netinet/in.h> 56#include <netinet/in_systm.h> 57#include <netinet/in_var.h> 58#include <netinet/ip.h> 59#include <netinet/if_ether.h> 60#endif 61 62#include <net/if_media.h> 63 64#if NBPFILTER > 0 65#include <net/bpf.h> 66#endif 67 68#include <dev/mii/mii.h> 69#include <dev/mii/miivar.h> 70 71#include <dev/pci/pcireg.h> 72#include <dev/pci/pcivar.h> 73#include <dev/pci/pcidevs.h> 74 75#ifdef __sparc64__ 76#include <dev/ofw/openfirm.h> 77#endif 78 79#define DC_USEIOSPACE 80 81#include <dev/ic/dcreg.h> 82 83/* 84 * Various supported device vendors/types and their names. 85 */ 86struct dc_type dc_devs[] = { 87 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 }, 88 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 89 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 }, 90 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 }, 91 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 }, 92 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 }, 93 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A }, 94 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 }, 95 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 }, 96 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 }, 97 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 }, 98 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC }, 99 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII }, 100 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 }, 101 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 102 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_RS7112 }, 103 { 0, 0 } 104}; 105 106int dc_pci_match(struct device *, void *, void *); 107void dc_pci_attach(struct device *, struct device *, void *); 108void dc_pci_acpi(struct device *, void *); 109 110/* 111 * Probe for a 21143 or clone chip. Check the PCI vendor and device 112 * IDs against our list and return a device name if we find a match. 113 */ 114int 115dc_pci_match(parent, match, aux) 116 struct device *parent; 117 void *match, *aux; 118{ 119 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 120 struct dc_type *t; 121 122 /* 123 * Support for the 21140 chip is experimental. If it works for you, 124 * that's great. By default, this chip will use de. 125 */ 126 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 127 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140) 128 return (1); 129 130 /* 131 * The following chip revision doesn't seem to work so well with dc, 132 * so let's have de handle it. (de will return a match of 2) 133 */ 134 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 135 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 && 136 PCI_REVISION(pa->pa_class) == 0x21) 137 return (1); 138 139 /* 140 * Since dc doesn't fit on the alpha floppy, we want de to win by 141 * default on alpha so that RAMDISK* and GENERIC will use the same 142 * driver. 143 */ 144 for (t = dc_devs; t->dc_vid != 0; t++) { 145 if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) && 146 (PCI_PRODUCT(pa->pa_id) == t->dc_did)) { 147#ifdef __alpha__ 148 return (1); 149#else 150 return (3); 151#endif 152 } 153 } 154 155 return (0); 156} 157 158void dc_pci_acpi(self, aux) 159 struct device *self; 160 void *aux; 161{ 162 struct dc_softc *sc = (struct dc_softc *)self; 163 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 164 pci_chipset_tag_t pc = pa->pa_pc; 165 u_int32_t r, cptr; 166 int unit; 167 168 unit = sc->dc_unit; 169 170 /* Find the location of the capabilities block */ 171 cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF; 172 173 r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF; 174 if (r == 0x01) { 175 176 r = pci_conf_read(pc, pa->pa_tag, cptr + 4); 177 if (r & DC_PSTATE_D3) { 178 u_int32_t iobase, membase, irq; 179 180 /* Save important PCI config data. */ 181 iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO); 182 membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA); 183 irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT); 184 185 /* Reset the power state. */ 186 printf("dc%d: chip is in D%d power mode " 187 "-- setting to D0\n", unit, r & DC_PSTATE_D3); 188 r &= 0xFFFFFFFC; 189 pci_conf_write(pc, pa->pa_tag, cptr + 4, r); 190 191 /* Restore PCI config data. */ 192 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase); 193 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase); 194 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq); 195 } 196 } 197 return; 198} 199 200/* 201 * Attach the interface. Allocate softc structures, do ifmedia 202 * setup and ethernet/BPF attach. 203 */ 204void dc_pci_attach(parent, self, aux) 205 struct device *parent, *self; 206 void *aux; 207{ 208 int s; 209 const char *intrstr = NULL; 210 u_int32_t command; 211 struct dc_softc *sc = (struct dc_softc *)self; 212 struct pci_attach_args *pa = aux; 213 pci_chipset_tag_t pc = pa->pa_pc; 214 pci_intr_handle_t ih; 215 bus_addr_t iobase; 216 bus_size_t iosize; 217 u_int32_t revision; 218 int found = 0; 219 220 s = splimp(); 221 sc->sc_dmat = pa->pa_dmat; 222 sc->dc_unit = sc->sc_dev.dv_unit; 223 224 /* 225 * Handle power management nonsense. 226 */ 227 dc_pci_acpi(self, aux); 228 229 /* 230 * Map control/status registers. 231 */ 232 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 233 command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 234 PCI_COMMAND_MASTER_ENABLE; 235 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 236 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 237 238 sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 239 240#ifdef DC_USEIOSPACE 241 if (!(command & PCI_COMMAND_IO_ENABLE)) { 242 printf(": failed to enable I/O ports\n"); 243 goto fail; 244 } 245 if (pci_io_find(pc, pa->pa_tag, DC_PCI_CFBIO, &iobase, &iosize)) { 246 printf(": can't find I/O space\n"); 247 goto fail; 248 } 249 if (bus_space_map(pa->pa_iot, iobase, iosize, 0, &sc->dc_bhandle)) { 250 printf(": can't map I/O space\n"); 251 goto fail; 252 } 253 sc->dc_btag = pa->pa_iot; 254#else 255 if (!(command & PCI_COMMAND_MEM_ENABLE)) { 256 printf(": failed to enable memory mapping\n"); 257 goto fail; 258 } 259 if (pci_mem_find(pc, pa->pa_tag, DC_PCI_CFBMA, &iobase, &iosize, NULL)){ 260 printf(": can't find mem space\n"); 261 goto fail; 262 } 263 if (bus_space_map(pa->pa_memt, iobase, iosize, 0, &sc->dc_bhandle)) { 264 printf(": can't map mem space\n"); 265 goto fail; 266 } 267 sc->dc_btag = pa->pa_memt; 268#endif 269 270 /* Allocate interrupt */ 271 if (pci_intr_map(pa, &ih)) { 272 printf(": couldn't map interrupt\n"); 273 goto fail; 274 } 275 intrstr = pci_intr_string(pc, ih); 276 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc, 277 self->dv_xname); 278 if (sc->sc_ih == NULL) { 279 printf(": couldn't establish interrupt"); 280 if (intrstr != NULL) 281 printf(" at %s", intrstr); 282 printf("\n"); 283 goto fail; 284 } 285 printf(": %s", intrstr); 286 287 /* Need this info to decide on a chip type. */ 288 sc->dc_revision = revision = PCI_REVISION(pa->pa_class); 289 290 switch (PCI_VENDOR(pa->pa_id)) { 291 case PCI_VENDOR_DEC: 292 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 || 293 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) { 294 found = 1; 295 sc->dc_type = DC_TYPE_21143; 296 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 297 sc->dc_flags |= DC_REDUCED_MII_POLL; 298 dc_eeprom_width(sc); 299 dc_read_srom(sc, sc->dc_romwidth); 300 } 301 break; 302 case PCI_VENDOR_DAVICOM: 303 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 || 304 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102) { 305 found = 1; 306 sc->dc_type = DC_TYPE_DM9102; 307 sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; 308 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; 309 sc->dc_pmode = DC_PMODE_MII; 310 311 /* Increase the latency timer value. */ 312 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT); 313 command &= 0xFFFF00FF; 314 command |= 0x00008000; 315 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command); 316 } 317 break; 318 case PCI_VENDOR_ADMTEK: 319 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) { 320 found = 1; 321 sc->dc_type = DC_TYPE_AL981; 322 sc->dc_flags |= DC_TX_USE_TX_INTR; 323 sc->dc_flags |= DC_TX_ADMTEK_WAR; 324 sc->dc_pmode = DC_PMODE_MII; 325 } 326 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983) { 327 found = 1; 328 sc->dc_type = DC_TYPE_AN983; 329 sc->dc_flags |= DC_TX_USE_TX_INTR; 330 sc->dc_flags |= DC_TX_ADMTEK_WAR; 331 sc->dc_pmode = DC_PMODE_MII; 332 } 333 dc_eeprom_width(sc); 334 dc_read_srom(sc, sc->dc_romwidth); 335 break; 336 case PCI_VENDOR_MACRONIX: 337 case PCI_VENDOR_ACCTON: 338 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) { 339 found = 1; 340 sc->dc_type = DC_TYPE_AN983; 341 sc->dc_flags |= DC_TX_USE_TX_INTR; 342 sc->dc_flags |= DC_TX_ADMTEK_WAR; 343 sc->dc_pmode = DC_PMODE_MII; 344 345 dc_eeprom_width(sc); 346 dc_read_srom(sc, sc->dc_romwidth); 347 } 348 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) { 349 found = 1; 350 if (revision < DC_REVISION_98713A) { 351 sc->dc_type = DC_TYPE_98713; 352 } 353 if (revision >= DC_REVISION_98713A) { 354 sc->dc_type = DC_TYPE_98713A; 355 sc->dc_flags |= DC_21143_NWAY; 356 } 357 sc->dc_flags |= DC_REDUCED_MII_POLL; 358 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 359 } 360 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 || 361 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) { 362 found = 1; 363 if (revision >= DC_REVISION_98715AEC_C && 364 revision < DC_REVISION_98725) 365 sc->dc_flags |= DC_128BIT_HASH; 366 sc->dc_type = DC_TYPE_987x5; 367 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 368 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 369 } 370 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) { 371 found = 1; 372 sc->dc_type = DC_TYPE_987x5; 373 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 374 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 375 } 376 break; 377 case PCI_VENDOR_COMPEX: 378 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) { 379 found = 1; 380 if (revision < DC_REVISION_98713A) { 381 sc->dc_type = DC_TYPE_98713; 382 sc->dc_flags |= DC_REDUCED_MII_POLL; 383 } 384 if (revision >= DC_REVISION_98713A) 385 sc->dc_type = DC_TYPE_98713A; 386 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 387 } 388 break; 389 case PCI_VENDOR_LITEON: 390 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) { 391 found = 1; 392 sc->dc_type = DC_TYPE_PNICII; 393 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 394 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 395 sc->dc_flags |= DC_128BIT_HASH; 396 } 397 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) { 398 found = 1; 399 sc->dc_type = DC_TYPE_PNIC; 400 sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS; 401 sc->dc_flags |= DC_PNIC_RX_BUG_WAR; 402 sc->dc_pnic_rx_buf = malloc(DC_RXLEN * 5, M_DEVBUF, 403 M_NOWAIT); 404 if (sc->dc_pnic_rx_buf == NULL) 405 panic("dc_pci_attach"); 406 if (revision < DC_REVISION_82C169) 407 sc->dc_pmode = DC_PMODE_SYM; 408 } 409 break; 410 case PCI_VENDOR_ASIX: 411 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) { 412 found = 1; 413 sc->dc_type = DC_TYPE_ASIX; 414 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG; 415 sc->dc_flags |= DC_REDUCED_MII_POLL; 416 sc->dc_pmode = DC_PMODE_MII; 417 } 418 break; 419 case PCI_VENDOR_CONEXANT: 420 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CONEXANT_RS7112) { 421 found = 1; 422 sc->dc_type = DC_TYPE_CONEXANT; 423 sc->dc_flags |= DC_TX_INTR_ALWAYS; 424 sc->dc_flags |= DC_REDUCED_MII_POLL; 425 sc->dc_pmode = DC_PMODE_MII; 426 dc_eeprom_width(sc); 427 dc_read_srom(sc, sc->dc_romwidth); 428 } 429 break; 430 } 431 if (found == 0) { 432 /* This shouldn't happen if probe has done it's job... */ 433 printf(": unknown device: %x:%x\n", 434 PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 435 goto fail; 436 } 437 438 /* Save the cache line size. */ 439 if (DC_IS_DAVICOM(sc)) 440 sc->dc_cachesize = 0; 441 else 442 sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag, 443 DC_PCI_CFLT) & 0xFF; 444 445 /* Reset the adapter. */ 446 dc_reset(sc); 447 448 /* Take 21143 out of snooze mode */ 449 if (DC_IS_INTEL(sc)) { 450 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 451 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 452 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command); 453 } 454 455 /* 456 * If we discover later (in dc_attach) that we have an 457 * MII with no PHY, we need to have the 21143 drive the LEDs. 458 * Except there are some systems like the NEC VersaPro NoteBook PC 459 * which have no LEDs, and twiddling these bits has adverse effects 460 * on them. (I.e. you suddenly can't get a link.) 461 * 462 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS 463 * bit set, else we clear it. Since our dc(4) driver is split into 464 * bus-dependent and bus-independent parts, we must do set this bit 465 * here while we are able to do PCI configuration reads. 466 */ 467 if (DC_IS_INTEL(sc)) { 468 if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033) 469 sc->dc_flags |= DC_TULIP_LEDS; 470 } 471 472 /* 473 * Try to learn something about the supported media. 474 * We know that ASIX and ADMtek and Davicom devices 475 * will *always* be using MII media, so that's a no-brainer. 476 * The tricky ones are the Macronix/PNIC II and the 477 * Intel 21143. 478 */ 479 if (DC_IS_INTEL(sc)) 480 dc_parse_21143_srom(sc); 481 else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { 482 if (sc->dc_type == DC_TYPE_98713) 483 sc->dc_pmode = DC_PMODE_MII; 484 else 485 sc->dc_pmode = DC_PMODE_SYM; 486 } else if (!sc->dc_pmode) 487 sc->dc_pmode = DC_PMODE_MII; 488 489#ifdef __sparc64__ 490 { 491 extern void myetheraddr(u_char *); 492 493 if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address", 494 sc->arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0) 495 myetheraddr(sc->arpcom.ac_enaddr); 496 sc->sc_hasmac = 1; 497 } 498#endif 499 500#ifdef SRM_MEDIA 501 sc->dc_srm_media = 0; 502 503 /* Remember the SRM console media setting */ 504 if (DC_IS_INTEL(sc)) { 505 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 506 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 507 switch ((command >> 8) & 0xff) { 508 case 3: 509 sc->dc_srm_media = IFM_10_T; 510 break; 511 case 4: 512 sc->dc_srm_media = IFM_10_T | IFM_FDX; 513 break; 514 case 5: 515 sc->dc_srm_media = IFM_100_TX; 516 break; 517 case 6: 518 sc->dc_srm_media = IFM_100_TX | IFM_FDX; 519 break; 520 } 521 if (sc->dc_srm_media) 522 sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER; 523 } 524#endif 525 dc_eeprom_width(sc); 526 dc_attach(sc); 527 528fail: 529 splx(s); 530} 531 532struct cfattach dc_pci_ca = { 533 sizeof(struct dc_softc), dc_pci_match, dc_pci_attach 534}; 535