if_dc_pci.c revision 1.30
1/*	$OpenBSD: if_dc_pci.c,v 1.30 2002/04/01 18:41:47 nate Exp $	*/
2
3/*
4 * Copyright (c) 1997, 1998, 1999
5 *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *	This product includes software developed by Bill Paul.
18 * 4. Neither the name of the author nor the names of any co-contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 * THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $
35 */
36
37#include "bpfilter.h"
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/mbuf.h>
42#include <sys/protosw.h>
43#include <sys/socket.h>
44#include <sys/ioctl.h>
45#include <sys/errno.h>
46#include <sys/malloc.h>
47#include <sys/kernel.h>
48#include <sys/device.h>
49
50#include <net/if.h>
51#include <net/if_dl.h>
52#include <net/if_types.h>
53
54#ifdef INET
55#include <netinet/in.h>
56#include <netinet/in_systm.h>
57#include <netinet/in_var.h>
58#include <netinet/ip.h>
59#include <netinet/if_ether.h>
60#endif
61
62#include <net/if_media.h>
63
64#if NBPFILTER > 0
65#include <net/bpf.h>
66#endif
67
68#include <dev/mii/mii.h>
69#include <dev/mii/miivar.h>
70
71#include <dev/pci/pcireg.h>
72#include <dev/pci/pcivar.h>
73#include <dev/pci/pcidevs.h>
74
75#ifdef __sparc64__
76#include <dev/ofw/openfirm.h>
77#endif
78
79#define DC_USEIOSPACE
80
81#include <dev/ic/dcreg.h>
82
83/*
84 * Various supported device vendors/types and their names.
85 */
86struct dc_type dc_devs[] = {
87	{ PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 },
88	{ PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 },
89	{ PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 },
90	{ PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 },
91	{ PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 },
92	{ PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 },
93	{ PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A },
94	{ PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 },
95	{ PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 },
96	{ PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 },
97	{ PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 },
98	{ PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC },
99	{ PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII },
100	{ PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 },
101	{ PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 },
102	{ 0, 0 }
103};
104
105int dc_pci_match(struct device *, void *, void *);
106void dc_pci_attach(struct device *, struct device *, void *);
107void dc_pci_acpi(struct device *, void *);
108
109extern void dc_eeprom_width(struct dc_softc *);
110extern void dc_read_srom(struct dc_softc *, int);
111extern void dc_parse_21143_srom(struct dc_softc *);
112
113/*
114 * Probe for a 21143 or clone chip. Check the PCI vendor and device
115 * IDs against our list and return a device name if we find a match.
116 */
117int
118dc_pci_match(parent, match, aux)
119	struct device *parent;
120	void *match, *aux;
121{
122	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
123	struct dc_type *t;
124
125	/*
126	 * Support for the 21140 chip is experimental.  If it works for you,
127	 * that's great.  By default, this chip will use de.
128	 */
129        if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC &&
130	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140)
131		return (1);
132
133	/*
134	 * The following chip revision doesn't seem to work so well with dc,
135	 * so let's have de handle it.  (de will return a match of 2)
136	 */
137        if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC &&
138	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 &&
139	    PCI_REVISION(pa->pa_class) == 0x21)
140		return (1);
141
142	/*
143	 * Since dc doesn't fit on the alpha floppy, we want de to win by
144	 * default on alpha so that RAMDISK* and GENERIC will use the same
145	 * driver.
146	 */
147	for (t = dc_devs; t->dc_vid != 0; t++) {
148		if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) &&
149		    (PCI_PRODUCT(pa->pa_id) == t->dc_did)) {
150#ifdef __alpha__
151			return (1);
152#else
153			return (3);
154#endif
155		}
156	}
157
158	return (0);
159}
160
161void dc_pci_acpi(self, aux)
162	struct device *self;
163	void *aux;
164{
165	struct dc_softc		*sc = (struct dc_softc *)self;
166	struct pci_attach_args	*pa = (struct pci_attach_args *)aux;
167	pci_chipset_tag_t	pc = pa->pa_pc;
168	u_int32_t		r, cptr;
169	int			unit;
170
171	unit = sc->dc_unit;
172
173	/* Find the location of the capabilities block */
174	cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF;
175
176	r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF;
177	if (r == 0x01) {
178
179		r = pci_conf_read(pc, pa->pa_tag, cptr + 4);
180		if (r & DC_PSTATE_D3) {
181			u_int32_t		iobase, membase, irq;
182
183			/* Save important PCI config data. */
184			iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO);
185			membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA);
186			irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT);
187
188			/* Reset the power state. */
189			printf("dc%d: chip is in D%d power mode "
190			    "-- setting to D0\n", unit, r & DC_PSTATE_D3);
191			r &= 0xFFFFFFFC;
192			pci_conf_write(pc, pa->pa_tag, cptr + 4, r);
193
194			/* Restore PCI config data. */
195			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase);
196			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase);
197			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq);
198		}
199	}
200	return;
201}
202
203/*
204 * Attach the interface. Allocate softc structures, do ifmedia
205 * setup and ethernet/BPF attach.
206 */
207void dc_pci_attach(parent, self, aux)
208	struct device *parent, *self;
209	void *aux;
210{
211	int			s;
212	const char		*intrstr = NULL;
213	u_int32_t		command;
214	struct dc_softc		*sc = (struct dc_softc *)self;
215	struct pci_attach_args	*pa = aux;
216	pci_chipset_tag_t	pc = pa->pa_pc;
217	pci_intr_handle_t	ih;
218	bus_addr_t		iobase;
219	bus_size_t		iosize;
220	u_int32_t		revision;
221	int			found = 0;
222
223	s = splimp();
224	sc->sc_dmat = pa->pa_dmat;
225	sc->dc_unit = sc->sc_dev.dv_unit;
226
227	/*
228	 * Handle power management nonsense.
229	 */
230	dc_pci_acpi(self, aux);
231
232	/*
233	 * Map control/status registers.
234	 */
235	command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
236	command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
237	    PCI_COMMAND_MASTER_ENABLE;
238	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
239	command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
240
241	sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
242
243#ifdef DC_USEIOSPACE
244	if (!(command & PCI_COMMAND_IO_ENABLE)) {
245		printf(": failed to enable I/O ports\n");
246		goto fail;
247	}
248	if (pci_io_find(pc, pa->pa_tag, DC_PCI_CFBIO, &iobase, &iosize)) {
249		printf(": can't find I/O space\n");
250		goto fail;
251	}
252	if (bus_space_map(pa->pa_iot, iobase, iosize, 0, &sc->dc_bhandle)) {
253		printf(": can't map I/O space\n");
254		goto fail;
255	}
256	sc->dc_btag = pa->pa_iot;
257#else
258	if (!(command & PCI_COMMAND_MEM_ENABLE)) {
259		printf(": failed to enable memory mapping\n");
260		goto fail;
261	}
262	if (pci_mem_find(pc, pa->pa_tag, DC_PCI_CFBMA, &iobase, &iosize, NULL)){
263		printf(": can't find mem space\n");
264		goto fail;
265	}
266	if (bus_space_map(pa->pa_memt, iobase, iosize, 0, &sc->dc_bhandle)) {
267		printf(": can't map mem space\n");
268		goto fail;
269	}
270	sc->dc_btag = pa->pa_memt;
271#endif
272
273	/* Allocate interrupt */
274	if (pci_intr_map(pa, &ih)) {
275		printf(": couldn't map interrupt\n");
276		goto fail;
277	}
278	intrstr = pci_intr_string(pc, ih);
279	sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc,
280	    self->dv_xname);
281	if (sc->sc_ih == NULL) {
282		printf(": couldn't establish interrupt");
283		if (intrstr != NULL)
284			printf(" at %s", intrstr);
285		printf("\n");
286		goto fail;
287	}
288	printf(": %s", intrstr);
289
290	/* Need this info to decide on a chip type. */
291	sc->dc_revision = revision = PCI_REVISION(pa->pa_class);
292
293	switch (PCI_VENDOR(pa->pa_id)) {
294	case PCI_VENDOR_DEC:
295		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 ||
296		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) {
297			found = 1;
298			sc->dc_type = DC_TYPE_21143;
299			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
300			sc->dc_flags |= DC_REDUCED_MII_POLL;
301			dc_eeprom_width(sc);
302			dc_read_srom(sc, sc->dc_romwidth);
303		}
304		break;
305	case PCI_VENDOR_DAVICOM:
306		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 ||
307		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102) {
308			found = 1;
309			sc->dc_type = DC_TYPE_DM9102;
310			sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS;
311			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD;
312			sc->dc_pmode = DC_PMODE_MII;
313
314			/* Increase the latency timer value. */
315			command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT);
316			command &= 0xFFFF00FF;
317			command |= 0x00008000;
318			pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command);
319		}
320		break;
321	case PCI_VENDOR_ADMTEK:
322		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) {
323			found = 1;
324			sc->dc_type = DC_TYPE_AL981;
325			sc->dc_flags |= DC_TX_USE_TX_INTR;
326			sc->dc_flags |= DC_TX_ADMTEK_WAR;
327			sc->dc_pmode = DC_PMODE_MII;
328		}
329		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983) {
330			found = 1;
331			sc->dc_type = DC_TYPE_AN983;
332			sc->dc_flags |= DC_TX_USE_TX_INTR;
333			sc->dc_flags |= DC_TX_ADMTEK_WAR;
334			sc->dc_pmode = DC_PMODE_MII;
335		}
336		dc_eeprom_width(sc);
337		dc_read_srom(sc, sc->dc_romwidth);
338		break;
339	case PCI_VENDOR_MACRONIX:
340	case PCI_VENDOR_ACCTON:
341		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) {
342			found = 1;
343			sc->dc_type = DC_TYPE_AN983;
344			sc->dc_flags |= DC_TX_USE_TX_INTR;
345			sc->dc_flags |= DC_TX_ADMTEK_WAR;
346			sc->dc_pmode = DC_PMODE_MII;
347
348			dc_eeprom_width(sc);
349			dc_read_srom(sc, sc->dc_romwidth);
350		}
351		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) {
352			found = 1;
353			if (revision < DC_REVISION_98713A) {
354				sc->dc_type = DC_TYPE_98713;
355			}
356			if (revision >= DC_REVISION_98713A) {
357				sc->dc_type = DC_TYPE_98713A;
358				sc->dc_flags |= DC_21143_NWAY;
359			}
360			sc->dc_flags |= DC_REDUCED_MII_POLL;
361			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
362		}
363		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 ||
364		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) {
365			found = 1;
366			if (revision >= DC_REVISION_98715AEC_C &&
367			    revision < DC_REVISION_98725)
368				sc->dc_flags |= DC_128BIT_HASH;
369			sc->dc_type = DC_TYPE_987x5;
370			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
371			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
372		}
373		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) {
374			found = 1;
375			sc->dc_type = DC_TYPE_987x5;
376			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
377			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
378		}
379		break;
380	case PCI_VENDOR_COMPEX:
381		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) {
382			found = 1;
383			if (revision < DC_REVISION_98713A) {
384				sc->dc_type = DC_TYPE_98713;
385				sc->dc_flags |= DC_REDUCED_MII_POLL;
386			}
387			if (revision >= DC_REVISION_98713A)
388				sc->dc_type = DC_TYPE_98713A;
389			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
390		}
391		break;
392	case PCI_VENDOR_LITEON:
393		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) {
394			found = 1;
395			sc->dc_type = DC_TYPE_PNICII;
396			sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
397			sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
398			sc->dc_flags |= DC_128BIT_HASH;
399		}
400		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) {
401			found = 1;
402			sc->dc_type = DC_TYPE_PNIC;
403			sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS;
404			sc->dc_flags |= DC_PNIC_RX_BUG_WAR;
405			sc->dc_pnic_rx_buf = malloc(DC_RXLEN * 5, M_DEVBUF,
406			    M_NOWAIT);
407			if (sc->dc_pnic_rx_buf == NULL)
408				panic("dc_pci_attach");
409			if (revision < DC_REVISION_82C169)
410				sc->dc_pmode = DC_PMODE_SYM;
411		}
412		break;
413	case PCI_VENDOR_ASIX:
414		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) {
415			found = 1;
416			sc->dc_type = DC_TYPE_ASIX;
417			sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG;
418			sc->dc_flags |= DC_REDUCED_MII_POLL;
419			sc->dc_pmode = DC_PMODE_MII;
420		}
421		break;
422	}
423	if (found == 0) {
424		/* This shouldn't happen if probe has done it's job... */
425		printf(": unknown device: %x:%x\n",
426		    PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id));
427		goto fail;
428	}
429
430	/* Save the cache line size. */
431	if (DC_IS_DAVICOM(sc))
432		sc->dc_cachesize = 0;
433	else
434		sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag,
435		    DC_PCI_CFLT) & 0xFF;
436
437	/* Reset the adapter. */
438	dc_reset(sc);
439
440	/* Take 21143 out of snooze mode */
441	if (DC_IS_INTEL(sc)) {
442		command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD);
443		command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE);
444		pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command);
445	}
446
447	/*
448	 * If we discover later (in dc_attach) that we have an
449	 * MII with no PHY, we need to have the 21143 drive the LEDs.
450	 * Except there are some systems like the NEC VersaPro NoteBook PC
451	 * which have no LEDs, and twiddling these bits has adverse effects
452	 * on them. (I.e. you suddenly can't get a link.)
453	 *
454	 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS
455	 * bit set, else we clear it. Since our dc(4) driver is split into
456	 * bus-dependent and bus-independent parts, we must do set this bit
457	 * here while we are able to do PCI configuration reads.
458	 */
459	if (DC_IS_INTEL(sc)) {
460		if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033)
461			sc->dc_flags |= DC_TULIP_LEDS;
462	}
463
464	/*
465	 * Try to learn something about the supported media.
466	 * We know that ASIX and ADMtek and Davicom devices
467	 * will *always* be using MII media, so that's a no-brainer.
468	 * The tricky ones are the Macronix/PNIC II and the
469	 * Intel 21143.
470	 */
471	if (DC_IS_INTEL(sc))
472		dc_parse_21143_srom(sc);
473	else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) {
474		if (sc->dc_type == DC_TYPE_98713)
475			sc->dc_pmode = DC_PMODE_MII;
476		else
477			sc->dc_pmode = DC_PMODE_SYM;
478	} else if (!sc->dc_pmode)
479		sc->dc_pmode = DC_PMODE_MII;
480
481#ifdef __sparc64__
482	{
483		extern void myetheraddr(u_char *);
484
485		if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address",
486		    sc->arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0)
487			myetheraddr(sc->arpcom.ac_enaddr);
488		sc->sc_hasmac = 1;
489	}
490#endif
491
492#ifdef SRM_MEDIA
493	sc->dc_srm_media = 0;
494
495	/* Remember the SRM console media setting */
496	if (DC_IS_INTEL(sc)) {
497		command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD);
498		command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE);
499		switch ((command >> 8) & 0xff) {
500		case 3:
501			sc->dc_srm_media = IFM_10_T;
502			break;
503		case 4:
504			sc->dc_srm_media = IFM_10_T | IFM_FDX;
505			break;
506		case 5:
507			sc->dc_srm_media = IFM_100_TX;
508			break;
509		case 6:
510			sc->dc_srm_media = IFM_100_TX | IFM_FDX;
511			break;
512		}
513		if (sc->dc_srm_media)
514			sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER;
515	}
516#endif
517	dc_eeprom_width(sc);
518	dc_attach(sc);
519
520fail:
521	splx(s);
522}
523
524struct cfattach dc_pci_ca = {
525	sizeof(struct dc_softc), dc_pci_match, dc_pci_attach
526};
527