if_dc_pci.c revision 1.25
1/* $OpenBSD: if_dc_pci.c,v 1.25 2002/02/17 05:27:39 nate Exp $ */ 2 3/* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/mbuf.h> 42#include <sys/protosw.h> 43#include <sys/socket.h> 44#include <sys/ioctl.h> 45#include <sys/errno.h> 46#include <sys/malloc.h> 47#include <sys/kernel.h> 48#include <sys/device.h> 49 50#include <net/if.h> 51#include <net/if_dl.h> 52#include <net/if_types.h> 53 54#ifdef INET 55#include <netinet/in.h> 56#include <netinet/in_systm.h> 57#include <netinet/in_var.h> 58#include <netinet/ip.h> 59#include <netinet/if_ether.h> 60#endif 61 62#include <net/if_media.h> 63 64#if NBPFILTER > 0 65#include <net/bpf.h> 66#endif 67 68#include <uvm/uvm_extern.h> /* for vtophys */ 69 70#include <dev/mii/mii.h> 71#include <dev/mii/miivar.h> 72 73#include <dev/pci/pcireg.h> 74#include <dev/pci/pcivar.h> 75#include <dev/pci/pcidevs.h> 76 77#define DC_USEIOSPACE 78 79#include <dev/ic/dcreg.h> 80 81/* 82 * Various supported device vendors/types and their names. 83 */ 84struct dc_type dc_devs[] = { 85 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140 }, 86 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 87 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 }, 88 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 }, 89 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 }, 90 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 }, 91 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A }, 92 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 }, 93 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 }, 94 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 }, 95 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 }, 96 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC }, 97 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII }, 98 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 }, 99 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 100 { 0, 0 } 101}; 102 103int dc_pci_match __P((struct device *, void *, void *)); 104void dc_pci_attach __P((struct device *, struct device *, void *)); 105void dc_pci_acpi __P((struct device *, void *)); 106 107extern void dc_eeprom_width __P((struct dc_softc *)); 108extern void dc_read_srom __P((struct dc_softc *, int)); 109extern void dc_parse_21143_srom __P((struct dc_softc *)); 110 111/* 112 * Probe for a 21143 or clone chip. Check the PCI vendor and device 113 * IDs against our list and return a device name if we find a match. 114 */ 115int 116dc_pci_match(parent, match, aux) 117 struct device *parent; 118 void *match, *aux; 119{ 120 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 121 struct dc_type *t; 122 123 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_DEC && 124 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142 && 125 PCI_REVISION(pa->pa_class) == 0x21) 126 return (1); 127 128 for (t = dc_devs; t->dc_vid != 0; t++) { 129 if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) && 130 (PCI_PRODUCT(pa->pa_id) == t->dc_did)) { 131 return (2); 132 } 133 } 134 135 return (0); 136} 137 138void dc_pci_acpi(self, aux) 139 struct device *self; 140 void *aux; 141{ 142 struct dc_softc *sc = (struct dc_softc *)self; 143 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 144 pci_chipset_tag_t pc = pa->pa_pc; 145 u_int32_t r, cptr; 146 int unit; 147 148 unit = sc->dc_unit; 149 150 /* Find the location of the capabilities block */ 151 cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF; 152 153 r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF; 154 if (r == 0x01) { 155 156 r = pci_conf_read(pc, pa->pa_tag, cptr + 4); 157 if (r & DC_PSTATE_D3) { 158 u_int32_t iobase, membase, irq; 159 160 /* Save important PCI config data. */ 161 iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO); 162 membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA); 163 irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT); 164 165 /* Reset the power state. */ 166 printf("dc%d: chip is in D%d power mode " 167 "-- setting to D0\n", unit, r & DC_PSTATE_D3); 168 r &= 0xFFFFFFFC; 169 pci_conf_write(pc, pa->pa_tag, cptr + 4, r); 170 171 /* Restore PCI config data. */ 172 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase); 173 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase); 174 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq); 175 } 176 } 177 return; 178} 179 180/* 181 * Attach the interface. Allocate softc structures, do ifmedia 182 * setup and ethernet/BPF attach. 183 */ 184void dc_pci_attach(parent, self, aux) 185 struct device *parent, *self; 186 void *aux; 187{ 188 int s; 189 const char *intrstr = NULL; 190 u_int32_t command; 191 struct dc_softc *sc = (struct dc_softc *)self; 192 struct pci_attach_args *pa = aux; 193 pci_chipset_tag_t pc = pa->pa_pc; 194 pci_intr_handle_t ih; 195 bus_addr_t iobase; 196 bus_size_t iosize; 197 u_int32_t revision; 198 int found = 0; 199 200 s = splimp(); 201 sc->sc_dmat = pa->pa_dmat; 202 sc->dc_unit = sc->sc_dev.dv_unit; 203 204 /* 205 * Handle power management nonsense. 206 */ 207 dc_pci_acpi(self, aux); 208 209 /* 210 * Map control/status registers. 211 */ 212 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 213 command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 214 PCI_COMMAND_MASTER_ENABLE; 215 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 216 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 217 218 sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 219 220#ifdef DC_USEIOSPACE 221 if (!(command & PCI_COMMAND_IO_ENABLE)) { 222 printf(": failed to enable I/O ports\n"); 223 goto fail; 224 } 225 if (pci_io_find(pc, pa->pa_tag, DC_PCI_CFBIO, &iobase, &iosize)) { 226 printf(": can't find I/O space\n"); 227 goto fail; 228 } 229 if (bus_space_map(pa->pa_iot, iobase, iosize, 0, &sc->dc_bhandle)) { 230 printf(": can't map I/O space\n"); 231 goto fail; 232 } 233 sc->dc_btag = pa->pa_iot; 234#else 235 if (!(command & PCI_COMMAND_MEM_ENABLE)) { 236 printf(": failed to enable memory mapping\n"); 237 goto fail; 238 } 239 if (pci_mem_find(pc, pa->pa_tag, DC_PCI_CFBMA, &iobase, &iosize, NULL)){ 240 printf(": can't find mem space\n"); 241 goto fail; 242 } 243 if (bus_space_map(pa->pa_memt, iobase, iosize, 0, &sc->dc_bhandle)) { 244 printf(": can't map mem space\n"); 245 goto fail; 246 } 247 sc->dc_btag = pa->pa_memt; 248#endif 249 250 /* Allocate interrupt */ 251 if (pci_intr_map(pa, &ih)) { 252 printf(": couldn't map interrupt\n"); 253 goto fail; 254 } 255 intrstr = pci_intr_string(pc, ih); 256 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc, 257 self->dv_xname); 258 if (sc->sc_ih == NULL) { 259 printf(": couldn't establish interrupt"); 260 if (intrstr != NULL) 261 printf(" at %s", intrstr); 262 printf("\n"); 263 goto fail; 264 } 265 printf(": %s", intrstr); 266 267 /* Need this info to decide on a chip type. */ 268 sc->dc_revision = revision = PCI_REVISION(pa->pa_class); 269 270 switch (PCI_VENDOR(pa->pa_id)) { 271 case PCI_VENDOR_DEC: 272 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21140 || 273 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) { 274 found = 1; 275 sc->dc_type = DC_TYPE_21143; 276 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 277 sc->dc_flags |= DC_REDUCED_MII_POLL; 278 dc_eeprom_width(sc); 279 dc_read_srom(sc, sc->dc_romwidth); 280 } 281 break; 282 case PCI_VENDOR_DAVICOM: 283 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 || 284 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102) { 285 found = 1; 286 sc->dc_type = DC_TYPE_DM9102; 287 sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; 288 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; 289 sc->dc_pmode = DC_PMODE_MII; 290 291 /* Increase the latency timer value. */ 292 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT); 293 command &= 0xFFFF00FF; 294 command |= 0x00008000; 295 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command); 296 } 297 break; 298 case PCI_VENDOR_ADMTEK: 299 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) { 300 found = 1; 301 sc->dc_type = DC_TYPE_AL981; 302 sc->dc_flags |= DC_TX_USE_TX_INTR; 303 sc->dc_flags |= DC_TX_ADMTEK_WAR; 304 sc->dc_pmode = DC_PMODE_MII; 305 } 306 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983) { 307 found = 1; 308 sc->dc_type = DC_TYPE_AN983; 309 sc->dc_flags |= DC_TX_USE_TX_INTR; 310 sc->dc_flags |= DC_TX_ADMTEK_WAR; 311 sc->dc_pmode = DC_PMODE_MII; 312 } 313 dc_eeprom_width(sc); 314 dc_read_srom(sc, sc->dc_romwidth); 315 break; 316 case PCI_VENDOR_MACRONIX: 317 case PCI_VENDOR_ACCTON: 318 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) { 319 found = 1; 320 sc->dc_type = DC_TYPE_AN983; 321 sc->dc_flags |= DC_TX_USE_TX_INTR; 322 sc->dc_flags |= DC_TX_ADMTEK_WAR; 323 sc->dc_pmode = DC_PMODE_MII; 324 325 dc_eeprom_width(sc); 326 dc_read_srom(sc, sc->dc_romwidth); 327 } 328 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) { 329 found = 1; 330 if (revision < DC_REVISION_98713A) { 331 sc->dc_type = DC_TYPE_98713; 332 } 333 if (revision >= DC_REVISION_98713A) { 334 sc->dc_type = DC_TYPE_98713A; 335 sc->dc_flags |= DC_21143_NWAY; 336 } 337 sc->dc_flags |= DC_REDUCED_MII_POLL; 338 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 339 } 340 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 || 341 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) { 342 found = 1; 343 if (revision >= DC_REVISION_98715AEC_C && 344 revision < DC_REVISION_98725) 345 sc->dc_flags |= DC_128BIT_HASH; 346 sc->dc_type = DC_TYPE_987x5; 347 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 348 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 349 } 350 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) { 351 found = 1; 352 sc->dc_type = DC_TYPE_987x5; 353 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 354 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 355 } 356 break; 357 case PCI_VENDOR_COMPEX: 358 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) { 359 found = 1; 360 if (revision < DC_REVISION_98713A) { 361 sc->dc_type = DC_TYPE_98713; 362 sc->dc_flags |= DC_REDUCED_MII_POLL; 363 } 364 if (revision >= DC_REVISION_98713A) 365 sc->dc_type = DC_TYPE_98713A; 366 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 367 } 368 break; 369 case PCI_VENDOR_LITEON: 370 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) { 371 found = 1; 372 sc->dc_type = DC_TYPE_PNICII; 373 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 374 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 375 sc->dc_flags |= DC_128BIT_HASH; 376 } 377 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) { 378 found = 1; 379 sc->dc_type = DC_TYPE_PNIC; 380 sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS; 381 sc->dc_flags |= DC_PNIC_RX_BUG_WAR; 382 sc->dc_pnic_rx_buf = malloc(DC_RXLEN * 5, M_DEVBUF, 383 M_NOWAIT); 384 if (sc->dc_pnic_rx_buf == NULL) 385 panic("dc_pci_attach"); 386 if (revision < DC_REVISION_82C169) 387 sc->dc_pmode = DC_PMODE_SYM; 388 } 389 break; 390 case PCI_VENDOR_ASIX: 391 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) { 392 found = 1; 393 sc->dc_type = DC_TYPE_ASIX; 394 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG; 395 sc->dc_flags |= DC_REDUCED_MII_POLL; 396 sc->dc_pmode = DC_PMODE_MII; 397 } 398 break; 399 } 400 if (found == 0) { 401 /* This shouldn't happen if probe has done it's job... */ 402 printf(": unknown device: %x:%x\n", 403 PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 404 goto fail; 405 } 406 407 /* Save the cache line size. */ 408 if (DC_IS_DAVICOM(sc)) 409 sc->dc_cachesize = 0; 410 else 411 sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag, 412 DC_PCI_CFLT) & 0xFF; 413 414 /* Reset the adapter. */ 415 dc_reset(sc); 416 417 /* Take 21143 out of snooze mode */ 418 if (DC_IS_INTEL(sc)) { 419 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 420 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 421 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command); 422 } 423 424 /* 425 * If we discover later (in dc_attach) that we have an 426 * MII with no PHY, we need to have the 21143 drive the LEDs. 427 * Except there are some systems like the NEC VersaPro NoteBook PC 428 * which have no LEDs, and twiddling these bits has adverse effects 429 * on them. (I.e. you suddenly can't get a link.) 430 * 431 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS 432 * bit set, else we clear it. Since our dc(4) driver is split into 433 * bus-dependent and bus-independent parts, we must do set this bit 434 * here while we are able to do PCI configuration reads. 435 */ 436 if (DC_IS_INTEL(sc)) { 437 if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033) 438 sc->dc_flags |= DC_TULIP_LEDS; 439 } 440 441 /* 442 * Try to learn something about the supported media. 443 * We know that ASIX and ADMtek and Davicom devices 444 * will *always* be using MII media, so that's a no-brainer. 445 * The tricky ones are the Macronix/PNIC II and the 446 * Intel 21143. 447 */ 448 if (DC_IS_INTEL(sc)) 449 dc_parse_21143_srom(sc); 450 else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { 451 if (sc->dc_type == DC_TYPE_98713) 452 sc->dc_pmode = DC_PMODE_MII; 453 else 454 sc->dc_pmode = DC_PMODE_SYM; 455 } else if (!sc->dc_pmode) 456 sc->dc_pmode = DC_PMODE_MII; 457 458#ifdef __sparc64__ 459 { 460 extern void myetheraddr __P((u_char *)); 461 myetheraddr(sc->arpcom.ac_enaddr); 462 sc->sc_hasmac = 1; 463 } 464#endif 465 466#ifdef SRM_MEDIA 467 sc->dc_srm_media = 0; 468 469 /* Remember the SRM console media setting */ 470 if (DC_IS_INTEL(sc)) { 471 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 472 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 473 switch ((command >> 8) & 0xff) { 474 case 3: 475 sc->dc_srm_media = IFM_10_T; 476 break; 477 case 4: 478 sc->dc_srm_media = IFM_10_T | IFM_FDX; 479 break; 480 case 5: 481 sc->dc_srm_media = IFM_100_TX; 482 break; 483 case 6: 484 sc->dc_srm_media = IFM_100_TX | IFM_FDX; 485 break; 486 } 487 if (sc->dc_srm_media) 488 sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER; 489 } 490#endif 491 dc_eeprom_width(sc); 492 dc_attach(sc); 493 494fail: 495 splx(s); 496} 497 498struct cfattach dc_pci_ca = { 499 sizeof(struct dc_softc), dc_pci_match, dc_pci_attach 500}; 501