if_dc_pci.c revision 1.14
1/* $OpenBSD: if_dc_pci.c,v 1.14 2001/08/12 20:03:49 mickey Exp $ */ 2 3/* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/mbuf.h> 42#include <sys/protosw.h> 43#include <sys/socket.h> 44#include <sys/ioctl.h> 45#include <sys/errno.h> 46#include <sys/malloc.h> 47#include <sys/kernel.h> 48#include <sys/device.h> 49 50#include <net/if.h> 51#include <net/if_dl.h> 52#include <net/if_types.h> 53 54#ifdef INET 55#include <netinet/in.h> 56#include <netinet/in_systm.h> 57#include <netinet/in_var.h> 58#include <netinet/ip.h> 59#include <netinet/if_ether.h> 60#endif 61 62#include <net/if_media.h> 63 64#if NBPFILTER > 0 65#include <net/bpf.h> 66#endif 67 68#include <vm/vm.h> /* for vtophys */ 69 70#include <dev/mii/mii.h> 71#include <dev/mii/miivar.h> 72 73#include <dev/pci/pcireg.h> 74#include <dev/pci/pcivar.h> 75#include <dev/pci/pcidevs.h> 76 77#define DC_USEIOSPACE 78 79#include <dev/ic/dcreg.h> 80 81/* 82 * Various supported device vendors/types and their names. 83 */ 84struct dc_type dc_devs[] = { 85 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 86 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9100 }, 87 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102 }, 88 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981 }, 89 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983 }, 90 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A }, 91 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713 }, 92 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98715 }, 93 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98727 }, 94 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_98713 }, 95 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNIC }, 96 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_PNICII }, 97 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN1217 }, 98 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 99 { 0, 0 } 100}; 101 102int dc_pci_match __P((struct device *, void *, void *)); 103void dc_pci_attach __P((struct device *, struct device *, void *)); 104void dc_pci_acpi __P((struct device *, void *)); 105 106extern void dc_eeprom_width __P((struct dc_softc *)); 107extern void dc_read_srom __P((struct dc_softc *, int)); 108extern void dc_parse_21143_srom __P((struct dc_softc *)); 109 110/* 111 * Probe for a 21143 or clone chip. Check the PCI vendor and device 112 * IDs against our list and return a device name if we find a match. 113 */ 114int 115dc_pci_match(parent, match, aux) 116 struct device *parent; 117 void *match, *aux; 118{ 119 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 120 struct dc_type *t; 121 122 for (t = dc_devs; t->dc_vid != 0; t++) { 123 if ((PCI_VENDOR(pa->pa_id) == t->dc_vid) && 124 (PCI_PRODUCT(pa->pa_id) == t->dc_did)) 125 return (1); 126 } 127 return (0); 128} 129 130void dc_pci_acpi(self, aux) 131 struct device *self; 132 void *aux; 133{ 134 struct dc_softc *sc = (struct dc_softc *)self; 135 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 136 pci_chipset_tag_t pc = pa->pa_pc; 137 u_int32_t r, cptr; 138 int unit; 139 140 unit = sc->dc_unit; 141 142 /* Find the location of the capabilities block */ 143 cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF; 144 145 r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF; 146 if (r == 0x01) { 147 148 r = pci_conf_read(pc, pa->pa_tag, cptr + 4); 149 if (r & DC_PSTATE_D3) { 150 u_int32_t iobase, membase, irq; 151 152 /* Save important PCI config data. */ 153 iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO); 154 membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA); 155 irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT); 156 157 /* Reset the power state. */ 158 printf("dc%d: chip is in D%d power mode " 159 "-- setting to D0\n", unit, r & DC_PSTATE_D3); 160 r &= 0xFFFFFFFC; 161 pci_conf_write(pc, pa->pa_tag, cptr + 4, r); 162 163 /* Restore PCI config data. */ 164 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBIO, iobase); 165 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFBMA, membase); 166 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFIT, irq); 167 } 168 } 169 return; 170} 171 172/* 173 * Attach the interface. Allocate softc structures, do ifmedia 174 * setup and ethernet/BPF attach. 175 */ 176void dc_pci_attach(parent, self, aux) 177 struct device *parent, *self; 178 void *aux; 179{ 180 int s; 181 const char *intrstr = NULL; 182 u_int32_t command; 183 struct dc_softc *sc = (struct dc_softc *)self; 184 struct pci_attach_args *pa = aux; 185 pci_chipset_tag_t pc = pa->pa_pc; 186 pci_intr_handle_t ih; 187 bus_addr_t iobase; 188 bus_size_t iosize; 189 u_int32_t revision; 190 int found = 0; 191 192 s = splimp(); 193 sc->dc_unit = sc->sc_dev.dv_unit; 194 195 /* 196 * Handle power management nonsense. 197 */ 198 dc_pci_acpi(self, aux); 199 200 /* 201 * Map control/status registers. 202 */ 203 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 204 command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 205 PCI_COMMAND_MASTER_ENABLE; 206 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 207 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 208 209 sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 210 211#ifdef DC_USEIOSPACE 212 if (!(command & PCI_COMMAND_IO_ENABLE)) { 213 printf(": failed to enable I/O ports\n"); 214 goto fail; 215 } 216 if (pci_io_find(pc, pa->pa_tag, DC_PCI_CFBIO, &iobase, &iosize)) { 217 printf(": can't find I/O space\n"); 218 goto fail; 219 } 220 if (bus_space_map(pa->pa_iot, iobase, iosize, 0, &sc->dc_bhandle)) { 221 printf(": can't map I/O space\n"); 222 goto fail; 223 } 224 sc->dc_btag = pa->pa_iot; 225#else 226 if (!(command & PCI_COMMAND_MEM_ENABLE)) { 227 printf(": failed to enable memory mapping\n"); 228 goto fail; 229 } 230 if (pci_mem_find(pc, pa->pa_tag, DC_PCI_CFBMA, &iobase, &iosize, NULL)){ 231 printf(": can't find mem space\n"); 232 goto fail; 233 } 234 if (bus_space_map(pa->pa_memt, iobase, iosize, 0, &sc->dc_bhandle)) { 235 printf(": can't map mem space\n"); 236 goto fail; 237 } 238 sc->dc_btag = pa->pa_memt; 239#endif 240 241 /* Allocate interrupt */ 242 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, pa->pa_intrline, 243 &ih)) { 244 printf(": couldn't map interrupt\n"); 245 goto fail; 246 } 247 intrstr = pci_intr_string(pc, ih); 248 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc, 249 self->dv_xname); 250 if (sc->sc_ih == NULL) { 251 printf(": couldn't establish interrupt"); 252 if (intrstr != NULL) 253 printf(" at %s", intrstr); 254 printf("\n"); 255 goto fail; 256 } 257 printf(": %s", intrstr); 258 259 /* Need this info to decide on a chip type. */ 260 sc->dc_revision = revision = PCI_REVISION(pa->pa_class); 261 262 switch (PCI_VENDOR(pa->pa_id)) { 263 case PCI_VENDOR_DEC: 264 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DEC_21142) { 265 found = 1; 266 sc->dc_type = DC_TYPE_21143; 267 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 268 sc->dc_flags |= DC_REDUCED_MII_POLL; 269 dc_read_srom(sc, 9); 270 } 271 break; 272 case PCI_VENDOR_DAVICOM: 273 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9100 || 274 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_DAVICOM_DM9102) { 275 found = 1; 276 sc->dc_type = DC_TYPE_DM9102; 277 sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; 278 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; 279 sc->dc_pmode = DC_PMODE_MII; 280 281 /* Increase the latency timer value. */ 282 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT); 283 command &= 0xFFFF00FF; 284 command |= 0x00008000; 285 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFLT, command); 286 } 287 break; 288 case PCI_VENDOR_ADMTEK: 289 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AL981) { 290 found = 1; 291 sc->dc_type = DC_TYPE_AL981; 292 sc->dc_flags |= DC_TX_USE_TX_INTR; 293 sc->dc_flags |= DC_TX_ADMTEK_WAR; 294 sc->dc_pmode = DC_PMODE_MII; 295 } 296 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADMTEK_AN983) { 297 found = 1; 298 sc->dc_type = DC_TYPE_AN983; 299 sc->dc_flags |= DC_TX_USE_TX_INTR; 300 sc->dc_flags |= DC_TX_ADMTEK_WAR; 301 sc->dc_pmode = DC_PMODE_MII; 302 } 303 break; 304 case PCI_VENDOR_MACRONIX: 305 case PCI_VENDOR_ACCTON: 306 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN2242) { 307 found = 1; 308 sc->dc_type = DC_TYPE_AN983; 309 sc->dc_flags |= DC_TX_USE_TX_INTR; 310 sc->dc_flags |= DC_TX_ADMTEK_WAR; 311 sc->dc_pmode = DC_PMODE_MII; 312 } 313 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98713) { 314 found = 1; 315 if (revision < DC_REVISION_98713A) { 316 sc->dc_type = DC_TYPE_98713; 317 } 318 if (revision >= DC_REVISION_98713A) { 319 sc->dc_type = DC_TYPE_98713A; 320 sc->dc_flags |= DC_21143_NWAY; 321 } 322 sc->dc_flags |= DC_REDUCED_MII_POLL; 323 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 324 } 325 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98715 || 326 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ACCTON_EN1217) { 327 found = 1; 328 if (revision >= DC_REVISION_98715AEC_C && 329 revision < DC_REVISION_98725) 330 sc->dc_flags |= DC_128BIT_HASH; 331 sc->dc_type = DC_TYPE_987x5; 332 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 333 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 334 } 335 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_MACRONIX_MX98727) { 336 found = 1; 337 sc->dc_type = DC_TYPE_987x5; 338 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 339 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 340 } 341 break; 342 case PCI_VENDOR_COMPEX: 343 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_COMPEX_98713) { 344 found = 1; 345 if (revision < DC_REVISION_98713A) { 346 sc->dc_type = DC_TYPE_98713; 347 sc->dc_flags |= DC_REDUCED_MII_POLL; 348 } 349 if (revision >= DC_REVISION_98713A) 350 sc->dc_type = DC_TYPE_98713A; 351 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 352 } 353 break; 354 case PCI_VENDOR_LITEON: 355 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNICII) { 356 found = 1; 357 sc->dc_type = DC_TYPE_PNICII; 358 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 359 sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY; 360 sc->dc_flags |= DC_128BIT_HASH; 361 } 362 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LITEON_PNIC) { 363 found = 1; 364 sc->dc_type = DC_TYPE_PNIC; 365 sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS; 366 sc->dc_flags |= DC_PNIC_RX_BUG_WAR; 367 sc->dc_pnic_rx_buf = malloc(DC_RXLEN * 5, M_DEVBUF, 368 M_NOWAIT); 369 if (revision < DC_REVISION_82C169) 370 sc->dc_pmode = DC_PMODE_SYM; 371 } 372 break; 373 case PCI_VENDOR_ASIX: 374 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ASIX_AX88140A) { 375 found = 1; 376 sc->dc_type = DC_TYPE_ASIX; 377 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG; 378 sc->dc_flags |= DC_REDUCED_MII_POLL; 379 sc->dc_pmode = DC_PMODE_MII; 380 } 381 break; 382 } 383 if (found == 0) { 384 /* This shouldn't happen if probe has done it's job... */ 385 printf(": unknown device: %x:%x\n", 386 PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 387 goto fail; 388 } 389 390 /* Save the cache line size. */ 391 if (DC_IS_DAVICOM(sc)) 392 sc->dc_cachesize = 0; 393 else 394 sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag, 395 DC_PCI_CFLT) & 0xFF; 396 397 /* Reset the adapter. */ 398 dc_reset(sc); 399 400 /* Take 21143 out of snooze mode */ 401 if (DC_IS_INTEL(sc)) { 402 command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD); 403 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 404 pci_conf_write(pc, pa->pa_tag, DC_PCI_CFDD, command); 405 } 406 407 /* 408 * If we discover later (in dc_attach) that we have an 409 * MII with no PHY, we need to have the 21143 drive the LEDs. 410 * Except there are some systems like the NEC VersaPro NoteBook PC 411 * which have no LEDs, and twiddling these bits has adverse effects 412 * on them. (I.e. you suddenly can't get a link.) 413 * 414 * If mii_attach() returns an error, we leave the DC_TULIP_LEDS 415 * bit set, else we clear it. Since our dc(4) driver is split into 416 * bus-dependent and bus-independent parts, we must do set this bit 417 * here while we are able to do PCI configuration reads. 418 */ 419 if (DC_IS_INTEL(sc)) { 420 if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033) 421 sc->dc_flags |= DC_TULIP_LEDS; 422 } 423 424 /* 425 * Try to learn something about the supported media. 426 * We know that ASIX and ADMtek and Davicom devices 427 * will *always* be using MII media, so that's a no-brainer. 428 * The tricky ones are the Macronix/PNIC II and the 429 * Intel 21143. 430 */ 431 if (DC_IS_INTEL(sc)) 432 dc_parse_21143_srom(sc); 433 else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) { 434 if (sc->dc_type == DC_TYPE_98713) 435 sc->dc_pmode = DC_PMODE_MII; 436 else 437 sc->dc_pmode = DC_PMODE_SYM; 438 } else if (!sc->dc_pmode) 439 sc->dc_pmode = DC_PMODE_MII; 440 441#ifdef SRM_MEDIA 442 sc->dc_srm_media = 0; 443 444 /* Remember the SRM console media setting */ 445 if (DC_IS_INTEL(sc)) { 446 command = pci_read_config(dev, DC_PCI_CFDD, 4); 447 command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE); 448 switch ((command >> 8) & 0xff) { 449 case 3: 450 sc->dc_srm_media = IFM_10_T; 451 break; 452 case 4: 453 sc->dc_srm_media = IFM_10_T | IFM_FDX; 454 break; 455 case 5: 456 sc->dc_srm_media = IFM_100_TX; 457 break; 458 case 6: 459 sc->dc_srm_media = IFM_100_TX | IFM_FDX; 460 break; 461 } 462 if (sc->dc_srm_media) 463 sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER; 464 } 465#endif 466 dc_eeprom_width(sc); 467 dc_attach(sc); 468 469fail: 470 splx(s); 471} 472 473struct cfattach dc_pci_ca = { 474 sizeof(struct dc_softc), dc_pci_match, dc_pci_attach 475}; 476