atombios_i2c.c revision 1.5 
1/*	$OpenBSD: atombios_i2c.c,v 1.5 2015/04/06 07:38:49 jsg Exp $	*/
2/*
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Alex Deucher
24 *
25 */
26#include <dev/pci/drm/drmP.h>
27#include <dev/pci/drm/radeon_drm.h>
28#include "radeon.h"
29#include "atom.h"
30
31extern void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
32
33#define TARGET_HW_I2C_CLOCK 50
34
35/* these are a limitation of ProcessI2cChannelTransaction not the hw */
36#define ATOM_MAX_HW_I2C_WRITE 2
37#define ATOM_MAX_HW_I2C_READ  255
38
39#ifdef notyet
40static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
41				 u8 slave_addr, u8 flags,
42				 u8 *buf, u8 num)
43{
44	struct drm_device *dev = chan->dev;
45	struct radeon_device *rdev = dev->dev_private;
46	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
47	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
48	unsigned char *base;
49	u16 out = cpu_to_le16(0);
50
51	memset(&args, 0, sizeof(args));
52
53	base = (unsigned char *)rdev->mode_info.atom_context->scratch;
54
55	if (flags & HW_I2C_WRITE) {
56		if (num > ATOM_MAX_HW_I2C_WRITE) {
57			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 2)\n", num);
58			return -EINVAL;
59		}
60		if (buf == NULL)
61			args.ucRegIndex = 0;
62		else
63			args.ucRegIndex = buf[0];
64		if (num)
65			num--;
66		if (num)
67			memcpy(&out, &buf[1], num);
68		args.lpI2CDataOut = cpu_to_le16(out);
69#if 0
70	} else {
71		if (num > ATOM_MAX_HW_I2C_READ) {
72			DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
73			return -EINVAL;
74		}
75#endif
76	}
77
78	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
79	args.ucRegIndex = 0;
80	args.ucTransBytes = num;
81	args.ucSlaveAddr = slave_addr << 1;
82	args.ucLineNumber = chan->rec.i2c_id;
83
84	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
85
86	/* error */
87	if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
88		DRM_DEBUG_KMS("hw_i2c error\n");
89		return -EIO;
90	}
91
92	if (!(flags & HW_I2C_WRITE))
93		radeon_atom_copy_swap(buf, base, num, false);
94
95	return 0;
96}
97
98int radeon_atom_hw_i2c_xfer(struct i2c_controller *i2c_adap,
99			    struct i2c_msg *msgs, int num)
100{
101	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
102	struct i2c_msg *p;
103	int i, remaining, current_count, buffer_offset, max_bytes, ret;
104	u8 flags;
105
106	/* check for bus probe */
107	p = &msgs[0];
108	if ((num == 1) && (p->len == 0)) {
109		ret = radeon_process_i2c_ch(i2c,
110					    p->addr, HW_I2C_WRITE,
111					    NULL, 0);
112		if (ret)
113			return ret;
114		else
115			return num;
116	}
117
118	for (i = 0; i < num; i++) {
119		p = &msgs[i];
120		remaining = p->len;
121		buffer_offset = 0;
122		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
123		if (p->flags & I2C_M_RD) {
124			max_bytes = ATOM_MAX_HW_I2C_READ;
125			flags = HW_I2C_READ;
126		} else {
127			max_bytes = ATOM_MAX_HW_I2C_WRITE;
128			flags = HW_I2C_WRITE;
129		}
130		while (remaining) {
131			if (remaining > max_bytes)
132				current_count = max_bytes;
133			else
134				current_count = remaining;
135			ret = radeon_process_i2c_ch(i2c,
136						    p->addr, flags,
137						    &p->buf[buffer_offset], current_count);
138			if (ret)
139				return ret;
140			remaining -= current_count;
141			buffer_offset += current_count;
142		}
143	}
144
145	return num;
146}
147
148u32 radeon_atom_hw_i2c_func(struct i2c_controller *adap)
149{
150	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
151}
152#endif
153
154