atombios_i2c.c revision 1.4 
1/*	$OpenBSD: atombios_i2c.c,v 1.4 2014/02/10 01:32:13 jsg Exp $	*/
2/*
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Alex Deucher
24 *
25 */
26#include <dev/pci/drm/drmP.h>
27#include <dev/pci/drm/radeon_drm.h>
28#include "radeon.h"
29#include "atom.h"
30
31extern void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
32
33#define TARGET_HW_I2C_CLOCK 50
34
35/* these are a limitation of ProcessI2cChannelTransaction not the hw */
36#define ATOM_MAX_HW_I2C_WRITE 2
37#define ATOM_MAX_HW_I2C_READ  255
38
39int	 radeon_process_i2c_ch(struct radeon_i2c_chan *, u8, u8, u8 *, u8);
40
41int
42radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
43				 u8 slave_addr, u8 flags,
44				 u8 *buf, u8 num)
45{
46	struct drm_device *dev = chan->dev;
47	struct radeon_device *rdev = dev->dev_private;
48	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
49	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
50	unsigned char *base;
51	u16 out = cpu_to_le16(0);
52
53	memset(&args, 0, sizeof(args));
54
55	base = (unsigned char *)rdev->mode_info.atom_context->scratch;
56
57	if (flags & HW_I2C_WRITE) {
58		if (num > ATOM_MAX_HW_I2C_WRITE) {
59			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 2)\n", num);
60			return -EINVAL;
61		}
62		if (buf == NULL)
63			args.ucRegIndex = 0;
64		else
65			args.ucRegIndex = buf[0];
66		if (num)
67			num--;
68		if (num)
69			memcpy(&out, &buf[1], num);
70		args.lpI2CDataOut = cpu_to_le16(out);
71#if 0
72	} else {
73		if (num > ATOM_MAX_HW_I2C_READ) {
74			DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
75			return -EINVAL;
76		}
77#endif
78	}
79
80	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
81	args.ucRegIndex = 0;
82	args.ucTransBytes = num;
83	args.ucSlaveAddr = slave_addr << 1;
84	args.ucLineNumber = chan->rec.i2c_id;
85
86	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
87
88	/* error */
89	if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
90		DRM_DEBUG_KMS("hw_i2c error\n");
91		return -EIO;
92	}
93
94	if (!(flags & HW_I2C_WRITE))
95		radeon_atom_copy_swap(buf, base, num, false);
96
97	return 0;
98}
99
100#ifdef notyet
101int radeon_atom_hw_i2c_xfer(struct i2c_controller *i2c_adap,
102			    struct i2c_msg *msgs, int num)
103{
104	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
105	struct i2c_msg *p;
106	int i, remaining, current_count, buffer_offset, max_bytes, ret;
107	u8 flags;
108
109	/* check for bus probe */
110	p = &msgs[0];
111	if ((num == 1) && (p->len == 0)) {
112		ret = radeon_process_i2c_ch(i2c,
113					    p->addr, HW_I2C_WRITE,
114					    NULL, 0);
115		if (ret)
116			return ret;
117		else
118			return num;
119	}
120
121	for (i = 0; i < num; i++) {
122		p = &msgs[i];
123		remaining = p->len;
124		buffer_offset = 0;
125		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
126		if (p->flags & I2C_M_RD) {
127			max_bytes = ATOM_MAX_HW_I2C_READ;
128			flags = HW_I2C_READ;
129		} else {
130			max_bytes = ATOM_MAX_HW_I2C_WRITE;
131			flags = HW_I2C_WRITE;
132		}
133		while (remaining) {
134			if (remaining > max_bytes)
135				current_count = max_bytes;
136			else
137				current_count = remaining;
138			ret = radeon_process_i2c_ch(i2c,
139						    p->addr, flags,
140						    &p->buf[buffer_offset], current_count);
141			if (ret)
142				return ret;
143			remaining -= current_count;
144			buffer_offset += current_count;
145		}
146	}
147
148	return num;
149}
150
151u32 radeon_atom_hw_i2c_func(struct i2c_controller *adap)
152{
153	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
154}
155#endif
156
157