atombios_i2c.c revision 1.11 
1/*
2 * Copyright 2011 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Alex Deucher
23 *
24 */
25#include <drm/drmP.h>
26#include <drm/radeon_drm.h>
27#include "radeon.h"
28#include "atom.h"
29
30#define TARGET_HW_I2C_CLOCK 50
31
32/* these are a limitation of ProcessI2cChannelTransaction not the hw */
33#define ATOM_MAX_HW_I2C_WRITE 3
34#define ATOM_MAX_HW_I2C_READ  255
35
36static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
37				 u8 slave_addr, u8 flags,
38				 u8 *buf, u8 num)
39{
40	struct drm_device *dev = chan->dev;
41	struct radeon_device *rdev = dev->dev_private;
42	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
43	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
44	unsigned char *base;
45	u16 out = cpu_to_le16(0);
46	int r = 0;
47
48	memset(&args, 0, sizeof(args));
49
50	mutex_lock(&chan->mutex);
51	mutex_lock(&rdev->mode_info.atom_context->scratch_mutex);
52
53	base = (unsigned char *)rdev->mode_info.atom_context->scratch;
54
55	if (flags & HW_I2C_WRITE) {
56		if (num > ATOM_MAX_HW_I2C_WRITE) {
57			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
58			r = -EINVAL;
59			goto done;
60		}
61		if (buf == NULL)
62			args.ucRegIndex = 0;
63		else
64			args.ucRegIndex = buf[0];
65		if (num)
66			num--;
67		if (num)
68			memcpy(&out, &buf[1], num);
69		args.lpI2CDataOut = cpu_to_le16(out);
70	} else {
71#if 0
72		/*
73		 * gcc 4.2 gives 'warning: comparison is always false
74		 * due to limited range of data type'
75		 */
76		if (num > ATOM_MAX_HW_I2C_READ) {
77			DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
78			r = -EINVAL;
79			goto done;
80		}
81#endif
82		args.ucRegIndex = 0;
83		args.lpI2CDataOut = 0;
84	}
85
86	args.ucFlag = flags;
87	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
88	args.ucTransBytes = num;
89	args.ucSlaveAddr = slave_addr << 1;
90	args.ucLineNumber = chan->rec.i2c_id;
91
92	atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args);
93
94	/* error */
95	if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
96		DRM_DEBUG_KMS("hw_i2c error\n");
97		r = -EIO;
98		goto done;
99	}
100
101	if (!(flags & HW_I2C_WRITE))
102		radeon_atom_copy_swap(buf, base, num, false);
103
104done:
105	mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex);
106	mutex_unlock(&chan->mutex);
107
108	return r;
109}
110
111int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
112			    struct i2c_msg *msgs, int num)
113{
114	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
115	struct i2c_msg *p;
116	int i, remaining, current_count, buffer_offset, max_bytes, ret;
117	u8 flags;
118
119	/* check for bus probe */
120	p = &msgs[0];
121	if ((num == 1) && (p->len == 0)) {
122		ret = radeon_process_i2c_ch(i2c,
123					    p->addr, HW_I2C_WRITE,
124					    NULL, 0);
125		if (ret)
126			return ret;
127		else
128			return num;
129	}
130
131	for (i = 0; i < num; i++) {
132		p = &msgs[i];
133		remaining = p->len;
134		buffer_offset = 0;
135		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
136		if (p->flags & I2C_M_RD) {
137			max_bytes = ATOM_MAX_HW_I2C_READ;
138			flags = HW_I2C_READ;
139		} else {
140			max_bytes = ATOM_MAX_HW_I2C_WRITE;
141			flags = HW_I2C_WRITE;
142		}
143		while (remaining) {
144			if (remaining > max_bytes)
145				current_count = max_bytes;
146			else
147				current_count = remaining;
148			ret = radeon_process_i2c_ch(i2c,
149						    p->addr, flags,
150						    &p->buf[buffer_offset], current_count);
151			if (ret)
152				return ret;
153			remaining -= current_count;
154			buffer_offset += current_count;
155		}
156	}
157
158	return num;
159}
160
161u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
162{
163	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
164}
165
166