intel_vga.c revision 1.5
1// SPDX-License-Identifier: MIT 2/* 3 * Copyright �� 2019 Intel Corporation 4 */ 5 6#include <linux/pci.h> 7#include <linux/vgaarb.h> 8 9#include <drm/i915_drm.h> 10#include <video/vga.h> 11 12#include "i915_drv.h" 13#include "intel_de.h" 14#include "intel_vga.h" 15 16static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915) 17{ 18 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) 19 return VLV_VGACNTRL; 20 else if (DISPLAY_VER(i915) >= 5) 21 return CPU_VGACNTRL; 22 else 23 return VGACNTRL; 24} 25 26/* Disable the VGA plane that we never use */ 27void intel_vga_disable(struct drm_i915_private *dev_priv) 28{ 29 struct pci_dev *pdev = dev_priv->drm.pdev; 30 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv); 31 u8 sr1; 32 33 if (intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE) 34 return; 35 36 /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ 37 vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); 38#ifdef __linux__ 39 outb(0x01, VGA_SEQ_I); 40 sr1 = inb(VGA_SEQ_D); 41 outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); 42#else 43 outb(VGA_SEQ_I, 0x01); 44 sr1 = inb(VGA_SEQ_D); 45 outb(VGA_SEQ_D, sr1 | VGA_SR01_SCREEN_OFF); 46#endif 47 vga_put(pdev, VGA_RSRC_LEGACY_IO); 48 udelay(300); 49 50 intel_de_write(dev_priv, vga_reg, VGA_DISP_DISABLE); 51 intel_de_posting_read(dev_priv, vga_reg); 52} 53 54void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv) 55{ 56 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv); 57 58 if (!(intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE)) { 59 drm_dbg_kms(&dev_priv->drm, 60 "Something enabled VGA plane, disabling it\n"); 61 intel_vga_disable(dev_priv); 62 } 63} 64 65void intel_vga_redisable(struct drm_i915_private *i915) 66{ 67 intel_wakeref_t wakeref; 68 69 /* 70 * This function can be called both from intel_modeset_setup_hw_state or 71 * at a very early point in our resume sequence, where the power well 72 * structures are not yet restored. Since this function is at a very 73 * paranoid "someone might have enabled VGA while we were not looking" 74 * level, just check if the power well is enabled instead of trying to 75 * follow the "don't touch the power well if we don't need it" policy 76 * the rest of the driver uses. 77 */ 78 wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA); 79 if (!wakeref) 80 return; 81 82 intel_vga_redisable_power_on(i915); 83 84 intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref); 85} 86 87void intel_vga_reset_io_mem(struct drm_i915_private *i915) 88{ 89 struct pci_dev *pdev = i915->drm.pdev; 90 91 /* 92 * After we re-enable the power well, if we touch VGA register 0x3d5 93 * we'll get unclaimed register interrupts. This stops after we write 94 * anything to the VGA MSR register. The vgacon module uses this 95 * register all the time, so if we unbind our driver and, as a 96 * consequence, bind vgacon, we'll get stuck in an infinite loop at 97 * console_unlock(). So make here we touch the VGA MSR register, making 98 * sure vgacon can keep working normally without triggering interrupts 99 * and error messages. 100 */ 101 vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); 102#ifdef __linux__ 103 outb(inb(VGA_MIS_R), VGA_MIS_W); 104#else 105 outb(VGA_MIS_W, inb(VGA_MIS_R)); 106#endif 107 vga_put(pdev, VGA_RSRC_LEGACY_IO); 108} 109 110static int 111intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode) 112{ 113 unsigned int reg = DISPLAY_VER(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; 114 u16 gmch_ctrl; 115 116 if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) { 117 drm_err(&i915->drm, "failed to read control word\n"); 118 return -EIO; 119 } 120 121 if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode) 122 return 0; 123 124 if (enable_decode) 125 gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE; 126 else 127 gmch_ctrl |= INTEL_GMCH_VGA_DISABLE; 128 129 if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) { 130 drm_err(&i915->drm, "failed to write control word\n"); 131 return -EIO; 132 } 133 134 return 0; 135} 136 137static unsigned int 138intel_vga_set_decode(struct pci_dev *pdev, bool enable_decode) 139{ 140 STUB(); 141 return 0; 142#ifdef notyet 143 struct drm_i915_private *i915 = pdev_to_i915(pdev); 144 145 intel_vga_set_state(i915, enable_decode); 146 147 if (enable_decode) 148 return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | 149 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; 150 else 151 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; 152#endif 153} 154 155int intel_vga_register(struct drm_i915_private *i915) 156{ 157 158 struct pci_dev *pdev = i915->drm.pdev; 159 int ret; 160 161 /* 162 * If we have > 1 VGA cards, then we need to arbitrate access to the 163 * common VGA resources. 164 * 165 * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA), 166 * then we do not take part in VGA arbitration and the 167 * vga_client_register() fails with -ENODEV. 168 */ 169 ret = vga_client_register(pdev, intel_vga_set_decode); 170 if (ret && ret != -ENODEV) 171 return ret; 172 173 return 0; 174} 175 176void intel_vga_unregister(struct drm_i915_private *i915) 177{ 178 struct pci_dev *pdev = i915->drm.pdev; 179 180 vga_client_unregister(pdev); 181} 182