intel_vga.c revision 1.2 
1// SPDX-License-Identifier: MIT
2/*
3 * Copyright �� 2019 Intel Corporation
4 */
5
6#include <linux/pci.h>
7#include <linux/vgaarb.h>
8
9#include <drm/i915_drm.h>
10
11#include "i915_drv.h"
12#include "intel_de.h"
13#include "intel_vga.h"
14
15static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915)
16{
17	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
18		return VLV_VGACNTRL;
19	else if (INTEL_GEN(i915) >= 5)
20		return CPU_VGACNTRL;
21	else
22		return VGACNTRL;
23}
24
25/* Disable the VGA plane that we never use */
26void intel_vga_disable(struct drm_i915_private *dev_priv)
27{
28	struct pci_dev *pdev = dev_priv->drm.pdev;
29	i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
30	u8 sr1;
31
32	/* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
33	vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
34#ifdef __linux__
35	outb(SR01, VGA_SR_INDEX);
36	sr1 = inb(VGA_SR_DATA);
37	outb(sr1 | 1 << 5, VGA_SR_DATA);
38#else
39	outb(VGA_SR_INDEX, SR01);
40	sr1 = inb(VGA_SR_DATA);
41	outb(VGA_SR_DATA, sr1 | 1 << 5);
42#endif
43	vga_put(pdev, VGA_RSRC_LEGACY_IO);
44	udelay(300);
45
46	intel_de_write(dev_priv, vga_reg, VGA_DISP_DISABLE);
47	intel_de_posting_read(dev_priv, vga_reg);
48}
49
50void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
51{
52	i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
53
54	if (!(intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE)) {
55		drm_dbg_kms(&dev_priv->drm,
56			    "Something enabled VGA plane, disabling it\n");
57		intel_vga_disable(dev_priv);
58	}
59}
60
61void intel_vga_redisable(struct drm_i915_private *i915)
62{
63	intel_wakeref_t wakeref;
64
65	/*
66	 * This function can be called both from intel_modeset_setup_hw_state or
67	 * at a very early point in our resume sequence, where the power well
68	 * structures are not yet restored. Since this function is at a very
69	 * paranoid "someone might have enabled VGA while we were not looking"
70	 * level, just check if the power well is enabled instead of trying to
71	 * follow the "don't touch the power well if we don't need it" policy
72	 * the rest of the driver uses.
73	 */
74	wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA);
75	if (!wakeref)
76		return;
77
78	intel_vga_redisable_power_on(i915);
79
80	intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref);
81}
82
83void intel_vga_reset_io_mem(struct drm_i915_private *i915)
84{
85	struct pci_dev *pdev = i915->drm.pdev;
86
87	/*
88	 * After we re-enable the power well, if we touch VGA register 0x3d5
89	 * we'll get unclaimed register interrupts. This stops after we write
90	 * anything to the VGA MSR register. The vgacon module uses this
91	 * register all the time, so if we unbind our driver and, as a
92	 * consequence, bind vgacon, we'll get stuck in an infinite loop at
93	 * console_unlock(). So make here we touch the VGA MSR register, making
94	 * sure vgacon can keep working normally without triggering interrupts
95	 * and error messages.
96	 */
97	vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
98	outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
99	vga_put(pdev, VGA_RSRC_LEGACY_IO);
100}
101
102static int
103intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
104{
105	unsigned int reg = INTEL_GEN(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
106	u16 gmch_ctrl;
107
108	if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) {
109		drm_err(&i915->drm, "failed to read control word\n");
110		return -EIO;
111	}
112
113	if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
114		return 0;
115
116	if (enable_decode)
117		gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
118	else
119		gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
120
121	if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) {
122		drm_err(&i915->drm, "failed to write control word\n");
123		return -EIO;
124	}
125
126	return 0;
127}
128
129static unsigned int
130intel_vga_set_decode(void *cookie, bool enable_decode)
131{
132	STUB();
133	return 0;
134#ifdef notyet
135	struct drm_i915_private *i915 = cookie;
136
137	intel_vga_set_state(i915, enable_decode);
138
139	if (enable_decode)
140		return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
141		       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
142	else
143		return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
144#endif
145}
146
147int intel_vga_register(struct drm_i915_private *i915)
148{
149	struct pci_dev *pdev = i915->drm.pdev;
150	int ret;
151
152	/*
153	 * If we have > 1 VGA cards, then we need to arbitrate access to the
154	 * common VGA resources.
155	 *
156	 * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
157	 * then we do not take part in VGA arbitration and the
158	 * vga_client_register() fails with -ENODEV.
159	 */
160	ret = vga_client_register(pdev, i915, NULL, intel_vga_set_decode);
161	if (ret && ret != -ENODEV)
162		return ret;
163
164	return 0;
165}
166
167void intel_vga_unregister(struct drm_i915_private *i915)
168{
169	struct pci_dev *pdev = i915->drm.pdev;
170
171	vga_client_register(pdev, NULL, NULL, NULL);
172}
173