intel_bios.c revision 1.12
1/* 2 * Copyright �� 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28#include <drm/display/drm_dp_helper.h> 29#include <drm/display/drm_dsc_helper.h> 30#include <drm/drm_edid.h> 31 32#include "i915_drv.h" 33#include "i915_reg.h" 34#include "intel_display.h" 35#include "intel_display_types.h" 36#include "intel_gmbus.h" 37 38#define _INTEL_BIOS_PRIVATE 39#include "intel_vbt_defs.h" 40 41/** 42 * DOC: Video BIOS Table (VBT) 43 * 44 * The Video BIOS Table, or VBT, provides platform and board specific 45 * configuration information to the driver that is not discoverable or available 46 * through other means. The configuration is mostly related to display 47 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 48 * the PCI ROM. 49 * 50 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 51 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 52 * contain the actual configuration information. The VBT Header, and thus the 53 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 54 * BDB Header. The data blocks are concatenated after the BDB Header. The data 55 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 56 * data. (Block 53, the MIPI Sequence Block is an exception.) 57 * 58 * The driver parses the VBT during load. The relevant information is stored in 59 * driver private data for ease of use, and the actual VBT is not read after 60 * that. 61 */ 62 63/* Wrapper for VBT child device config */ 64struct intel_bios_encoder_data { 65 struct drm_i915_private *i915; 66 67 struct child_device_config child; 68 struct dsc_compression_parameters_entry *dsc; 69 struct list_head node; 70}; 71 72#define SLAVE_ADDR1 0x70 73#define SLAVE_ADDR2 0x72 74 75/* Get BDB block size given a pointer to Block ID. */ 76static u32 _get_blocksize(const u8 *block_base) 77{ 78 /* The MIPI Sequence Block v3+ has a separate size field. */ 79 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 80 return *((const u32 *)(block_base + 4)); 81 else 82 return *((const u16 *)(block_base + 1)); 83} 84 85/* Get BDB block size give a pointer to data after Block ID and Block Size. */ 86static u32 get_blocksize(const void *block_data) 87{ 88 return _get_blocksize(block_data - 3); 89} 90 91static const void * 92find_raw_section(const void *_bdb, enum bdb_block_id section_id) 93{ 94 const struct bdb_header *bdb = _bdb; 95 const u8 *base = _bdb; 96 int index = 0; 97 u32 total, current_size; 98 enum bdb_block_id current_id; 99 100 /* skip to first section */ 101 index += bdb->header_size; 102 total = bdb->bdb_size; 103 104 /* walk the sections looking for section_id */ 105 while (index + 3 < total) { 106 current_id = *(base + index); 107 current_size = _get_blocksize(base + index); 108 index += 3; 109 110 if (index + current_size > total) 111 return NULL; 112 113 if (current_id == section_id) 114 return base + index; 115 116 index += current_size; 117 } 118 119 return NULL; 120} 121 122/* 123 * Offset from the start of BDB to the start of the 124 * block data (just past the block header). 125 */ 126static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id) 127{ 128 const void *block; 129 130 block = find_raw_section(bdb, section_id); 131 if (!block) 132 return 0; 133 134 return block - bdb; 135} 136 137struct bdb_block_entry { 138 struct list_head node; 139 enum bdb_block_id section_id; 140 u8 data[]; 141}; 142 143static const void * 144bdb_find_section(struct drm_i915_private *i915, 145 enum bdb_block_id section_id) 146{ 147 struct bdb_block_entry *entry; 148 149 list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) { 150 if (entry->section_id == section_id) 151 return entry->data + 3; 152 } 153 154 return NULL; 155} 156 157static const struct { 158 enum bdb_block_id section_id; 159 size_t min_size; 160} bdb_blocks[] = { 161 { .section_id = BDB_GENERAL_FEATURES, 162 .min_size = sizeof(struct bdb_general_features), }, 163 { .section_id = BDB_GENERAL_DEFINITIONS, 164 .min_size = sizeof(struct bdb_general_definitions), }, 165 { .section_id = BDB_PSR, 166 .min_size = sizeof(struct bdb_psr), }, 167 { .section_id = BDB_DRIVER_FEATURES, 168 .min_size = sizeof(struct bdb_driver_features), }, 169 { .section_id = BDB_SDVO_LVDS_OPTIONS, 170 .min_size = sizeof(struct bdb_sdvo_lvds_options), }, 171 { .section_id = BDB_SDVO_PANEL_DTDS, 172 .min_size = sizeof(struct bdb_sdvo_panel_dtds), }, 173 { .section_id = BDB_EDP, 174 .min_size = sizeof(struct bdb_edp), }, 175 { .section_id = BDB_LVDS_OPTIONS, 176 .min_size = sizeof(struct bdb_lvds_options), }, 177 /* 178 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS, 179 * so keep the two ordered. 180 */ 181 { .section_id = BDB_LVDS_LFP_DATA_PTRS, 182 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), }, 183 { .section_id = BDB_LVDS_LFP_DATA, 184 .min_size = 0, /* special case */ }, 185 { .section_id = BDB_LVDS_BACKLIGHT, 186 .min_size = sizeof(struct bdb_lfp_backlight_data), }, 187 { .section_id = BDB_LFP_POWER, 188 .min_size = sizeof(struct bdb_lfp_power), }, 189 { .section_id = BDB_MIPI_CONFIG, 190 .min_size = sizeof(struct bdb_mipi_config), }, 191 { .section_id = BDB_MIPI_SEQUENCE, 192 .min_size = sizeof(struct bdb_mipi_sequence) }, 193 { .section_id = BDB_COMPRESSION_PARAMETERS, 194 .min_size = sizeof(struct bdb_compression_parameters), }, 195 { .section_id = BDB_GENERIC_DTD, 196 .min_size = sizeof(struct bdb_generic_dtd), }, 197}; 198 199static size_t lfp_data_min_size(struct drm_i915_private *i915) 200{ 201 const struct bdb_lvds_lfp_data_ptrs *ptrs; 202 size_t size; 203 204 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 205 if (!ptrs) 206 return 0; 207 208 size = sizeof(struct bdb_lvds_lfp_data); 209 if (ptrs->panel_name.table_size) 210 size = max(size, ptrs->panel_name.offset + 211 sizeof(struct bdb_lvds_lfp_data_tail)); 212 213 return size; 214} 215 216static bool validate_lfp_data_ptrs(const void *bdb, 217 const struct bdb_lvds_lfp_data_ptrs *ptrs) 218{ 219 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size; 220 int data_block_size, lfp_data_size; 221 const void *data_block; 222 int i; 223 224 data_block = find_raw_section(bdb, BDB_LVDS_LFP_DATA); 225 if (!data_block) 226 return false; 227 228 data_block_size = get_blocksize(data_block); 229 if (data_block_size == 0) 230 return false; 231 232 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */ 233 if (ptrs->lvds_entries != 3) 234 return false; 235 236 fp_timing_size = ptrs->ptr[0].fp_timing.table_size; 237 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size; 238 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size; 239 panel_name_size = ptrs->panel_name.table_size; 240 241 /* fp_timing has variable size */ 242 if (fp_timing_size < 32 || 243 dvo_timing_size != sizeof(struct lvds_dvo_timing) || 244 panel_pnp_id_size != sizeof(struct lvds_pnp_id)) 245 return false; 246 247 /* panel_name is not present in old VBTs */ 248 if (panel_name_size != 0 && 249 panel_name_size != sizeof(struct lvds_lfp_panel_name)) 250 return false; 251 252 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset; 253 if (16 * lfp_data_size > data_block_size) 254 return false; 255 256 /* make sure the table entries have uniform size */ 257 for (i = 1; i < 16; i++) { 258 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size || 259 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size || 260 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size) 261 return false; 262 263 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size || 264 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size || 265 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size) 266 return false; 267 } 268 269 /* 270 * Except for vlv/chv machines all real VBTs seem to have 6 271 * unaccounted bytes in the fp_timing table. And it doesn't 272 * appear to be a really intentional hole as the fp_timing 273 * 0xffff terminator is always within those 6 missing bytes. 274 */ 275 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size) 276 fp_timing_size += 6; 277 278 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size) 279 return false; 280 281 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset || 282 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset || 283 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size) 284 return false; 285 286 /* make sure the tables fit inside the data block */ 287 for (i = 0; i < 16; i++) { 288 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size || 289 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size || 290 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size) 291 return false; 292 } 293 294 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size) 295 return false; 296 297 /* make sure fp_timing terminators are present at expected locations */ 298 for (i = 0; i < 16; i++) { 299 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset + 300 fp_timing_size - 2; 301 302 if (*t != 0xffff) 303 return false; 304 } 305 306 return true; 307} 308 309/* make the data table offsets relative to the data block */ 310static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block) 311{ 312 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block; 313 u32 offset; 314 int i; 315 316 offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA); 317 318 for (i = 0; i < 16; i++) { 319 if (ptrs->ptr[i].fp_timing.offset < offset || 320 ptrs->ptr[i].dvo_timing.offset < offset || 321 ptrs->ptr[i].panel_pnp_id.offset < offset) 322 return false; 323 324 ptrs->ptr[i].fp_timing.offset -= offset; 325 ptrs->ptr[i].dvo_timing.offset -= offset; 326 ptrs->ptr[i].panel_pnp_id.offset -= offset; 327 } 328 329 if (ptrs->panel_name.table_size) { 330 if (ptrs->panel_name.offset < offset) 331 return false; 332 333 ptrs->panel_name.offset -= offset; 334 } 335 336 return validate_lfp_data_ptrs(bdb, ptrs); 337} 338 339static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table, 340 int table_size, int total_size) 341{ 342 if (total_size < table_size) 343 return total_size; 344 345 table->table_size = table_size; 346 table->offset = total_size - table_size; 347 348 return total_size - table_size; 349} 350 351static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next, 352 const struct lvds_lfp_data_ptr_table *prev, 353 int size) 354{ 355 next->table_size = prev->table_size; 356 next->offset = prev->offset + size; 357} 358 359static void *generate_lfp_data_ptrs(struct drm_i915_private *i915, 360 const void *bdb) 361{ 362 int i, size, table_size, block_size, offset, fp_timing_size; 363 struct bdb_lvds_lfp_data_ptrs *ptrs; 364 const void *block; 365 void *ptrs_block; 366 367 /* 368 * The hardcoded fp_timing_size is only valid for 369 * modernish VBTs. All older VBTs definitely should 370 * include block 41 and thus we don't need to 371 * generate one. 372 */ 373 if (i915->display.vbt.version < 155) 374 return NULL; 375 376 fp_timing_size = 38; 377 378 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA); 379 if (!block) 380 return NULL; 381 382 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n"); 383 384 block_size = get_blocksize(block); 385 386 size = fp_timing_size + sizeof(struct lvds_dvo_timing) + 387 sizeof(struct lvds_pnp_id); 388 if (size * 16 > block_size) 389 return NULL; 390 391 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL); 392 if (!ptrs_block) 393 return NULL; 394 395 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS; 396 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs); 397 ptrs = ptrs_block + 3; 398 399 table_size = sizeof(struct lvds_pnp_id); 400 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size); 401 402 table_size = sizeof(struct lvds_dvo_timing); 403 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size); 404 405 table_size = fp_timing_size; 406 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size); 407 408 if (ptrs->ptr[0].fp_timing.table_size) 409 ptrs->lvds_entries++; 410 if (ptrs->ptr[0].dvo_timing.table_size) 411 ptrs->lvds_entries++; 412 if (ptrs->ptr[0].panel_pnp_id.table_size) 413 ptrs->lvds_entries++; 414 415 if (size != 0 || ptrs->lvds_entries != 3) { 416 kfree(ptrs_block); 417 return NULL; 418 } 419 420 size = fp_timing_size + sizeof(struct lvds_dvo_timing) + 421 sizeof(struct lvds_pnp_id); 422 for (i = 1; i < 16; i++) { 423 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size); 424 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size); 425 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size); 426 } 427 428 table_size = sizeof(struct lvds_lfp_panel_name); 429 430 if (16 * (size + table_size) <= block_size) { 431 ptrs->panel_name.table_size = table_size; 432 ptrs->panel_name.offset = size * 16; 433 } 434 435 offset = block - bdb; 436 437 for (i = 0; i < 16; i++) { 438 ptrs->ptr[i].fp_timing.offset += offset; 439 ptrs->ptr[i].dvo_timing.offset += offset; 440 ptrs->ptr[i].panel_pnp_id.offset += offset; 441 } 442 443 if (ptrs->panel_name.table_size) 444 ptrs->panel_name.offset += offset; 445 446 return ptrs_block; 447} 448 449static void 450init_bdb_block(struct drm_i915_private *i915, 451 const void *bdb, enum bdb_block_id section_id, 452 size_t min_size) 453{ 454 struct bdb_block_entry *entry; 455 void *temp_block = NULL; 456 const void *block; 457 size_t block_size; 458 459 block = find_raw_section(bdb, section_id); 460 461 /* Modern VBTs lack the LFP data table pointers block, make one up */ 462 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) { 463 temp_block = generate_lfp_data_ptrs(i915, bdb); 464 if (temp_block) 465 block = temp_block + 3; 466 } 467 if (!block) 468 return; 469 470 drm_WARN(&i915->drm, min_size == 0, 471 "Block %d min_size is zero\n", section_id); 472 473 block_size = get_blocksize(block); 474 475 /* 476 * Version number and new block size are considered 477 * part of the header for MIPI sequenece block v3+. 478 */ 479 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3) 480 block_size += 5; 481 482 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3), 483 GFP_KERNEL); 484 if (!entry) { 485 kfree(temp_block); 486 return; 487 } 488 489 entry->section_id = section_id; 490 memcpy(entry->data, block - 3, block_size + 3); 491 492 kfree(temp_block); 493 494 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n", 495 section_id, block_size, min_size); 496 497 if (section_id == BDB_LVDS_LFP_DATA_PTRS && 498 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) { 499 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n"); 500 kfree(entry); 501 return; 502 } 503 504 list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks); 505} 506 507static void init_bdb_blocks(struct drm_i915_private *i915, 508 const void *bdb) 509{ 510 int i; 511 512 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) { 513 enum bdb_block_id section_id = bdb_blocks[i].section_id; 514 size_t min_size = bdb_blocks[i].min_size; 515 516 if (section_id == BDB_LVDS_LFP_DATA) 517 min_size = lfp_data_min_size(i915); 518 519 init_bdb_block(i915, bdb, section_id, min_size); 520 } 521} 522 523static void 524fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 525 const struct lvds_dvo_timing *dvo_timing) 526{ 527 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 528 dvo_timing->hactive_lo; 529 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 530 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 531 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 532 ((dvo_timing->hsync_pulse_width_hi << 8) | 533 dvo_timing->hsync_pulse_width_lo); 534 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 535 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 536 537 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 538 dvo_timing->vactive_lo; 539 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 540 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 541 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 542 ((dvo_timing->vsync_pulse_width_hi << 4) | 543 dvo_timing->vsync_pulse_width_lo); 544 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 545 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 546 panel_fixed_mode->clock = dvo_timing->clock * 10; 547 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 548 549 if (dvo_timing->hsync_positive) 550 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 551 else 552 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 553 554 if (dvo_timing->vsync_positive) 555 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 556 else 557 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 558 559 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 560 dvo_timing->himage_lo; 561 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 562 dvo_timing->vimage_lo; 563 564 /* Some VBTs have bogus h/vtotal values */ 565 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 566 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 567 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 568 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 569 570 drm_mode_set_name(panel_fixed_mode); 571} 572 573static const struct lvds_dvo_timing * 574get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data, 575 const struct bdb_lvds_lfp_data_ptrs *ptrs, 576 int index) 577{ 578 return (const void *)data + ptrs->ptr[index].dvo_timing.offset; 579} 580 581static const struct lvds_fp_timing * 582get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data, 583 const struct bdb_lvds_lfp_data_ptrs *ptrs, 584 int index) 585{ 586 return (const void *)data + ptrs->ptr[index].fp_timing.offset; 587} 588 589static const struct lvds_pnp_id * 590get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data, 591 const struct bdb_lvds_lfp_data_ptrs *ptrs, 592 int index) 593{ 594 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset; 595} 596 597static const struct bdb_lvds_lfp_data_tail * 598get_lfp_data_tail(const struct bdb_lvds_lfp_data *data, 599 const struct bdb_lvds_lfp_data_ptrs *ptrs) 600{ 601 if (ptrs->panel_name.table_size) 602 return (const void *)data + ptrs->panel_name.offset; 603 else 604 return NULL; 605} 606 607static void dump_pnp_id(struct drm_i915_private *i915, 608 const struct lvds_pnp_id *pnp_id, 609 const char *name) 610{ 611 u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name); 612 char vend[4]; 613 614 drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n", 615 name, drm_edid_decode_mfg_id(mfg_name, vend), 616 pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial, 617 pnp_id->mfg_week, pnp_id->mfg_year + 1990); 618} 619 620static int opregion_get_panel_type(struct drm_i915_private *i915, 621 const struct intel_bios_encoder_data *devdata, 622 const struct drm_edid *drm_edid, bool use_fallback) 623{ 624 return intel_opregion_get_panel_type(i915); 625} 626 627static int vbt_get_panel_type(struct drm_i915_private *i915, 628 const struct intel_bios_encoder_data *devdata, 629 const struct drm_edid *drm_edid, bool use_fallback) 630{ 631 const struct bdb_lvds_options *lvds_options; 632 633 lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS); 634 if (!lvds_options) 635 return -1; 636 637 if (lvds_options->panel_type > 0xf && 638 lvds_options->panel_type != 0xff) { 639 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n", 640 lvds_options->panel_type); 641 return -1; 642 } 643 644 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2) 645 return lvds_options->panel_type2; 646 647 drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1); 648 649 return lvds_options->panel_type; 650} 651 652static int pnpid_get_panel_type(struct drm_i915_private *i915, 653 const struct intel_bios_encoder_data *devdata, 654 const struct drm_edid *drm_edid, bool use_fallback) 655{ 656 const struct bdb_lvds_lfp_data *data; 657 const struct bdb_lvds_lfp_data_ptrs *ptrs; 658 const struct lvds_pnp_id *edid_id; 659 struct lvds_pnp_id edid_id_nodate; 660 const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */ 661 int i, best = -1; 662 663 if (!edid) 664 return -1; 665 666 edid_id = (const void *)&edid->mfg_id[0]; 667 668 edid_id_nodate = *edid_id; 669 edid_id_nodate.mfg_week = 0; 670 edid_id_nodate.mfg_year = 0; 671 672 dump_pnp_id(i915, edid_id, "EDID"); 673 674 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 675 if (!ptrs) 676 return -1; 677 678 data = bdb_find_section(i915, BDB_LVDS_LFP_DATA); 679 if (!data) 680 return -1; 681 682 for (i = 0; i < 16; i++) { 683 const struct lvds_pnp_id *vbt_id = 684 get_lvds_pnp_id(data, ptrs, i); 685 686 /* full match? */ 687 if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id))) 688 return i; 689 690 /* 691 * Accept a match w/o date if no full match is found, 692 * and the VBT entry does not specify a date. 693 */ 694 if (best < 0 && 695 !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id))) 696 best = i; 697 } 698 699 return best; 700} 701 702static int fallback_get_panel_type(struct drm_i915_private *i915, 703 const struct intel_bios_encoder_data *devdata, 704 const struct drm_edid *drm_edid, bool use_fallback) 705{ 706 return use_fallback ? 0 : -1; 707} 708 709enum panel_type { 710 PANEL_TYPE_OPREGION, 711 PANEL_TYPE_VBT, 712 PANEL_TYPE_PNPID, 713 PANEL_TYPE_FALLBACK, 714}; 715 716static int get_panel_type(struct drm_i915_private *i915, 717 const struct intel_bios_encoder_data *devdata, 718 const struct drm_edid *drm_edid, bool use_fallback) 719{ 720 struct { 721 const char *name; 722 int (*get_panel_type)(struct drm_i915_private *i915, 723 const struct intel_bios_encoder_data *devdata, 724 const struct drm_edid *drm_edid, bool use_fallback); 725 int panel_type; 726 } panel_types[] = { 727 [PANEL_TYPE_OPREGION] = { 728 .name = "OpRegion", 729 .get_panel_type = opregion_get_panel_type, 730 }, 731 [PANEL_TYPE_VBT] = { 732 .name = "VBT", 733 .get_panel_type = vbt_get_panel_type, 734 }, 735 [PANEL_TYPE_PNPID] = { 736 .name = "PNPID", 737 .get_panel_type = pnpid_get_panel_type, 738 }, 739 [PANEL_TYPE_FALLBACK] = { 740 .name = "fallback", 741 .get_panel_type = fallback_get_panel_type, 742 }, 743 }; 744 int i; 745 746 for (i = 0; i < ARRAY_SIZE(panel_types); i++) { 747 panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata, 748 drm_edid, use_fallback); 749 750 drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf && 751 panel_types[i].panel_type != 0xff); 752 753 if (panel_types[i].panel_type >= 0) 754 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n", 755 panel_types[i].name, panel_types[i].panel_type); 756 } 757 758 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0) 759 i = PANEL_TYPE_OPREGION; 760 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff && 761 panel_types[PANEL_TYPE_PNPID].panel_type >= 0) 762 i = PANEL_TYPE_PNPID; 763 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff && 764 panel_types[PANEL_TYPE_VBT].panel_type >= 0) 765 i = PANEL_TYPE_VBT; 766 else 767 i = PANEL_TYPE_FALLBACK; 768 769 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n", 770 panel_types[i].name, panel_types[i].panel_type); 771 772 return panel_types[i].panel_type; 773} 774 775static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits) 776{ 777 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1); 778} 779 780static bool panel_bool(unsigned int value, int panel_type) 781{ 782 return panel_bits(value, panel_type, 1); 783} 784 785/* Parse general panel options */ 786static void 787parse_panel_options(struct drm_i915_private *i915, 788 struct intel_panel *panel) 789{ 790 const struct bdb_lvds_options *lvds_options; 791 int panel_type = panel->vbt.panel_type; 792 int drrs_mode; 793 794 lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS); 795 if (!lvds_options) 796 return; 797 798 panel->vbt.lvds_dither = lvds_options->pixel_dither; 799 800 /* 801 * Empirical evidence indicates the block size can be 802 * either 4,14,16,24+ bytes. For older VBTs no clear 803 * relationship between the block size vs. BDB version. 804 */ 805 if (get_blocksize(lvds_options) < 16) 806 return; 807 808 drrs_mode = panel_bits(lvds_options->dps_panel_type_bits, 809 panel_type, 2); 810 /* 811 * VBT has static DRRS = 0 and seamless DRRS = 2. 812 * The below piece of code is required to adjust vbt.drrs_type 813 * to match the enum drrs_support_type. 814 */ 815 switch (drrs_mode) { 816 case 0: 817 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 818 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n"); 819 break; 820 case 2: 821 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS; 822 drm_dbg_kms(&i915->drm, 823 "DRRS supported mode is seamless\n"); 824 break; 825 default: 826 panel->vbt.drrs_type = DRRS_TYPE_NONE; 827 drm_dbg_kms(&i915->drm, 828 "DRRS not supported (VBT input)\n"); 829 break; 830 } 831} 832 833static void 834parse_lfp_panel_dtd(struct drm_i915_private *i915, 835 struct intel_panel *panel, 836 const struct bdb_lvds_lfp_data *lvds_lfp_data, 837 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs) 838{ 839 const struct lvds_dvo_timing *panel_dvo_timing; 840 const struct lvds_fp_timing *fp_timing; 841 struct drm_display_mode *panel_fixed_mode; 842 int panel_type = panel->vbt.panel_type; 843 844 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 845 lvds_lfp_data_ptrs, 846 panel_type); 847 848 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 849 if (!panel_fixed_mode) 850 return; 851 852 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 853 854 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 855 856 drm_dbg_kms(&i915->drm, 857 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n", 858 DRM_MODE_ARG(panel_fixed_mode)); 859 860 fp_timing = get_lvds_fp_timing(lvds_lfp_data, 861 lvds_lfp_data_ptrs, 862 panel_type); 863 864 /* check the resolution, just to be sure */ 865 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 866 fp_timing->y_res == panel_fixed_mode->vdisplay) { 867 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 868 drm_dbg_kms(&i915->drm, 869 "VBT initial LVDS value %x\n", 870 panel->vbt.bios_lvds_val); 871 } 872} 873 874static void 875parse_lfp_data(struct drm_i915_private *i915, 876 struct intel_panel *panel) 877{ 878 const struct bdb_lvds_lfp_data *data; 879 const struct bdb_lvds_lfp_data_tail *tail; 880 const struct bdb_lvds_lfp_data_ptrs *ptrs; 881 const struct lvds_pnp_id *pnp_id; 882 int panel_type = panel->vbt.panel_type; 883 884 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 885 if (!ptrs) 886 return; 887 888 data = bdb_find_section(i915, BDB_LVDS_LFP_DATA); 889 if (!data) 890 return; 891 892 if (!panel->vbt.lfp_lvds_vbt_mode) 893 parse_lfp_panel_dtd(i915, panel, data, ptrs); 894 895 pnp_id = get_lvds_pnp_id(data, ptrs, panel_type); 896 dump_pnp_id(i915, pnp_id, "Panel"); 897 898 tail = get_lfp_data_tail(data, ptrs); 899 if (!tail) 900 return; 901 902 drm_dbg_kms(&i915->drm, "Panel name: %.*s\n", 903 (int)sizeof(tail->panel_name[0].name), 904 tail->panel_name[panel_type].name); 905 906 if (i915->display.vbt.version >= 188) { 907 panel->vbt.seamless_drrs_min_refresh_rate = 908 tail->seamless_drrs_min_refresh_rate[panel_type]; 909 drm_dbg_kms(&i915->drm, 910 "Seamless DRRS min refresh rate: %d Hz\n", 911 panel->vbt.seamless_drrs_min_refresh_rate); 912 } 913} 914 915static void 916parse_generic_dtd(struct drm_i915_private *i915, 917 struct intel_panel *panel) 918{ 919 const struct bdb_generic_dtd *generic_dtd; 920 const struct generic_dtd_entry *dtd; 921 struct drm_display_mode *panel_fixed_mode; 922 int num_dtd; 923 924 /* 925 * Older VBTs provided DTD information for internal displays through 926 * the "LFP panel tables" block (42). As of VBT revision 229 the 927 * DTD information should be provided via a newer "generic DTD" 928 * block (58). Just to be safe, we'll try the new generic DTD block 929 * first on VBT >= 229, but still fall back to trying the old LFP 930 * block if that fails. 931 */ 932 if (i915->display.vbt.version < 229) 933 return; 934 935 generic_dtd = bdb_find_section(i915, BDB_GENERIC_DTD); 936 if (!generic_dtd) 937 return; 938 939 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 940 drm_err(&i915->drm, "GDTD size %u is too small.\n", 941 generic_dtd->gdtd_size); 942 return; 943 } else if (generic_dtd->gdtd_size != 944 sizeof(struct generic_dtd_entry)) { 945 drm_err(&i915->drm, "Unexpected GDTD size %u\n", 946 generic_dtd->gdtd_size); 947 /* DTD has unknown fields, but keep going */ 948 } 949 950 num_dtd = (get_blocksize(generic_dtd) - 951 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 952 if (panel->vbt.panel_type >= num_dtd) { 953 drm_err(&i915->drm, 954 "Panel type %d not found in table of %d DTD's\n", 955 panel->vbt.panel_type, num_dtd); 956 return; 957 } 958 959 dtd = &generic_dtd->dtd[panel->vbt.panel_type]; 960 961 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 962 if (!panel_fixed_mode) 963 return; 964 965 panel_fixed_mode->hdisplay = dtd->hactive; 966 panel_fixed_mode->hsync_start = 967 panel_fixed_mode->hdisplay + dtd->hfront_porch; 968 panel_fixed_mode->hsync_end = 969 panel_fixed_mode->hsync_start + dtd->hsync; 970 panel_fixed_mode->htotal = 971 panel_fixed_mode->hdisplay + dtd->hblank; 972 973 panel_fixed_mode->vdisplay = dtd->vactive; 974 panel_fixed_mode->vsync_start = 975 panel_fixed_mode->vdisplay + dtd->vfront_porch; 976 panel_fixed_mode->vsync_end = 977 panel_fixed_mode->vsync_start + dtd->vsync; 978 panel_fixed_mode->vtotal = 979 panel_fixed_mode->vdisplay + dtd->vblank; 980 981 panel_fixed_mode->clock = dtd->pixel_clock; 982 panel_fixed_mode->width_mm = dtd->width_mm; 983 panel_fixed_mode->height_mm = dtd->height_mm; 984 985 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 986 drm_mode_set_name(panel_fixed_mode); 987 988 if (dtd->hsync_positive_polarity) 989 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 990 else 991 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 992 993 if (dtd->vsync_positive_polarity) 994 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 995 else 996 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 997 998 drm_dbg_kms(&i915->drm, 999 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n", 1000 DRM_MODE_ARG(panel_fixed_mode)); 1001 1002 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 1003} 1004 1005static void 1006parse_lfp_backlight(struct drm_i915_private *i915, 1007 struct intel_panel *panel) 1008{ 1009 const struct bdb_lfp_backlight_data *backlight_data; 1010 const struct lfp_backlight_data_entry *entry; 1011 int panel_type = panel->vbt.panel_type; 1012 u16 level; 1013 1014 backlight_data = bdb_find_section(i915, BDB_LVDS_BACKLIGHT); 1015 if (!backlight_data) 1016 return; 1017 1018 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 1019 drm_dbg_kms(&i915->drm, 1020 "Unsupported backlight data entry size %u\n", 1021 backlight_data->entry_size); 1022 return; 1023 } 1024 1025 entry = &backlight_data->data[panel_type]; 1026 1027 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 1028 if (!panel->vbt.backlight.present) { 1029 drm_dbg_kms(&i915->drm, 1030 "PWM backlight not present in VBT (type %u)\n", 1031 entry->type); 1032 return; 1033 } 1034 1035 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 1036 panel->vbt.backlight.controller = 0; 1037 if (i915->display.vbt.version >= 191) { 1038 size_t exp_size; 1039 1040 if (i915->display.vbt.version >= 236) 1041 exp_size = sizeof(struct bdb_lfp_backlight_data); 1042 else if (i915->display.vbt.version >= 234) 1043 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234; 1044 else 1045 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191; 1046 1047 if (get_blocksize(backlight_data) >= exp_size) { 1048 const struct lfp_backlight_control_method *method; 1049 1050 method = &backlight_data->backlight_control[panel_type]; 1051 panel->vbt.backlight.type = method->type; 1052 panel->vbt.backlight.controller = method->controller; 1053 } 1054 } 1055 1056 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 1057 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm; 1058 1059 if (i915->display.vbt.version >= 234) { 1060 u16 min_level; 1061 bool scale; 1062 1063 level = backlight_data->brightness_level[panel_type].level; 1064 min_level = backlight_data->brightness_min_level[panel_type].level; 1065 1066 if (i915->display.vbt.version >= 236) 1067 scale = backlight_data->brightness_precision_bits[panel_type] == 16; 1068 else 1069 scale = level > 255; 1070 1071 if (scale) 1072 min_level = min_level / 255; 1073 1074 if (min_level > 255) { 1075 drm_warn(&i915->drm, "Brightness min level > 255\n"); 1076 level = 255; 1077 } 1078 panel->vbt.backlight.min_brightness = min_level; 1079 1080 panel->vbt.backlight.brightness_precision_bits = 1081 backlight_data->brightness_precision_bits[panel_type]; 1082 } else { 1083 level = backlight_data->level[panel_type]; 1084 panel->vbt.backlight.min_brightness = entry->min_brightness; 1085 } 1086 1087 if (i915->display.vbt.version >= 239) 1088 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 1089 DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100); 1090 else 1091 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30; 1092 1093 drm_dbg_kms(&i915->drm, 1094 "VBT backlight PWM modulation frequency %u Hz, " 1095 "active %s, min brightness %u, level %u, controller %u\n", 1096 panel->vbt.backlight.pwm_freq_hz, 1097 panel->vbt.backlight.active_low_pwm ? "low" : "high", 1098 panel->vbt.backlight.min_brightness, 1099 level, 1100 panel->vbt.backlight.controller); 1101} 1102 1103/* Try to find sdvo panel data */ 1104static void 1105parse_sdvo_panel_data(struct drm_i915_private *i915, 1106 struct intel_panel *panel) 1107{ 1108 const struct bdb_sdvo_panel_dtds *dtds; 1109 struct drm_display_mode *panel_fixed_mode; 1110 int index; 1111 1112 index = i915->params.vbt_sdvo_panel_type; 1113 if (index == -2) { 1114 drm_dbg_kms(&i915->drm, 1115 "Ignore SDVO panel mode from BIOS VBT tables.\n"); 1116 return; 1117 } 1118 1119 if (index == -1) { 1120 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 1121 1122 sdvo_lvds_options = bdb_find_section(i915, BDB_SDVO_LVDS_OPTIONS); 1123 if (!sdvo_lvds_options) 1124 return; 1125 1126 index = sdvo_lvds_options->panel_type; 1127 } 1128 1129 dtds = bdb_find_section(i915, BDB_SDVO_PANEL_DTDS); 1130 if (!dtds) 1131 return; 1132 1133 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 1134 if (!panel_fixed_mode) 1135 return; 1136 1137 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 1138 1139 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 1140 1141 drm_dbg_kms(&i915->drm, 1142 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n", 1143 DRM_MODE_ARG(panel_fixed_mode)); 1144} 1145 1146static int intel_bios_ssc_frequency(struct drm_i915_private *i915, 1147 bool alternate) 1148{ 1149 switch (DISPLAY_VER(i915)) { 1150 case 2: 1151 return alternate ? 66667 : 48000; 1152 case 3: 1153 case 4: 1154 return alternate ? 100000 : 96000; 1155 default: 1156 return alternate ? 100000 : 120000; 1157 } 1158} 1159 1160static void 1161parse_general_features(struct drm_i915_private *i915) 1162{ 1163 const struct bdb_general_features *general; 1164 1165 general = bdb_find_section(i915, BDB_GENERAL_FEATURES); 1166 if (!general) 1167 return; 1168 1169 i915->display.vbt.int_tv_support = general->int_tv_support; 1170 /* int_crt_support can't be trusted on earlier platforms */ 1171 if (i915->display.vbt.version >= 155 && 1172 (HAS_DDI(i915) || IS_VALLEYVIEW(i915))) 1173 i915->display.vbt.int_crt_support = general->int_crt_support; 1174 i915->display.vbt.lvds_use_ssc = general->enable_ssc; 1175 i915->display.vbt.lvds_ssc_freq = 1176 intel_bios_ssc_frequency(i915, general->ssc_freq); 1177 i915->display.vbt.display_clock_mode = general->display_clock_mode; 1178 i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 1179 if (i915->display.vbt.version >= 181) { 1180 i915->display.vbt.orientation = general->rotate_180 ? 1181 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 1182 DRM_MODE_PANEL_ORIENTATION_NORMAL; 1183 } else { 1184 i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1185 } 1186 1187 if (i915->display.vbt.version >= 249 && general->afc_startup_config) { 1188 i915->display.vbt.override_afc_startup = true; 1189 i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7; 1190 } 1191 1192 drm_dbg_kms(&i915->drm, 1193 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 1194 i915->display.vbt.int_tv_support, 1195 i915->display.vbt.int_crt_support, 1196 i915->display.vbt.lvds_use_ssc, 1197 i915->display.vbt.lvds_ssc_freq, 1198 i915->display.vbt.display_clock_mode, 1199 i915->display.vbt.fdi_rx_polarity_inverted); 1200} 1201 1202static const struct child_device_config * 1203child_device_ptr(const struct bdb_general_definitions *defs, int i) 1204{ 1205 return (const void *) &defs->devices[i * defs->child_dev_size]; 1206} 1207 1208static void 1209parse_sdvo_device_mapping(struct drm_i915_private *i915) 1210{ 1211 const struct intel_bios_encoder_data *devdata; 1212 int count = 0; 1213 1214 /* 1215 * Only parse SDVO mappings on gens that could have SDVO. This isn't 1216 * accurate and doesn't have to be, as long as it's not too strict. 1217 */ 1218 if (!IS_DISPLAY_VER(i915, 3, 7)) { 1219 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n"); 1220 return; 1221 } 1222 1223 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 1224 const struct child_device_config *child = &devdata->child; 1225 struct sdvo_device_mapping *mapping; 1226 1227 if (child->slave_addr != SLAVE_ADDR1 && 1228 child->slave_addr != SLAVE_ADDR2) { 1229 /* 1230 * If the slave address is neither 0x70 nor 0x72, 1231 * it is not a SDVO device. Skip it. 1232 */ 1233 continue; 1234 } 1235 if (child->dvo_port != DEVICE_PORT_DVOB && 1236 child->dvo_port != DEVICE_PORT_DVOC) { 1237 /* skip the incorrect SDVO port */ 1238 drm_dbg_kms(&i915->drm, 1239 "Incorrect SDVO port. Skip it\n"); 1240 continue; 1241 } 1242 drm_dbg_kms(&i915->drm, 1243 "the SDVO device with slave addr %2x is found on" 1244 " %s port\n", 1245 child->slave_addr, 1246 (child->dvo_port == DEVICE_PORT_DVOB) ? 1247 "SDVOB" : "SDVOC"); 1248 mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1]; 1249 if (!mapping->initialized) { 1250 mapping->dvo_port = child->dvo_port; 1251 mapping->slave_addr = child->slave_addr; 1252 mapping->dvo_wiring = child->dvo_wiring; 1253 mapping->ddc_pin = child->ddc_pin; 1254 mapping->i2c_pin = child->i2c_pin; 1255 mapping->initialized = 1; 1256 drm_dbg_kms(&i915->drm, 1257 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 1258 mapping->dvo_port, mapping->slave_addr, 1259 mapping->dvo_wiring, mapping->ddc_pin, 1260 mapping->i2c_pin); 1261 } else { 1262 drm_dbg_kms(&i915->drm, 1263 "Maybe one SDVO port is shared by " 1264 "two SDVO device.\n"); 1265 } 1266 if (child->slave2_addr) { 1267 /* Maybe this is a SDVO device with multiple inputs */ 1268 /* And the mapping info is not added */ 1269 drm_dbg_kms(&i915->drm, 1270 "there exists the slave2_addr. Maybe this" 1271 " is a SDVO device with multiple inputs.\n"); 1272 } 1273 count++; 1274 } 1275 1276 if (!count) { 1277 /* No SDVO device info is found */ 1278 drm_dbg_kms(&i915->drm, 1279 "No SDVO device info is found in VBT\n"); 1280 } 1281} 1282 1283static void 1284parse_driver_features(struct drm_i915_private *i915) 1285{ 1286 const struct bdb_driver_features *driver; 1287 1288 driver = bdb_find_section(i915, BDB_DRIVER_FEATURES); 1289 if (!driver) 1290 return; 1291 1292 if (DISPLAY_VER(i915) >= 5) { 1293 /* 1294 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 1295 * to mean "eDP". The VBT spec doesn't agree with that 1296 * interpretation, but real world VBTs seem to. 1297 */ 1298 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 1299 i915->display.vbt.int_lvds_support = 0; 1300 } else { 1301 /* 1302 * FIXME it's not clear which BDB version has the LVDS config 1303 * bits defined. Revision history in the VBT spec says: 1304 * "0.92 | Add two definitions for VBT value of LVDS Active 1305 * Config (00b and 11b values defined) | 06/13/2005" 1306 * but does not the specify the BDB version. 1307 * 1308 * So far version 134 (on i945gm) is the oldest VBT observed 1309 * in the wild with the bits correctly populated. Version 1310 * 108 (on i85x) does not have the bits correctly populated. 1311 */ 1312 if (i915->display.vbt.version >= 134 && 1313 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 1314 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 1315 i915->display.vbt.int_lvds_support = 0; 1316 } 1317} 1318 1319static void 1320parse_panel_driver_features(struct drm_i915_private *i915, 1321 struct intel_panel *panel) 1322{ 1323 const struct bdb_driver_features *driver; 1324 1325 driver = bdb_find_section(i915, BDB_DRIVER_FEATURES); 1326 if (!driver) 1327 return; 1328 1329 if (i915->display.vbt.version < 228) { 1330 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n", 1331 driver->drrs_enabled); 1332 /* 1333 * If DRRS is not supported, drrs_type has to be set to 0. 1334 * This is because, VBT is configured in such a way that 1335 * static DRRS is 0 and DRRS not supported is represented by 1336 * driver->drrs_enabled=false 1337 */ 1338 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1339 /* 1340 * FIXME Should DMRRS perhaps be treated as seamless 1341 * but without the automatic downclocking? 1342 */ 1343 if (driver->dmrrs_enabled) 1344 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1345 else 1346 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1347 } 1348 1349 panel->vbt.psr.enable = driver->psr_enabled; 1350 } 1351} 1352 1353static void 1354parse_power_conservation_features(struct drm_i915_private *i915, 1355 struct intel_panel *panel) 1356{ 1357 const struct bdb_lfp_power *power; 1358 u8 panel_type = panel->vbt.panel_type; 1359 1360 panel->vbt.vrr = true; /* matches Windows behaviour */ 1361 1362 if (i915->display.vbt.version < 228) 1363 return; 1364 1365 power = bdb_find_section(i915, BDB_LFP_POWER); 1366 if (!power) 1367 return; 1368 1369 panel->vbt.psr.enable = panel_bool(power->psr, panel_type); 1370 1371 /* 1372 * If DRRS is not supported, drrs_type has to be set to 0. 1373 * This is because, VBT is configured in such a way that 1374 * static DRRS is 0 and DRRS not supported is represented by 1375 * power->drrs & BIT(panel_type)=false 1376 */ 1377 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1378 /* 1379 * FIXME Should DMRRS perhaps be treated as seamless 1380 * but without the automatic downclocking? 1381 */ 1382 if (panel_bool(power->dmrrs, panel_type)) 1383 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1384 else 1385 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1386 } 1387 1388 if (i915->display.vbt.version >= 232) 1389 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type); 1390 1391 if (i915->display.vbt.version >= 233) 1392 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled, 1393 panel_type); 1394} 1395 1396static void 1397parse_edp(struct drm_i915_private *i915, 1398 struct intel_panel *panel) 1399{ 1400 const struct bdb_edp *edp; 1401 const struct edp_power_seq *edp_pps; 1402 const struct edp_fast_link_params *edp_link_params; 1403 int panel_type = panel->vbt.panel_type; 1404 1405 edp = bdb_find_section(i915, BDB_EDP); 1406 if (!edp) 1407 return; 1408 1409 switch (panel_bits(edp->color_depth, panel_type, 2)) { 1410 case EDP_18BPP: 1411 panel->vbt.edp.bpp = 18; 1412 break; 1413 case EDP_24BPP: 1414 panel->vbt.edp.bpp = 24; 1415 break; 1416 case EDP_30BPP: 1417 panel->vbt.edp.bpp = 30; 1418 break; 1419 } 1420 1421 /* Get the eDP sequencing and link info */ 1422 edp_pps = &edp->power_seqs[panel_type]; 1423 edp_link_params = &edp->fast_link_params[panel_type]; 1424 1425 panel->vbt.edp.pps = *edp_pps; 1426 1427 if (i915->display.vbt.version >= 224) { 1428 panel->vbt.edp.rate = 1429 edp->edp_fast_link_training_rate[panel_type] * 20; 1430 } else { 1431 switch (edp_link_params->rate) { 1432 case EDP_RATE_1_62: 1433 panel->vbt.edp.rate = 162000; 1434 break; 1435 case EDP_RATE_2_7: 1436 panel->vbt.edp.rate = 270000; 1437 break; 1438 case EDP_RATE_5_4: 1439 panel->vbt.edp.rate = 540000; 1440 break; 1441 default: 1442 drm_dbg_kms(&i915->drm, 1443 "VBT has unknown eDP link rate value %u\n", 1444 edp_link_params->rate); 1445 break; 1446 } 1447 } 1448 1449 switch (edp_link_params->lanes) { 1450 case EDP_LANE_1: 1451 panel->vbt.edp.lanes = 1; 1452 break; 1453 case EDP_LANE_2: 1454 panel->vbt.edp.lanes = 2; 1455 break; 1456 case EDP_LANE_4: 1457 panel->vbt.edp.lanes = 4; 1458 break; 1459 default: 1460 drm_dbg_kms(&i915->drm, 1461 "VBT has unknown eDP lane count value %u\n", 1462 edp_link_params->lanes); 1463 break; 1464 } 1465 1466 switch (edp_link_params->preemphasis) { 1467 case EDP_PREEMPHASIS_NONE: 1468 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 1469 break; 1470 case EDP_PREEMPHASIS_3_5dB: 1471 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 1472 break; 1473 case EDP_PREEMPHASIS_6dB: 1474 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 1475 break; 1476 case EDP_PREEMPHASIS_9_5dB: 1477 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 1478 break; 1479 default: 1480 drm_dbg_kms(&i915->drm, 1481 "VBT has unknown eDP pre-emphasis value %u\n", 1482 edp_link_params->preemphasis); 1483 break; 1484 } 1485 1486 switch (edp_link_params->vswing) { 1487 case EDP_VSWING_0_4V: 1488 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 1489 break; 1490 case EDP_VSWING_0_6V: 1491 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 1492 break; 1493 case EDP_VSWING_0_8V: 1494 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 1495 break; 1496 case EDP_VSWING_1_2V: 1497 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 1498 break; 1499 default: 1500 drm_dbg_kms(&i915->drm, 1501 "VBT has unknown eDP voltage swing value %u\n", 1502 edp_link_params->vswing); 1503 break; 1504 } 1505 1506 if (i915->display.vbt.version >= 173) { 1507 u8 vswing; 1508 1509 /* Don't read from VBT if module parameter has valid value*/ 1510 if (i915->params.edp_vswing) { 1511 panel->vbt.edp.low_vswing = 1512 i915->params.edp_vswing == 1; 1513 } else { 1514 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 1515 panel->vbt.edp.low_vswing = vswing == 0; 1516 } 1517 } 1518 1519 panel->vbt.edp.drrs_msa_timing_delay = 1520 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2); 1521 1522 if (i915->display.vbt.version >= 244) 1523 panel->vbt.edp.max_link_rate = 1524 edp->edp_max_port_link_rate[panel_type] * 20; 1525} 1526 1527static void 1528parse_psr(struct drm_i915_private *i915, 1529 struct intel_panel *panel) 1530{ 1531 const struct bdb_psr *psr; 1532 const struct psr_table *psr_table; 1533 int panel_type = panel->vbt.panel_type; 1534 1535 psr = bdb_find_section(i915, BDB_PSR); 1536 if (!psr) { 1537 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n"); 1538 return; 1539 } 1540 1541 psr_table = &psr->psr_table[panel_type]; 1542 1543 panel->vbt.psr.full_link = psr_table->full_link; 1544 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 1545 1546 /* Allowed VBT values goes from 0 to 15 */ 1547 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 1548 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 1549 1550 /* 1551 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 1552 * Old decimal value is wake up time in multiples of 100 us. 1553 */ 1554 if (i915->display.vbt.version >= 205 && 1555 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) { 1556 switch (psr_table->tp1_wakeup_time) { 1557 case 0: 1558 panel->vbt.psr.tp1_wakeup_time_us = 500; 1559 break; 1560 case 1: 1561 panel->vbt.psr.tp1_wakeup_time_us = 100; 1562 break; 1563 case 3: 1564 panel->vbt.psr.tp1_wakeup_time_us = 0; 1565 break; 1566 default: 1567 drm_dbg_kms(&i915->drm, 1568 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1569 psr_table->tp1_wakeup_time); 1570 fallthrough; 1571 case 2: 1572 panel->vbt.psr.tp1_wakeup_time_us = 2500; 1573 break; 1574 } 1575 1576 switch (psr_table->tp2_tp3_wakeup_time) { 1577 case 0: 1578 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500; 1579 break; 1580 case 1: 1581 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100; 1582 break; 1583 case 3: 1584 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0; 1585 break; 1586 default: 1587 drm_dbg_kms(&i915->drm, 1588 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1589 psr_table->tp2_tp3_wakeup_time); 1590 fallthrough; 1591 case 2: 1592 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 1593 break; 1594 } 1595 } else { 1596 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 1597 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 1598 } 1599 1600 if (i915->display.vbt.version >= 226) { 1601 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 1602 1603 wakeup_time = panel_bits(wakeup_time, panel_type, 2); 1604 switch (wakeup_time) { 1605 case 0: 1606 wakeup_time = 500; 1607 break; 1608 case 1: 1609 wakeup_time = 100; 1610 break; 1611 case 3: 1612 wakeup_time = 50; 1613 break; 1614 default: 1615 case 2: 1616 wakeup_time = 2500; 1617 break; 1618 } 1619 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 1620 } else { 1621 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 1622 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us; 1623 } 1624} 1625 1626static void parse_dsi_backlight_ports(struct drm_i915_private *i915, 1627 struct intel_panel *panel, 1628 enum port port) 1629{ 1630 enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C; 1631 1632 if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) { 1633 panel->vbt.dsi.bl_ports = BIT(port); 1634 if (panel->vbt.dsi.config->cabc_supported) 1635 panel->vbt.dsi.cabc_ports = BIT(port); 1636 1637 return; 1638 } 1639 1640 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) { 1641 case DL_DCS_PORT_A: 1642 panel->vbt.dsi.bl_ports = BIT(PORT_A); 1643 break; 1644 case DL_DCS_PORT_C: 1645 panel->vbt.dsi.bl_ports = BIT(port_bc); 1646 break; 1647 default: 1648 case DL_DCS_PORT_A_AND_C: 1649 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc); 1650 break; 1651 } 1652 1653 if (!panel->vbt.dsi.config->cabc_supported) 1654 return; 1655 1656 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) { 1657 case DL_DCS_PORT_A: 1658 panel->vbt.dsi.cabc_ports = BIT(PORT_A); 1659 break; 1660 case DL_DCS_PORT_C: 1661 panel->vbt.dsi.cabc_ports = BIT(port_bc); 1662 break; 1663 default: 1664 case DL_DCS_PORT_A_AND_C: 1665 panel->vbt.dsi.cabc_ports = 1666 BIT(PORT_A) | BIT(port_bc); 1667 break; 1668 } 1669} 1670 1671static void 1672parse_mipi_config(struct drm_i915_private *i915, 1673 struct intel_panel *panel) 1674{ 1675 const struct bdb_mipi_config *start; 1676 const struct mipi_config *config; 1677 const struct mipi_pps_data *pps; 1678 int panel_type = panel->vbt.panel_type; 1679 enum port port; 1680 1681 /* parse MIPI blocks only if LFP type is MIPI */ 1682 if (!intel_bios_is_dsi_present(i915, &port)) 1683 return; 1684 1685 /* Initialize this to undefined indicating no generic MIPI support */ 1686 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1687 1688 /* Block #40 is already parsed and panel_fixed_mode is 1689 * stored in i915->lfp_lvds_vbt_mode 1690 * resuse this when needed 1691 */ 1692 1693 /* Parse #52 for panel index used from panel_type already 1694 * parsed 1695 */ 1696 start = bdb_find_section(i915, BDB_MIPI_CONFIG); 1697 if (!start) { 1698 drm_dbg_kms(&i915->drm, "No MIPI config BDB found"); 1699 return; 1700 } 1701 1702 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n", 1703 panel_type); 1704 1705 /* 1706 * get hold of the correct configuration block and pps data as per 1707 * the panel_type as index 1708 */ 1709 config = &start->config[panel_type]; 1710 pps = &start->pps[panel_type]; 1711 1712 /* store as of now full data. Trim when we realise all is not needed */ 1713 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1714 if (!panel->vbt.dsi.config) 1715 return; 1716 1717 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1718 if (!panel->vbt.dsi.pps) { 1719 kfree(panel->vbt.dsi.config); 1720 return; 1721 } 1722 1723 parse_dsi_backlight_ports(i915, panel, port); 1724 1725 /* FIXME is the 90 vs. 270 correct? */ 1726 switch (config->rotation) { 1727 case ENABLE_ROTATION_0: 1728 /* 1729 * Most (all?) VBTs claim 0 degrees despite having 1730 * an upside down panel, thus we do not trust this. 1731 */ 1732 panel->vbt.dsi.orientation = 1733 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1734 break; 1735 case ENABLE_ROTATION_90: 1736 panel->vbt.dsi.orientation = 1737 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1738 break; 1739 case ENABLE_ROTATION_180: 1740 panel->vbt.dsi.orientation = 1741 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1742 break; 1743 case ENABLE_ROTATION_270: 1744 panel->vbt.dsi.orientation = 1745 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1746 break; 1747 } 1748 1749 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1750 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1751} 1752 1753/* Find the sequence block and size for the given panel. */ 1754static const u8 * 1755find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1756 u16 panel_id, u32 *seq_size) 1757{ 1758 u32 total = get_blocksize(sequence); 1759 const u8 *data = &sequence->data[0]; 1760 u8 current_id; 1761 u32 current_size; 1762 int header_size = sequence->version >= 3 ? 5 : 3; 1763 int index = 0; 1764 int i; 1765 1766 /* skip new block size */ 1767 if (sequence->version >= 3) 1768 data += 4; 1769 1770 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1771 if (index + header_size > total) { 1772 DRM_ERROR("Invalid sequence block (header)\n"); 1773 return NULL; 1774 } 1775 1776 current_id = *(data + index); 1777 if (sequence->version >= 3) 1778 current_size = *((const u32 *)(data + index + 1)); 1779 else 1780 current_size = *((const u16 *)(data + index + 1)); 1781 1782 index += header_size; 1783 1784 if (index + current_size > total) { 1785 DRM_ERROR("Invalid sequence block\n"); 1786 return NULL; 1787 } 1788 1789 if (current_id == panel_id) { 1790 *seq_size = current_size; 1791 return data + index; 1792 } 1793 1794 index += current_size; 1795 } 1796 1797 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1798 1799 return NULL; 1800} 1801 1802static int goto_next_sequence(const u8 *data, int index, int total) 1803{ 1804 u16 len; 1805 1806 /* Skip Sequence Byte. */ 1807 for (index = index + 1; index < total; index += len) { 1808 u8 operation_byte = *(data + index); 1809 index++; 1810 1811 switch (operation_byte) { 1812 case MIPI_SEQ_ELEM_END: 1813 return index; 1814 case MIPI_SEQ_ELEM_SEND_PKT: 1815 if (index + 4 > total) 1816 return 0; 1817 1818 len = *((const u16 *)(data + index + 2)) + 4; 1819 break; 1820 case MIPI_SEQ_ELEM_DELAY: 1821 len = 4; 1822 break; 1823 case MIPI_SEQ_ELEM_GPIO: 1824 len = 2; 1825 break; 1826 case MIPI_SEQ_ELEM_I2C: 1827 if (index + 7 > total) 1828 return 0; 1829 len = *(data + index + 6) + 7; 1830 break; 1831 default: 1832 DRM_ERROR("Unknown operation byte\n"); 1833 return 0; 1834 } 1835 } 1836 1837 return 0; 1838} 1839 1840static int goto_next_sequence_v3(const u8 *data, int index, int total) 1841{ 1842 int seq_end; 1843 u16 len; 1844 u32 size_of_sequence; 1845 1846 /* 1847 * Could skip sequence based on Size of Sequence alone, but also do some 1848 * checking on the structure. 1849 */ 1850 if (total < 5) { 1851 DRM_ERROR("Too small sequence size\n"); 1852 return 0; 1853 } 1854 1855 /* Skip Sequence Byte. */ 1856 index++; 1857 1858 /* 1859 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1860 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1861 * byte. 1862 */ 1863 size_of_sequence = *((const u32 *)(data + index)); 1864 index += 4; 1865 1866 seq_end = index + size_of_sequence; 1867 if (seq_end > total) { 1868 DRM_ERROR("Invalid sequence size\n"); 1869 return 0; 1870 } 1871 1872 for (; index < total; index += len) { 1873 u8 operation_byte = *(data + index); 1874 index++; 1875 1876 if (operation_byte == MIPI_SEQ_ELEM_END) { 1877 if (index != seq_end) { 1878 DRM_ERROR("Invalid element structure\n"); 1879 return 0; 1880 } 1881 return index; 1882 } 1883 1884 len = *(data + index); 1885 index++; 1886 1887 /* 1888 * FIXME: Would be nice to check elements like for v1/v2 in 1889 * goto_next_sequence() above. 1890 */ 1891 switch (operation_byte) { 1892 case MIPI_SEQ_ELEM_SEND_PKT: 1893 case MIPI_SEQ_ELEM_DELAY: 1894 case MIPI_SEQ_ELEM_GPIO: 1895 case MIPI_SEQ_ELEM_I2C: 1896 case MIPI_SEQ_ELEM_SPI: 1897 case MIPI_SEQ_ELEM_PMIC: 1898 break; 1899 default: 1900 DRM_ERROR("Unknown operation byte %u\n", 1901 operation_byte); 1902 break; 1903 } 1904 } 1905 1906 return 0; 1907} 1908 1909/* 1910 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1911 * skip all delay + gpio operands and stop at the first DSI packet op. 1912 */ 1913static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915, 1914 struct intel_panel *panel) 1915{ 1916 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1917 int index, len; 1918 1919 if (drm_WARN_ON(&i915->drm, 1920 !data || panel->vbt.dsi.seq_version != 1)) 1921 return 0; 1922 1923 /* index = 1 to skip sequence byte */ 1924 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1925 switch (data[index]) { 1926 case MIPI_SEQ_ELEM_SEND_PKT: 1927 return index == 1 ? 0 : index; 1928 case MIPI_SEQ_ELEM_DELAY: 1929 len = 5; /* 1 byte for operand + uint32 */ 1930 break; 1931 case MIPI_SEQ_ELEM_GPIO: 1932 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1933 break; 1934 default: 1935 return 0; 1936 } 1937 } 1938 1939 return 0; 1940} 1941 1942/* 1943 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1944 * The deassert must be done before calling intel_dsi_device_ready, so for 1945 * these devices we split the init OTP sequence into a deassert sequence and 1946 * the actual init OTP part. 1947 */ 1948static void vlv_fixup_mipi_sequences(struct drm_i915_private *i915, 1949 struct intel_panel *panel) 1950{ 1951 u8 *init_otp; 1952 int len; 1953 1954 /* Limit this to v1 vid-mode sequences */ 1955 if (panel->vbt.dsi.config->is_cmd_mode || 1956 panel->vbt.dsi.seq_version != 1) 1957 return; 1958 1959 /* Only do this if there are otp and assert seqs and no deassert seq */ 1960 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1961 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1962 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1963 return; 1964 1965 /* The deassert-sequence ends at the first DSI packet */ 1966 len = get_init_otp_deassert_fragment_len(i915, panel); 1967 if (!len) 1968 return; 1969 1970 drm_dbg_kms(&i915->drm, 1971 "Using init OTP fragment to deassert reset\n"); 1972 1973 /* Copy the fragment, update seq byte and terminate it */ 1974 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1975 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1976 if (!panel->vbt.dsi.deassert_seq) 1977 return; 1978 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1979 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1980 /* Use the copy for deassert */ 1981 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1982 panel->vbt.dsi.deassert_seq; 1983 /* Replace the last byte of the fragment with init OTP seq byte */ 1984 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1985 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1986 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1987} 1988 1989/* 1990 * Some machines (eg. Lenovo 82TQ) appear to have broken 1991 * VBT sequences: 1992 * - INIT_OTP is not present at all 1993 * - what should be in INIT_OTP is in DISPLAY_ON 1994 * - what should be in DISPLAY_ON is in BACKLIGHT_ON 1995 * (along with the actual backlight stuff) 1996 * 1997 * To make those work we simply swap DISPLAY_ON and INIT_OTP. 1998 * 1999 * TODO: Do we need to limit this to specific machines, 2000 * or examine the contents of the sequences to 2001 * avoid false positives? 2002 */ 2003static void icl_fixup_mipi_sequences(struct drm_i915_private *i915, 2004 struct intel_panel *panel) 2005{ 2006 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] && 2007 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) { 2008 drm_dbg_kms(&i915->drm, "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n"); 2009 2010 swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP], 2011 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]); 2012 } 2013} 2014 2015static void fixup_mipi_sequences(struct drm_i915_private *i915, 2016 struct intel_panel *panel) 2017{ 2018 if (DISPLAY_VER(i915) >= 11) 2019 icl_fixup_mipi_sequences(i915, panel); 2020 else if (IS_VALLEYVIEW(i915)) 2021 vlv_fixup_mipi_sequences(i915, panel); 2022} 2023 2024static void 2025parse_mipi_sequence(struct drm_i915_private *i915, 2026 struct intel_panel *panel) 2027{ 2028 int panel_type = panel->vbt.panel_type; 2029 const struct bdb_mipi_sequence *sequence; 2030 const u8 *seq_data; 2031 u32 seq_size; 2032 u8 *data; 2033 int index = 0; 2034 2035 /* Only our generic panel driver uses the sequence block. */ 2036 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 2037 return; 2038 2039 sequence = bdb_find_section(i915, BDB_MIPI_SEQUENCE); 2040 if (!sequence) { 2041 drm_dbg_kms(&i915->drm, 2042 "No MIPI Sequence found, parsing complete\n"); 2043 return; 2044 } 2045 2046 /* Fail gracefully for forward incompatible sequence block. */ 2047 if (sequence->version >= 4) { 2048 drm_err(&i915->drm, 2049 "Unable to parse MIPI Sequence Block v%u\n", 2050 sequence->version); 2051 return; 2052 } 2053 2054 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n", 2055 sequence->version); 2056 2057 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 2058 if (!seq_data) 2059 return; 2060 2061 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 2062 if (!data) 2063 return; 2064 2065 /* Parse the sequences, store pointers to each sequence. */ 2066 for (;;) { 2067 u8 seq_id = *(data + index); 2068 if (seq_id == MIPI_SEQ_END) 2069 break; 2070 2071 if (seq_id >= MIPI_SEQ_MAX) { 2072 drm_err(&i915->drm, "Unknown sequence %u\n", 2073 seq_id); 2074 goto err; 2075 } 2076 2077 /* Log about presence of sequences we won't run. */ 2078 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 2079 drm_dbg_kms(&i915->drm, 2080 "Unsupported sequence %u\n", seq_id); 2081 2082 panel->vbt.dsi.sequence[seq_id] = data + index; 2083 2084 if (sequence->version >= 3) 2085 index = goto_next_sequence_v3(data, index, seq_size); 2086 else 2087 index = goto_next_sequence(data, index, seq_size); 2088 if (!index) { 2089 drm_err(&i915->drm, "Invalid sequence %u\n", 2090 seq_id); 2091 goto err; 2092 } 2093 } 2094 2095 panel->vbt.dsi.data = data; 2096 panel->vbt.dsi.size = seq_size; 2097 panel->vbt.dsi.seq_version = sequence->version; 2098 2099 fixup_mipi_sequences(i915, panel); 2100 2101 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n"); 2102 return; 2103 2104err: 2105 kfree(data); 2106 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence)); 2107} 2108 2109static void 2110parse_compression_parameters(struct drm_i915_private *i915) 2111{ 2112 const struct bdb_compression_parameters *params; 2113 struct intel_bios_encoder_data *devdata; 2114 u16 block_size; 2115 int index; 2116 2117 if (i915->display.vbt.version < 198) 2118 return; 2119 2120 params = bdb_find_section(i915, BDB_COMPRESSION_PARAMETERS); 2121 if (params) { 2122 /* Sanity checks */ 2123 if (params->entry_size != sizeof(params->data[0])) { 2124 drm_dbg_kms(&i915->drm, 2125 "VBT: unsupported compression param entry size\n"); 2126 return; 2127 } 2128 2129 block_size = get_blocksize(params); 2130 if (block_size < sizeof(*params)) { 2131 drm_dbg_kms(&i915->drm, 2132 "VBT: expected 16 compression param entries\n"); 2133 return; 2134 } 2135 } 2136 2137 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 2138 const struct child_device_config *child = &devdata->child; 2139 2140 if (!child->compression_enable) 2141 continue; 2142 2143 if (!params) { 2144 drm_dbg_kms(&i915->drm, 2145 "VBT: compression params not available\n"); 2146 continue; 2147 } 2148 2149 if (child->compression_method_cps) { 2150 drm_dbg_kms(&i915->drm, 2151 "VBT: CPS compression not supported\n"); 2152 continue; 2153 } 2154 2155 index = child->compression_structure_index; 2156 2157 devdata->dsc = kmemdup(¶ms->data[index], 2158 sizeof(*devdata->dsc), GFP_KERNEL); 2159 } 2160} 2161 2162static u8 translate_iboost(u8 val) 2163{ 2164 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 2165 2166 if (val >= ARRAY_SIZE(mapping)) { 2167 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 2168 return 0; 2169 } 2170 return mapping[val]; 2171} 2172 2173static const u8 cnp_ddc_pin_map[] = { 2174 [0] = 0, /* N/A */ 2175 [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B, 2176 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C, 2177 [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */ 2178 [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */ 2179}; 2180 2181static const u8 icp_ddc_pin_map[] = { 2182 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2183 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2184 [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C, 2185 [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1, 2186 [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2, 2187 [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3, 2188 [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4, 2189 [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5, 2190 [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6, 2191}; 2192 2193static const u8 rkl_pch_tgp_ddc_pin_map[] = { 2194 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2195 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2196 [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D, 2197 [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E, 2198}; 2199 2200static const u8 adls_ddc_pin_map[] = { 2201 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2202 [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1, 2203 [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2, 2204 [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3, 2205 [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4, 2206}; 2207 2208static const u8 gen9bc_tgp_ddc_pin_map[] = { 2209 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B, 2210 [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C, 2211 [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D, 2212}; 2213 2214static const u8 adlp_ddc_pin_map[] = { 2215 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2216 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2217 [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1, 2218 [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2, 2219 [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3, 2220 [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4, 2221}; 2222 2223static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) 2224{ 2225 const u8 *ddc_pin_map; 2226 int i, n_entries; 2227 2228 if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) { 2229 ddc_pin_map = adlp_ddc_pin_map; 2230 n_entries = ARRAY_SIZE(adlp_ddc_pin_map); 2231 } else if (IS_ALDERLAKE_S(i915)) { 2232 ddc_pin_map = adls_ddc_pin_map; 2233 n_entries = ARRAY_SIZE(adls_ddc_pin_map); 2234 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { 2235 return vbt_pin; 2236 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { 2237 ddc_pin_map = rkl_pch_tgp_ddc_pin_map; 2238 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); 2239 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) { 2240 ddc_pin_map = gen9bc_tgp_ddc_pin_map; 2241 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map); 2242 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) { 2243 ddc_pin_map = icp_ddc_pin_map; 2244 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 2245 } else if (HAS_PCH_CNP(i915)) { 2246 ddc_pin_map = cnp_ddc_pin_map; 2247 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 2248 } else { 2249 /* Assuming direct map */ 2250 return vbt_pin; 2251 } 2252 2253 for (i = 0; i < n_entries; i++) { 2254 if (ddc_pin_map[i] == vbt_pin) 2255 return i; 2256 } 2257 2258 drm_dbg_kms(&i915->drm, 2259 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 2260 vbt_pin); 2261 return 0; 2262} 2263 2264static u8 dvo_port_type(u8 dvo_port) 2265{ 2266 switch (dvo_port) { 2267 case DVO_PORT_HDMIA: 2268 case DVO_PORT_HDMIB: 2269 case DVO_PORT_HDMIC: 2270 case DVO_PORT_HDMID: 2271 case DVO_PORT_HDMIE: 2272 case DVO_PORT_HDMIF: 2273 case DVO_PORT_HDMIG: 2274 case DVO_PORT_HDMIH: 2275 case DVO_PORT_HDMII: 2276 return DVO_PORT_HDMIA; 2277 case DVO_PORT_DPA: 2278 case DVO_PORT_DPB: 2279 case DVO_PORT_DPC: 2280 case DVO_PORT_DPD: 2281 case DVO_PORT_DPE: 2282 case DVO_PORT_DPF: 2283 case DVO_PORT_DPG: 2284 case DVO_PORT_DPH: 2285 case DVO_PORT_DPI: 2286 return DVO_PORT_DPA; 2287 case DVO_PORT_MIPIA: 2288 case DVO_PORT_MIPIB: 2289 case DVO_PORT_MIPIC: 2290 case DVO_PORT_MIPID: 2291 return DVO_PORT_MIPIA; 2292 default: 2293 return dvo_port; 2294 } 2295} 2296 2297static enum port __dvo_port_to_port(int n_ports, int n_dvo, 2298 const int port_mapping[][3], u8 dvo_port) 2299{ 2300 enum port port; 2301 int i; 2302 2303 for (port = PORT_A; port < n_ports; port++) { 2304 for (i = 0; i < n_dvo; i++) { 2305 if (port_mapping[port][i] == -1) 2306 break; 2307 2308 if (dvo_port == port_mapping[port][i]) 2309 return port; 2310 } 2311 } 2312 2313 return PORT_NONE; 2314} 2315 2316static enum port dvo_port_to_port(struct drm_i915_private *i915, 2317 u8 dvo_port) 2318{ 2319 /* 2320 * Each DDI port can have more than one value on the "DVO Port" field, 2321 * so look for all the possible values for each port. 2322 */ 2323 static const int port_mapping[][3] = { 2324 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2325 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2326 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2327 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2328 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 2329 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2330 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2331 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2332 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2333 }; 2334 /* 2335 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D 2336 * map to DDI A,B,TC1,TC2 respectively. 2337 */ 2338 static const int rkl_port_mapping[][3] = { 2339 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2340 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2341 [PORT_C] = { -1 }, 2342 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2343 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2344 }; 2345 /* 2346 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, 2347 * PORT_F and PORT_G, we need to map that to correct VBT sections. 2348 */ 2349 static const int adls_port_mapping[][3] = { 2350 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2351 [PORT_B] = { -1 }, 2352 [PORT_C] = { -1 }, 2353 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2354 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2355 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2356 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2357 }; 2358 static const int xelpd_port_mapping[][3] = { 2359 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2360 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2361 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2362 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2363 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2364 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2365 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2366 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2367 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2368 }; 2369 2370 if (DISPLAY_VER(i915) >= 13) 2371 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping), 2372 ARRAY_SIZE(xelpd_port_mapping[0]), 2373 xelpd_port_mapping, 2374 dvo_port); 2375 else if (IS_ALDERLAKE_S(i915)) 2376 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), 2377 ARRAY_SIZE(adls_port_mapping[0]), 2378 adls_port_mapping, 2379 dvo_port); 2380 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 2381 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 2382 ARRAY_SIZE(rkl_port_mapping[0]), 2383 rkl_port_mapping, 2384 dvo_port); 2385 else 2386 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 2387 ARRAY_SIZE(port_mapping[0]), 2388 port_mapping, 2389 dvo_port); 2390} 2391 2392static enum port 2393dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port) 2394{ 2395 switch (dvo_port) { 2396 case DVO_PORT_MIPIA: 2397 return PORT_A; 2398 case DVO_PORT_MIPIC: 2399 if (DISPLAY_VER(i915) >= 11) 2400 return PORT_B; 2401 else 2402 return PORT_C; 2403 default: 2404 return PORT_NONE; 2405 } 2406} 2407 2408enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata) 2409{ 2410 struct drm_i915_private *i915 = devdata->i915; 2411 const struct child_device_config *child = &devdata->child; 2412 enum port port; 2413 2414 port = dvo_port_to_port(i915, child->dvo_port); 2415 if (port == PORT_NONE && DISPLAY_VER(i915) >= 11) 2416 port = dsi_dvo_port_to_port(i915, child->dvo_port); 2417 2418 return port; 2419} 2420 2421static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate) 2422{ 2423 switch (vbt_max_link_rate) { 2424 default: 2425 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF: 2426 return 0; 2427 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20: 2428 return 2000000; 2429 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5: 2430 return 1350000; 2431 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10: 2432 return 1000000; 2433 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3: 2434 return 810000; 2435 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2: 2436 return 540000; 2437 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR: 2438 return 270000; 2439 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR: 2440 return 162000; 2441 } 2442} 2443 2444static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) 2445{ 2446 switch (vbt_max_link_rate) { 2447 default: 2448 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3: 2449 return 810000; 2450 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2: 2451 return 540000; 2452 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR: 2453 return 270000; 2454 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR: 2455 return 162000; 2456 } 2457} 2458 2459int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) 2460{ 2461 if (!devdata || devdata->i915->display.vbt.version < 216) 2462 return 0; 2463 2464 if (devdata->i915->display.vbt.version >= 230) 2465 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); 2466 else 2467 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); 2468} 2469 2470int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata) 2471{ 2472 if (!devdata || devdata->i915->display.vbt.version < 244) 2473 return 0; 2474 2475 return devdata->child.dp_max_lane_count + 1; 2476} 2477 2478static void sanitize_device_type(struct intel_bios_encoder_data *devdata, 2479 enum port port) 2480{ 2481 struct drm_i915_private *i915 = devdata->i915; 2482 bool is_hdmi; 2483 2484 if (port != PORT_A || DISPLAY_VER(i915) >= 12) 2485 return; 2486 2487 if (!intel_bios_encoder_supports_dvi(devdata)) 2488 return; 2489 2490 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2491 2492 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n", 2493 is_hdmi ? "/HDMI" : ""); 2494 2495 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 2496 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 2497} 2498 2499static bool 2500intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata) 2501{ 2502 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 2503} 2504 2505bool 2506intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata) 2507{ 2508 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 2509} 2510 2511bool 2512intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata) 2513{ 2514 return intel_bios_encoder_supports_dvi(devdata) && 2515 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 2516} 2517 2518bool 2519intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata) 2520{ 2521 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2522} 2523 2524bool 2525intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata) 2526{ 2527 return intel_bios_encoder_supports_dp(devdata) && 2528 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR; 2529} 2530 2531bool 2532intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata) 2533{ 2534 return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT; 2535} 2536 2537bool 2538intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata) 2539{ 2540 return devdata && HAS_LSPCON(devdata->i915) && devdata->child.lspcon; 2541} 2542 2543/* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ 2544int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) 2545{ 2546 if (!devdata || devdata->i915->display.vbt.version < 158 || 2547 DISPLAY_VER(devdata->i915) >= 14) 2548 return -1; 2549 2550 return devdata->child.hdmi_level_shifter_value; 2551} 2552 2553int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata) 2554{ 2555 if (!devdata || devdata->i915->display.vbt.version < 204) 2556 return 0; 2557 2558 switch (devdata->child.hdmi_max_data_rate) { 2559 default: 2560 MISSING_CASE(devdata->child.hdmi_max_data_rate); 2561 fallthrough; 2562 case HDMI_MAX_DATA_RATE_PLATFORM: 2563 return 0; 2564 case HDMI_MAX_DATA_RATE_594: 2565 return 594000; 2566 case HDMI_MAX_DATA_RATE_340: 2567 return 340000; 2568 case HDMI_MAX_DATA_RATE_300: 2569 return 300000; 2570 case HDMI_MAX_DATA_RATE_297: 2571 return 297000; 2572 case HDMI_MAX_DATA_RATE_165: 2573 return 165000; 2574 } 2575} 2576 2577static bool is_port_valid(struct drm_i915_private *i915, enum port port) 2578{ 2579 /* 2580 * On some ICL SKUs port F is not present, but broken VBTs mark 2581 * the port as present. Only try to initialize port F for the 2582 * SKUs that may actually have it. 2583 */ 2584 if (port == PORT_F && IS_ICELAKE(i915)) 2585 return IS_ICL_WITH_PORT_F(i915); 2586 2587 return true; 2588} 2589 2590static void print_ddi_port(const struct intel_bios_encoder_data *devdata) 2591{ 2592 struct drm_i915_private *i915 = devdata->i915; 2593 const struct child_device_config *child = &devdata->child; 2594 bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt; 2595 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock; 2596 enum port port; 2597 2598 port = intel_bios_encoder_port(devdata); 2599 if (port == PORT_NONE) 2600 return; 2601 2602 is_dvi = intel_bios_encoder_supports_dvi(devdata); 2603 is_dp = intel_bios_encoder_supports_dp(devdata); 2604 is_crt = intel_bios_encoder_supports_crt(devdata); 2605 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2606 is_edp = intel_bios_encoder_supports_edp(devdata); 2607 is_dsi = intel_bios_encoder_supports_dsi(devdata); 2608 2609 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata); 2610 supports_tbt = intel_bios_encoder_supports_tbt(devdata); 2611 2612 drm_dbg_kms(&i915->drm, 2613 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 2614 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi, 2615 intel_bios_encoder_supports_dp_dual_mode(devdata), 2616 intel_bios_encoder_is_lspcon(devdata), 2617 supports_typec_usb, supports_tbt, 2618 devdata->dsc != NULL); 2619 2620 hdmi_level_shift = intel_bios_hdmi_level_shift(devdata); 2621 if (hdmi_level_shift >= 0) { 2622 drm_dbg_kms(&i915->drm, 2623 "Port %c VBT HDMI level shift: %d\n", 2624 port_name(port), hdmi_level_shift); 2625 } 2626 2627 max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata); 2628 if (max_tmds_clock) 2629 drm_dbg_kms(&i915->drm, 2630 "Port %c VBT HDMI max TMDS clock: %d kHz\n", 2631 port_name(port), max_tmds_clock); 2632 2633 /* I_boost config for SKL and above */ 2634 dp_boost_level = intel_bios_dp_boost_level(devdata); 2635 if (dp_boost_level) 2636 drm_dbg_kms(&i915->drm, 2637 "Port %c VBT (e)DP boost level: %d\n", 2638 port_name(port), dp_boost_level); 2639 2640 hdmi_boost_level = intel_bios_hdmi_boost_level(devdata); 2641 if (hdmi_boost_level) 2642 drm_dbg_kms(&i915->drm, 2643 "Port %c VBT HDMI boost level: %d\n", 2644 port_name(port), hdmi_boost_level); 2645 2646 dp_max_link_rate = intel_bios_dp_max_link_rate(devdata); 2647 if (dp_max_link_rate) 2648 drm_dbg_kms(&i915->drm, 2649 "Port %c VBT DP max link rate: %d\n", 2650 port_name(port), dp_max_link_rate); 2651 2652 /* 2653 * FIXME need to implement support for VBT 2654 * vswing/preemph tables should this ever trigger. 2655 */ 2656 drm_WARN(&i915->drm, child->use_vbt_vswing, 2657 "Port %c asks to use VBT vswing/preemph tables\n", 2658 port_name(port)); 2659} 2660 2661static void parse_ddi_port(struct intel_bios_encoder_data *devdata) 2662{ 2663 struct drm_i915_private *i915 = devdata->i915; 2664 enum port port; 2665 2666 port = intel_bios_encoder_port(devdata); 2667 if (port == PORT_NONE) 2668 return; 2669 2670 if (!is_port_valid(i915, port)) { 2671 drm_dbg_kms(&i915->drm, 2672 "VBT reports port %c as supported, but that can't be true: skipping\n", 2673 port_name(port)); 2674 return; 2675 } 2676 2677 sanitize_device_type(devdata, port); 2678} 2679 2680static bool has_ddi_port_info(struct drm_i915_private *i915) 2681{ 2682 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915); 2683} 2684 2685static void parse_ddi_ports(struct drm_i915_private *i915) 2686{ 2687 struct intel_bios_encoder_data *devdata; 2688 2689 if (!has_ddi_port_info(i915)) 2690 return; 2691 2692 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) 2693 parse_ddi_port(devdata); 2694 2695 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) 2696 print_ddi_port(devdata); 2697} 2698 2699static void 2700parse_general_definitions(struct drm_i915_private *i915) 2701{ 2702 const struct bdb_general_definitions *defs; 2703 struct intel_bios_encoder_data *devdata; 2704 const struct child_device_config *child; 2705 int i, child_device_num; 2706 u8 expected_size; 2707 u16 block_size; 2708 int bus_pin; 2709 2710 defs = bdb_find_section(i915, BDB_GENERAL_DEFINITIONS); 2711 if (!defs) { 2712 drm_dbg_kms(&i915->drm, 2713 "No general definition block is found, no devices defined.\n"); 2714 return; 2715 } 2716 2717 block_size = get_blocksize(defs); 2718 if (block_size < sizeof(*defs)) { 2719 drm_dbg_kms(&i915->drm, 2720 "General definitions block too small (%u)\n", 2721 block_size); 2722 return; 2723 } 2724 2725 bus_pin = defs->crt_ddc_gmbus_pin; 2726 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 2727 if (intel_gmbus_is_valid_pin(i915, bus_pin)) 2728 i915->display.vbt.crt_ddc_pin = bus_pin; 2729 2730 if (i915->display.vbt.version < 106) { 2731 expected_size = 22; 2732 } else if (i915->display.vbt.version < 111) { 2733 expected_size = 27; 2734 } else if (i915->display.vbt.version < 195) { 2735 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 2736 } else if (i915->display.vbt.version == 195) { 2737 expected_size = 37; 2738 } else if (i915->display.vbt.version <= 215) { 2739 expected_size = 38; 2740 } else if (i915->display.vbt.version <= 250) { 2741 expected_size = 39; 2742 } else { 2743 expected_size = sizeof(*child); 2744 BUILD_BUG_ON(sizeof(*child) < 39); 2745 drm_dbg(&i915->drm, 2746 "Expected child device config size for VBT version %u not known; assuming %u\n", 2747 i915->display.vbt.version, expected_size); 2748 } 2749 2750 /* Flag an error for unexpected size, but continue anyway. */ 2751 if (defs->child_dev_size != expected_size) 2752 drm_err(&i915->drm, 2753 "Unexpected child device config size %u (expected %u for VBT version %u)\n", 2754 defs->child_dev_size, expected_size, i915->display.vbt.version); 2755 2756 /* The legacy sized child device config is the minimum we need. */ 2757 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 2758 drm_dbg_kms(&i915->drm, 2759 "Child device config size %u is too small.\n", 2760 defs->child_dev_size); 2761 return; 2762 } 2763 2764 /* get the number of child device */ 2765 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 2766 2767 for (i = 0; i < child_device_num; i++) { 2768 child = child_device_ptr(defs, i); 2769 if (!child->device_type) 2770 continue; 2771 2772 drm_dbg_kms(&i915->drm, 2773 "Found VBT child device with type 0x%x\n", 2774 child->device_type); 2775 2776 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2777 if (!devdata) 2778 break; 2779 2780 devdata->i915 = i915; 2781 2782 /* 2783 * Copy as much as we know (sizeof) and is available 2784 * (child_dev_size) of the child device config. Accessing the 2785 * data must depend on VBT version. 2786 */ 2787 memcpy(&devdata->child, child, 2788 min_t(size_t, defs->child_dev_size, sizeof(*child))); 2789 2790 list_add_tail(&devdata->node, &i915->display.vbt.display_devices); 2791 } 2792 2793 if (list_empty(&i915->display.vbt.display_devices)) 2794 drm_dbg_kms(&i915->drm, 2795 "no child dev is parsed from VBT\n"); 2796} 2797 2798/* Common defaults which may be overridden by VBT. */ 2799static void 2800init_vbt_defaults(struct drm_i915_private *i915) 2801{ 2802 i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 2803 2804 /* general features */ 2805 i915->display.vbt.int_tv_support = 1; 2806 i915->display.vbt.int_crt_support = 1; 2807 2808 /* driver features */ 2809 i915->display.vbt.int_lvds_support = 1; 2810 2811 /* Default to using SSC */ 2812 i915->display.vbt.lvds_use_ssc = 1; 2813 /* 2814 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 2815 * clock for LVDS. 2816 */ 2817 i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915, 2818 !HAS_PCH_SPLIT(i915)); 2819 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n", 2820 i915->display.vbt.lvds_ssc_freq); 2821} 2822 2823/* Common defaults which may be overridden by VBT. */ 2824static void 2825init_vbt_panel_defaults(struct intel_panel *panel) 2826{ 2827 /* Default to having backlight */ 2828 panel->vbt.backlight.present = true; 2829 2830 /* LFP panel data */ 2831 panel->vbt.lvds_dither = true; 2832} 2833 2834/* Defaults to initialize only if there is no VBT. */ 2835static void 2836init_vbt_missing_defaults(struct drm_i915_private *i915) 2837{ 2838 enum port port; 2839 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | 2840 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F); 2841 2842 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915)) 2843 return; 2844 2845 for_each_port_masked(port, ports) { 2846 struct intel_bios_encoder_data *devdata; 2847 struct child_device_config *child; 2848 enum phy phy = intel_port_to_phy(i915, port); 2849 2850 /* 2851 * VBT has the TypeC mode (native,TBT/USB) and we don't want 2852 * to detect it. 2853 */ 2854 if (intel_phy_is_tc(i915, phy)) 2855 continue; 2856 2857 /* Create fake child device config */ 2858 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2859 if (!devdata) 2860 break; 2861 2862 devdata->i915 = i915; 2863 child = &devdata->child; 2864 2865 if (port == PORT_F) 2866 child->dvo_port = DVO_PORT_HDMIF; 2867 else if (port == PORT_E) 2868 child->dvo_port = DVO_PORT_HDMIE; 2869 else 2870 child->dvo_port = DVO_PORT_HDMIA + port; 2871 2872 if (port != PORT_A && port != PORT_E) 2873 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING; 2874 2875 if (port != PORT_E) 2876 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2877 2878 if (port == PORT_A) 2879 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; 2880 2881 list_add_tail(&devdata->node, &i915->display.vbt.display_devices); 2882 2883 drm_dbg_kms(&i915->drm, 2884 "Generating default VBT child device with type 0x04%x on port %c\n", 2885 child->device_type, port_name(port)); 2886 } 2887 2888 /* Bypass some minimum baseline VBT version checks */ 2889 i915->display.vbt.version = 155; 2890} 2891 2892static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2893{ 2894 const void *_vbt = vbt; 2895 2896 return _vbt + vbt->bdb_offset; 2897} 2898 2899#include <dev/isa/isareg.h> 2900#include <dev/isa/isavar.h> 2901 2902#define VGA_BIOS_ADDR 0xc0000 2903#define VGA_BIOS_LEN 0x10000 2904 2905/** 2906 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 2907 * @buf: pointer to a buffer to validate 2908 * @size: size of the buffer 2909 * 2910 * Returns true on valid VBT. 2911 */ 2912bool intel_bios_is_valid_vbt(const void *buf, size_t size) 2913{ 2914 const struct vbt_header *vbt = buf; 2915 const struct bdb_header *bdb; 2916 2917 if (!vbt) 2918 return false; 2919 2920 if (sizeof(struct vbt_header) > size) { 2921 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 2922 return false; 2923 } 2924 2925 if (memcmp(vbt->signature, "$VBT", 4)) { 2926 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 2927 return false; 2928 } 2929 2930 if (vbt->vbt_size > size) { 2931 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2932 return false; 2933 } 2934 2935 size = vbt->vbt_size; 2936 2937 if (range_overflows_t(size_t, 2938 vbt->bdb_offset, 2939 sizeof(struct bdb_header), 2940 size)) { 2941 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 2942 return false; 2943 } 2944 2945 bdb = get_bdb_header(vbt); 2946 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 2947 DRM_DEBUG_DRIVER("BDB incomplete\n"); 2948 return false; 2949 } 2950 2951 return vbt; 2952} 2953 2954static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset) 2955{ 2956 intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, offset); 2957 2958 return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER); 2959} 2960 2961static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) 2962{ 2963 u32 count, data, found, store = 0; 2964 u32 static_region, oprom_offset; 2965 u32 oprom_size = 0x200000; 2966 u16 vbt_size; 2967 u32 *vbt; 2968 2969 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS); 2970 static_region &= OPTIONROM_SPI_REGIONID_MASK; 2971 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region); 2972 2973 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET); 2974 oprom_offset &= OROM_OFFSET_MASK; 2975 2976 for (count = 0; count < oprom_size; count += 4) { 2977 data = intel_spi_read(&i915->uncore, oprom_offset + count); 2978 if (data == *((const u32 *)"$VBT")) { 2979 found = oprom_offset + count; 2980 break; 2981 } 2982 } 2983 2984 if (count >= oprom_size) 2985 goto err_not_found; 2986 2987 /* Get VBT size and allocate space for the VBT */ 2988 vbt_size = intel_spi_read(&i915->uncore, 2989 found + offsetof(struct vbt_header, vbt_size)); 2990 vbt_size &= 0xffff; 2991 2992 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); 2993 if (!vbt) 2994 goto err_not_found; 2995 2996 for (count = 0; count < vbt_size; count += 4) 2997 *(vbt + store++) = intel_spi_read(&i915->uncore, found + count); 2998 2999 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 3000 goto err_free_vbt; 3001 3002 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n"); 3003 3004 return (struct vbt_header *)vbt; 3005 3006err_free_vbt: 3007 kfree(vbt); 3008err_not_found: 3009 return NULL; 3010} 3011 3012static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) 3013{ 3014#ifdef __linux__ 3015 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); 3016#endif 3017 void __iomem *p = NULL, *oprom; 3018 struct vbt_header *vbt; 3019 u16 vbt_size; 3020 size_t i, size; 3021 3022#ifdef __linux__ 3023 oprom = pci_map_rom(pdev, &size); 3024 if (!oprom) 3025 return NULL; 3026#else 3027 oprom = (u8 *)ISA_HOLE_VADDR(VGA_BIOS_ADDR); 3028 size = VGA_BIOS_LEN; 3029#endif 3030 3031 /* Scour memory looking for the VBT signature. */ 3032 for (i = 0; i + 4 < size; i += 4) { 3033 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 3034 continue; 3035 3036 p = oprom + i; 3037 size -= i; 3038 break; 3039 } 3040 3041 if (!p) 3042 goto err_unmap_oprom; 3043 3044 if (sizeof(struct vbt_header) > size) { 3045 drm_dbg(&i915->drm, "VBT header incomplete\n"); 3046 goto err_unmap_oprom; 3047 } 3048 3049 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 3050 if (vbt_size > size) { 3051 drm_dbg(&i915->drm, 3052 "VBT incomplete (vbt_size overflows)\n"); 3053 goto err_unmap_oprom; 3054 } 3055 3056 /* The rest will be validated by intel_bios_is_valid_vbt() */ 3057 vbt = kmalloc(vbt_size, GFP_KERNEL); 3058 if (!vbt) 3059 goto err_unmap_oprom; 3060 3061 memcpy_fromio(vbt, p, vbt_size); 3062 3063 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 3064 goto err_free_vbt; 3065 3066#ifdef __linux__ 3067 pci_unmap_rom(pdev, oprom); 3068#endif 3069 3070 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n"); 3071 3072 return vbt; 3073 3074err_free_vbt: 3075 kfree(vbt); 3076err_unmap_oprom: 3077#ifdef __linux__ 3078 pci_unmap_rom(pdev, oprom); 3079#endif 3080 3081 return NULL; 3082} 3083 3084/** 3085 * intel_bios_init - find VBT and initialize settings from the BIOS 3086 * @i915: i915 device instance 3087 * 3088 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 3089 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 3090 * initialize some defaults if the VBT is not present at all. 3091 */ 3092void intel_bios_init(struct drm_i915_private *i915) 3093{ 3094 const struct vbt_header *vbt = i915->display.opregion.vbt; 3095 struct vbt_header *oprom_vbt = NULL; 3096 const struct bdb_header *bdb; 3097 3098 INIT_LIST_HEAD(&i915->display.vbt.display_devices); 3099 INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks); 3100 3101 if (!HAS_DISPLAY(i915)) { 3102 drm_dbg_kms(&i915->drm, 3103 "Skipping VBT init due to disabled display.\n"); 3104 return; 3105 } 3106 3107 init_vbt_defaults(i915); 3108 3109 /* 3110 * If the OpRegion does not have VBT, look in SPI flash through MMIO or 3111 * PCI mapping 3112 */ 3113 if (!vbt && IS_DGFX(i915)) { 3114 oprom_vbt = spi_oprom_get_vbt(i915); 3115 vbt = oprom_vbt; 3116 } 3117 3118 if (!vbt) { 3119 oprom_vbt = oprom_get_vbt(i915); 3120 vbt = oprom_vbt; 3121 } 3122 3123 if (!vbt) 3124 goto out; 3125 3126 bdb = get_bdb_header(vbt); 3127 i915->display.vbt.version = bdb->version; 3128 3129 drm_dbg_kms(&i915->drm, 3130 "VBT signature \"%.*s\", BDB version %d\n", 3131 (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version); 3132 3133 init_bdb_blocks(i915, bdb); 3134 3135 /* Grab useful general definitions */ 3136 parse_general_features(i915); 3137 parse_general_definitions(i915); 3138 parse_driver_features(i915); 3139 3140 /* Depends on child device list */ 3141 parse_compression_parameters(i915); 3142 3143out: 3144 if (!vbt) { 3145 drm_info(&i915->drm, 3146 "Failed to find VBIOS tables (VBT)\n"); 3147 init_vbt_missing_defaults(i915); 3148 } 3149 3150 /* Further processing on pre-parsed or generated child device data */ 3151 parse_sdvo_device_mapping(i915); 3152 parse_ddi_ports(i915); 3153 3154 kfree(oprom_vbt); 3155} 3156 3157static void intel_bios_init_panel(struct drm_i915_private *i915, 3158 struct intel_panel *panel, 3159 const struct intel_bios_encoder_data *devdata, 3160 const struct drm_edid *drm_edid, 3161 bool use_fallback) 3162{ 3163 /* already have it? */ 3164 if (panel->vbt.panel_type >= 0) { 3165 drm_WARN_ON(&i915->drm, !use_fallback); 3166 return; 3167 } 3168 3169 panel->vbt.panel_type = get_panel_type(i915, devdata, 3170 drm_edid, use_fallback); 3171 if (panel->vbt.panel_type < 0) { 3172 drm_WARN_ON(&i915->drm, use_fallback); 3173 return; 3174 } 3175 3176 init_vbt_panel_defaults(panel); 3177 3178 parse_panel_options(i915, panel); 3179 parse_generic_dtd(i915, panel); 3180 parse_lfp_data(i915, panel); 3181 parse_lfp_backlight(i915, panel); 3182 parse_sdvo_panel_data(i915, panel); 3183 parse_panel_driver_features(i915, panel); 3184 parse_power_conservation_features(i915, panel); 3185 parse_edp(i915, panel); 3186 parse_psr(i915, panel); 3187 parse_mipi_config(i915, panel); 3188 parse_mipi_sequence(i915, panel); 3189} 3190 3191void intel_bios_init_panel_early(struct drm_i915_private *i915, 3192 struct intel_panel *panel, 3193 const struct intel_bios_encoder_data *devdata) 3194{ 3195 intel_bios_init_panel(i915, panel, devdata, NULL, false); 3196} 3197 3198void intel_bios_init_panel_late(struct drm_i915_private *i915, 3199 struct intel_panel *panel, 3200 const struct intel_bios_encoder_data *devdata, 3201 const struct drm_edid *drm_edid) 3202{ 3203 intel_bios_init_panel(i915, panel, devdata, drm_edid, true); 3204} 3205 3206/** 3207 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 3208 * @i915: i915 device instance 3209 */ 3210void intel_bios_driver_remove(struct drm_i915_private *i915) 3211{ 3212 struct intel_bios_encoder_data *devdata, *nd; 3213 struct bdb_block_entry *entry, *ne; 3214 3215 list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) { 3216 list_del(&devdata->node); 3217 kfree(devdata->dsc); 3218 kfree(devdata); 3219 } 3220 3221 list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) { 3222 list_del(&entry->node); 3223 kfree(entry); 3224 } 3225} 3226 3227void intel_bios_fini_panel(struct intel_panel *panel) 3228{ 3229 kfree(panel->vbt.sdvo_lvds_vbt_mode); 3230 panel->vbt.sdvo_lvds_vbt_mode = NULL; 3231 kfree(panel->vbt.lfp_lvds_vbt_mode); 3232 panel->vbt.lfp_lvds_vbt_mode = NULL; 3233 kfree(panel->vbt.dsi.data); 3234 panel->vbt.dsi.data = NULL; 3235 kfree(panel->vbt.dsi.pps); 3236 panel->vbt.dsi.pps = NULL; 3237 kfree(panel->vbt.dsi.config); 3238 panel->vbt.dsi.config = NULL; 3239 kfree(panel->vbt.dsi.deassert_seq); 3240 panel->vbt.dsi.deassert_seq = NULL; 3241} 3242 3243/** 3244 * intel_bios_is_tv_present - is integrated TV present in VBT 3245 * @i915: i915 device instance 3246 * 3247 * Return true if TV is present. If no child devices were parsed from VBT, 3248 * assume TV is present. 3249 */ 3250bool intel_bios_is_tv_present(struct drm_i915_private *i915) 3251{ 3252 const struct intel_bios_encoder_data *devdata; 3253 3254 if (!i915->display.vbt.int_tv_support) 3255 return false; 3256 3257 if (list_empty(&i915->display.vbt.display_devices)) 3258 return true; 3259 3260 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3261 const struct child_device_config *child = &devdata->child; 3262 3263 /* 3264 * If the device type is not TV, continue. 3265 */ 3266 switch (child->device_type) { 3267 case DEVICE_TYPE_INT_TV: 3268 case DEVICE_TYPE_TV: 3269 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 3270 break; 3271 default: 3272 continue; 3273 } 3274 /* Only when the addin_offset is non-zero, it is regarded 3275 * as present. 3276 */ 3277 if (child->addin_offset) 3278 return true; 3279 } 3280 3281 return false; 3282} 3283 3284/** 3285 * intel_bios_is_lvds_present - is LVDS present in VBT 3286 * @i915: i915 device instance 3287 * @i2c_pin: i2c pin for LVDS if present 3288 * 3289 * Return true if LVDS is present. If no child devices were parsed from VBT, 3290 * assume LVDS is present. 3291 */ 3292bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin) 3293{ 3294 const struct intel_bios_encoder_data *devdata; 3295 3296 if (list_empty(&i915->display.vbt.display_devices)) 3297 return true; 3298 3299 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3300 const struct child_device_config *child = &devdata->child; 3301 3302 /* If the device type is not LFP, continue. 3303 * We have to check both the new identifiers as well as the 3304 * old for compatibility with some BIOSes. 3305 */ 3306 if (child->device_type != DEVICE_TYPE_INT_LFP && 3307 child->device_type != DEVICE_TYPE_LFP) 3308 continue; 3309 3310 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin)) 3311 *i2c_pin = child->i2c_pin; 3312 3313 /* However, we cannot trust the BIOS writers to populate 3314 * the VBT correctly. Since LVDS requires additional 3315 * information from AIM blocks, a non-zero addin offset is 3316 * a good indicator that the LVDS is actually present. 3317 */ 3318 if (child->addin_offset) 3319 return true; 3320 3321 /* But even then some BIOS writers perform some black magic 3322 * and instantiate the device without reference to any 3323 * additional data. Trust that if the VBT was written into 3324 * the OpRegion then they have validated the LVDS's existence. 3325 */ 3326 if (i915->display.opregion.vbt) 3327 return true; 3328 } 3329 3330 return false; 3331} 3332 3333/** 3334 * intel_bios_is_port_present - is the specified digital port present 3335 * @i915: i915 device instance 3336 * @port: port to check 3337 * 3338 * Return true if the device in %port is present. 3339 */ 3340bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port) 3341{ 3342 const struct intel_bios_encoder_data *devdata; 3343 3344 if (WARN_ON(!has_ddi_port_info(i915))) 3345 return true; 3346 3347 if (!is_port_valid(i915, port)) 3348 return false; 3349 3350 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3351 const struct child_device_config *child = &devdata->child; 3352 3353 if (dvo_port_to_port(i915, child->dvo_port) == port) 3354 return true; 3355 } 3356 3357 return false; 3358} 3359 3360bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata) 3361{ 3362 const struct child_device_config *child = &devdata->child; 3363 3364 if (!devdata) 3365 return false; 3366 3367 if (!intel_bios_encoder_supports_dp(devdata) || 3368 !intel_bios_encoder_supports_hdmi(devdata)) 3369 return false; 3370 3371 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA) 3372 return true; 3373 3374 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 3375 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA && 3376 child->aux_channel != 0) 3377 return true; 3378 3379 return false; 3380} 3381 3382/** 3383 * intel_bios_is_dsi_present - is DSI present in VBT 3384 * @i915: i915 device instance 3385 * @port: port for DSI if present 3386 * 3387 * Return true if DSI is present, and return the port in %port. 3388 */ 3389bool intel_bios_is_dsi_present(struct drm_i915_private *i915, 3390 enum port *port) 3391{ 3392 const struct intel_bios_encoder_data *devdata; 3393 3394 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3395 const struct child_device_config *child = &devdata->child; 3396 u8 dvo_port = child->dvo_port; 3397 3398 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3399 continue; 3400 3401 if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) { 3402 drm_dbg_kms(&i915->drm, 3403 "VBT has unsupported DSI port %c\n", 3404 port_name(dvo_port - DVO_PORT_MIPIA)); 3405 continue; 3406 } 3407 3408 if (port) 3409 *port = dsi_dvo_port_to_port(i915, dvo_port); 3410 return true; 3411 } 3412 3413 return false; 3414} 3415 3416static void fill_dsc(struct intel_crtc_state *crtc_state, 3417 struct dsc_compression_parameters_entry *dsc, 3418 int dsc_max_bpc) 3419{ 3420 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 3421 int bpc = 8; 3422 3423 vdsc_cfg->dsc_version_major = dsc->version_major; 3424 vdsc_cfg->dsc_version_minor = dsc->version_minor; 3425 3426 if (dsc->support_12bpc && dsc_max_bpc >= 12) 3427 bpc = 12; 3428 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 3429 bpc = 10; 3430 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 3431 bpc = 8; 3432 else 3433 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 3434 dsc_max_bpc); 3435 3436 crtc_state->pipe_bpp = bpc * 3; 3437 3438 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 3439 VBT_DSC_MAX_BPP(dsc->max_bpp)); 3440 3441 /* 3442 * FIXME: This is ugly, and slice count should take DSC engine 3443 * throughput etc. into account. 3444 * 3445 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 3446 */ 3447 if (dsc->slices_per_line & BIT(2)) { 3448 crtc_state->dsc.slice_count = 4; 3449 } else if (dsc->slices_per_line & BIT(1)) { 3450 crtc_state->dsc.slice_count = 2; 3451 } else { 3452 /* FIXME */ 3453 if (!(dsc->slices_per_line & BIT(0))) 3454 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 3455 3456 crtc_state->dsc.slice_count = 1; 3457 } 3458 3459 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 3460 crtc_state->dsc.slice_count != 0) 3461 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 3462 crtc_state->hw.adjusted_mode.crtc_hdisplay, 3463 crtc_state->dsc.slice_count); 3464 3465 /* 3466 * The VBT rc_buffer_block_size and rc_buffer_size definitions 3467 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. 3468 */ 3469 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, 3470 dsc->rc_buffer_size); 3471 3472 /* FIXME: DSI spec says bpc + 1 for this one */ 3473 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 3474 3475 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 3476 3477 vdsc_cfg->slice_height = dsc->slice_height; 3478} 3479 3480/* FIXME: initially DSI specific */ 3481bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 3482 struct intel_crtc_state *crtc_state, 3483 int dsc_max_bpc) 3484{ 3485 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3486 const struct intel_bios_encoder_data *devdata; 3487 3488 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3489 const struct child_device_config *child = &devdata->child; 3490 3491 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3492 continue; 3493 3494 if (dsi_dvo_port_to_port(i915, child->dvo_port) == encoder->port) { 3495 if (!devdata->dsc) 3496 return false; 3497 3498 if (crtc_state) 3499 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 3500 3501 return true; 3502 } 3503 } 3504 3505 return false; 3506} 3507 3508static const u8 adlp_aux_ch_map[] = { 3509 [AUX_CH_A] = DP_AUX_A, 3510 [AUX_CH_B] = DP_AUX_B, 3511 [AUX_CH_C] = DP_AUX_C, 3512 [AUX_CH_D_XELPD] = DP_AUX_D, 3513 [AUX_CH_E_XELPD] = DP_AUX_E, 3514 [AUX_CH_USBC1] = DP_AUX_F, 3515 [AUX_CH_USBC2] = DP_AUX_G, 3516 [AUX_CH_USBC3] = DP_AUX_H, 3517 [AUX_CH_USBC4] = DP_AUX_I, 3518}; 3519 3520/* 3521 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E 3522 * map to DDI A,TC1,TC2,TC3,TC4 respectively. 3523 */ 3524static const u8 adls_aux_ch_map[] = { 3525 [AUX_CH_A] = DP_AUX_A, 3526 [AUX_CH_USBC1] = DP_AUX_B, 3527 [AUX_CH_USBC2] = DP_AUX_C, 3528 [AUX_CH_USBC3] = DP_AUX_D, 3529 [AUX_CH_USBC4] = DP_AUX_E, 3530}; 3531 3532/* 3533 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D 3534 * map to DDI A,B,TC1,TC2 respectively. 3535 */ 3536static const u8 rkl_aux_ch_map[] = { 3537 [AUX_CH_A] = DP_AUX_A, 3538 [AUX_CH_B] = DP_AUX_B, 3539 [AUX_CH_USBC1] = DP_AUX_C, 3540 [AUX_CH_USBC2] = DP_AUX_D, 3541}; 3542 3543static const u8 direct_aux_ch_map[] = { 3544 [AUX_CH_A] = DP_AUX_A, 3545 [AUX_CH_B] = DP_AUX_B, 3546 [AUX_CH_C] = DP_AUX_C, 3547 [AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */ 3548 [AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */ 3549 [AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */ 3550 [AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */ 3551 [AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */ 3552 [AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */ 3553}; 3554 3555static enum aux_ch map_aux_ch(struct drm_i915_private *i915, u8 aux_channel) 3556{ 3557 const u8 *aux_ch_map; 3558 int i, n_entries; 3559 3560 if (DISPLAY_VER(i915) >= 13) { 3561 aux_ch_map = adlp_aux_ch_map; 3562 n_entries = ARRAY_SIZE(adlp_aux_ch_map); 3563 } else if (IS_ALDERLAKE_S(i915)) { 3564 aux_ch_map = adls_aux_ch_map; 3565 n_entries = ARRAY_SIZE(adls_aux_ch_map); 3566 } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) { 3567 aux_ch_map = rkl_aux_ch_map; 3568 n_entries = ARRAY_SIZE(rkl_aux_ch_map); 3569 } else { 3570 aux_ch_map = direct_aux_ch_map; 3571 n_entries = ARRAY_SIZE(direct_aux_ch_map); 3572 } 3573 3574 for (i = 0; i < n_entries; i++) { 3575 if (aux_ch_map[i] == aux_channel) 3576 return i; 3577 } 3578 3579 drm_dbg_kms(&i915->drm, 3580 "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n", 3581 aux_channel); 3582 3583 return AUX_CH_NONE; 3584} 3585 3586enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata) 3587{ 3588 if (!devdata || !devdata->child.aux_channel) 3589 return AUX_CH_NONE; 3590 3591 return map_aux_ch(devdata->i915, devdata->child.aux_channel); 3592} 3593 3594bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata) 3595{ 3596 struct drm_i915_private *i915; 3597 u8 aux_channel; 3598 int count = 0; 3599 3600 if (!devdata || !devdata->child.aux_channel) 3601 return false; 3602 3603 i915 = devdata->i915; 3604 aux_channel = devdata->child.aux_channel; 3605 3606 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3607 if (intel_bios_encoder_supports_dp(devdata) && 3608 aux_channel == devdata->child.aux_channel) 3609 count++; 3610 } 3611 3612 return count > 1; 3613} 3614 3615int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata) 3616{ 3617 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost) 3618 return 0; 3619 3620 return translate_iboost(devdata->child.dp_iboost_level); 3621} 3622 3623int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) 3624{ 3625 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost) 3626 return 0; 3627 3628 return translate_iboost(devdata->child.hdmi_iboost_level); 3629} 3630 3631int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata) 3632{ 3633 if (!devdata || !devdata->child.ddc_pin) 3634 return 0; 3635 3636 return map_ddc_pin(devdata->i915, devdata->child.ddc_pin); 3637} 3638 3639bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) 3640{ 3641 return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c; 3642} 3643 3644bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) 3645{ 3646 return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt; 3647} 3648 3649bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata) 3650{ 3651 return devdata && devdata->child.lane_reversal; 3652} 3653 3654bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata) 3655{ 3656 return devdata && devdata->child.hpd_invert; 3657} 3658 3659const struct intel_bios_encoder_data * 3660intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port) 3661{ 3662 struct intel_bios_encoder_data *devdata; 3663 3664 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3665 if (intel_bios_encoder_port(devdata) == port) 3666 return devdata; 3667 } 3668 3669 return NULL; 3670} 3671 3672void intel_bios_for_each_encoder(struct drm_i915_private *i915, 3673 void (*func)(struct drm_i915_private *i915, 3674 const struct intel_bios_encoder_data *devdata)) 3675{ 3676 struct intel_bios_encoder_data *devdata; 3677 3678 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) 3679 func(i915, devdata); 3680} 3681