1214501Srpaulo/* 2214501Srpaulo * Copyright 2012-15 Advanced Micro Devices, Inc. 3214501Srpaulo * 4214501Srpaulo * Permission is hereby granted, free of charge, to any person obtaining a 5252726Srpaulo * copy of this software and associated documentation files (the "Software"), 6252726Srpaulo * to deal in the Software without restriction, including without limitation 7214501Srpaulo * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8214501Srpaulo * and/or sell copies of the Software, and to permit persons to whom the 9214501Srpaulo * Software is furnished to do so, subject to the following conditions: 10214501Srpaulo * 11214501Srpaulo * The above copyright notice and this permission notice shall be included in 12214501Srpaulo * all copies or substantial portions of the Software. 13214501Srpaulo * 14214501Srpaulo * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15214501Srpaulo * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16214501Srpaulo * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17214501Srpaulo * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18214501Srpaulo * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19214501Srpaulo * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20214501Srpaulo * OTHER DEALINGS IN THE SOFTWARE. 21214501Srpaulo * 22281806Srpaulo * Authors: AMD 23214501Srpaulo * 24214501Srpaulo */ 25214501Srpaulo 26214501Srpaulo#ifndef __DAL_GPIO_TYPES_H__ 27214501Srpaulo#define __DAL_GPIO_TYPES_H__ 28214501Srpaulo 29214501Srpaulo#define BUNDLE_A_MASK 0x00FFF000L 30214501Srpaulo#define BUNDLE_B_MASK 0x00000FFFL 31214501Srpaulo 32214501Srpaulo/* 33214501Srpaulo * gpio_result 34214501Srpaulo * 35214501Srpaulo * @brief 36214501Srpaulo * The possible return codes that the GPIO object can return. 37214501Srpaulo * These return codes can be generated 38214501Srpaulo * directly by the GPIO object or from the GPIOPin object. 39214501Srpaulo */ 40214501Srpauloenum gpio_result { 41214501Srpaulo GPIO_RESULT_OK, 42281806Srpaulo GPIO_RESULT_NULL_HANDLE, 43214501Srpaulo GPIO_RESULT_INVALID_DATA, 44214501Srpaulo GPIO_RESULT_DEVICE_BUSY, 45214501Srpaulo GPIO_RESULT_OPEN_FAILED, 46214501Srpaulo GPIO_RESULT_ALREADY_OPENED, 47214501Srpaulo GPIO_RESULT_NON_SPECIFIC_ERROR 48214501Srpaulo}; 49214501Srpaulo 50214501Srpaulo/* 51214501Srpaulo * @brief 52214501Srpaulo * Used to identify the specific GPIO device 53214501Srpaulo * 54214501Srpaulo * @notes 55214501Srpaulo * These constants are used as indices in a vector. 56214501Srpaulo * Thus they should start from zero and be contiguous. 57214501Srpaulo */ 58214501Srpauloenum gpio_id { 59214501Srpaulo GPIO_ID_UNKNOWN = (-1), 60214501Srpaulo GPIO_ID_DDC_DATA, 61214501Srpaulo GPIO_ID_DDC_CLOCK, 62214501Srpaulo GPIO_ID_GENERIC, 63214501Srpaulo GPIO_ID_HPD, 64214501Srpaulo GPIO_ID_GPIO_PAD, 65214501Srpaulo GPIO_ID_VIP_PAD, 66214501Srpaulo GPIO_ID_SYNC, 67214501Srpaulo GPIO_ID_GSL, /* global swap lock */ 68214501Srpaulo GPIO_ID_COUNT, 69214501Srpaulo GPIO_ID_MIN = GPIO_ID_DDC_DATA, 70214501Srpaulo GPIO_ID_MAX = GPIO_ID_GSL 71214501Srpaulo}; 72214501Srpaulo 73214501Srpaulo#define GPIO_ENUM_UNKNOWN \ 74214501Srpaulo 32 75214501Srpaulo 76214501Srpaulostruct gpio_pin_info { 77214501Srpaulo uint32_t offset; 78214501Srpaulo uint32_t offset_y; 79214501Srpaulo uint32_t offset_en; 80214501Srpaulo uint32_t offset_mask; 81214501Srpaulo 82214501Srpaulo uint32_t mask; 83214501Srpaulo uint32_t mask_y; 84214501Srpaulo uint32_t mask_en; 85214501Srpaulo uint32_t mask_mask; 86214501Srpaulo}; 87214501Srpaulo 88214501Srpauloenum gpio_pin_output_state { 89214501Srpaulo GPIO_PIN_OUTPUT_STATE_ACTIVE_LOW, 90214501Srpaulo GPIO_PIN_OUTPUT_STATE_ACTIVE_HIGH, 91214501Srpaulo GPIO_PIN_OUTPUT_STATE_DEFAULT = GPIO_PIN_OUTPUT_STATE_ACTIVE_LOW 92214501Srpaulo}; 93214501Srpaulo 94214501Srpauloenum gpio_generic { 95214501Srpaulo GPIO_GENERIC_UNKNOWN = (-1), 96214501Srpaulo GPIO_GENERIC_A, 97214501Srpaulo GPIO_GENERIC_B, 98214501Srpaulo GPIO_GENERIC_C, 99214501Srpaulo GPIO_GENERIC_D, 100214501Srpaulo GPIO_GENERIC_E, 101214501Srpaulo GPIO_GENERIC_F, 102214501Srpaulo GPIO_GENERIC_G, 103214501Srpaulo GPIO_GENERIC_COUNT, 104214501Srpaulo GPIO_GENERIC_MIN = GPIO_GENERIC_A, 105214501Srpaulo GPIO_GENERIC_MAX = GPIO_GENERIC_B 106214501Srpaulo}; 107214501Srpaulo 108214501Srpauloenum gpio_hpd { 109214501Srpaulo GPIO_HPD_UNKNOWN = (-1), 110214501Srpaulo GPIO_HPD_1, 111214501Srpaulo GPIO_HPD_2, 112214501Srpaulo GPIO_HPD_3, 113214501Srpaulo GPIO_HPD_4, 114214501Srpaulo GPIO_HPD_5, 115214501Srpaulo GPIO_HPD_6, 116214501Srpaulo GPIO_HPD_COUNT, 117214501Srpaulo GPIO_HPD_MIN = GPIO_HPD_1, 118214501Srpaulo GPIO_HPD_MAX = GPIO_HPD_6 119214501Srpaulo}; 120214501Srpaulo 121214501Srpauloenum gpio_gpio_pad { 122214501Srpaulo GPIO_GPIO_PAD_UNKNOWN = (-1), 123214501Srpaulo GPIO_GPIO_PAD_0, 124214501Srpaulo GPIO_GPIO_PAD_1, 125214501Srpaulo GPIO_GPIO_PAD_2, 126214501Srpaulo GPIO_GPIO_PAD_3, 127214501Srpaulo GPIO_GPIO_PAD_4, 128214501Srpaulo GPIO_GPIO_PAD_5, 129214501Srpaulo GPIO_GPIO_PAD_6, 130214501Srpaulo GPIO_GPIO_PAD_7, 131214501Srpaulo GPIO_GPIO_PAD_8, 132214501Srpaulo GPIO_GPIO_PAD_9, 133214501Srpaulo GPIO_GPIO_PAD_10, 134214501Srpaulo GPIO_GPIO_PAD_11, 135214501Srpaulo GPIO_GPIO_PAD_12, 136214501Srpaulo GPIO_GPIO_PAD_13, 137214501Srpaulo GPIO_GPIO_PAD_14, 138214501Srpaulo GPIO_GPIO_PAD_15, 139214501Srpaulo GPIO_GPIO_PAD_16, 140214501Srpaulo GPIO_GPIO_PAD_17, 141214501Srpaulo GPIO_GPIO_PAD_18, 142214501Srpaulo GPIO_GPIO_PAD_19, 143214501Srpaulo GPIO_GPIO_PAD_20, 144214501Srpaulo GPIO_GPIO_PAD_21, 145214501Srpaulo GPIO_GPIO_PAD_22, 146214501Srpaulo GPIO_GPIO_PAD_23, 147214501Srpaulo GPIO_GPIO_PAD_24, 148214501Srpaulo GPIO_GPIO_PAD_25, 149214501Srpaulo GPIO_GPIO_PAD_26, 150214501Srpaulo GPIO_GPIO_PAD_27, 151214501Srpaulo GPIO_GPIO_PAD_28, 152214501Srpaulo GPIO_GPIO_PAD_29, 153214501Srpaulo GPIO_GPIO_PAD_30, 154214501Srpaulo GPIO_GPIO_PAD_COUNT, 155214501Srpaulo GPIO_GPIO_PAD_MIN = GPIO_GPIO_PAD_0, 156214501Srpaulo GPIO_GPIO_PAD_MAX = GPIO_GPIO_PAD_30 157214501Srpaulo}; 158214501Srpaulo 159214501Srpauloenum gpio_vip_pad { 160214501Srpaulo GPIO_VIP_PAD_UNKNOWN = (-1), 161214501Srpaulo /* following never used - 162214501Srpaulo * GPIO_ID_DDC_CLOCK::GPIO_DDC_LINE_VIP_PAD defined instead */ 163214501Srpaulo GPIO_VIP_PAD_SCL, 164214501Srpaulo /* following never used - 165214501Srpaulo * GPIO_ID_DDC_DATA::GPIO_DDC_LINE_VIP_PAD defined instead */ 166214501Srpaulo GPIO_VIP_PAD_SDA, 167214501Srpaulo GPIO_VIP_PAD_VHAD, 168214501Srpaulo GPIO_VIP_PAD_VPHCTL, 169214501Srpaulo GPIO_VIP_PAD_VIPCLK, 170214501Srpaulo GPIO_VIP_PAD_VID, 171214501Srpaulo GPIO_VIP_PAD_VPCLK0, 172214501Srpaulo GPIO_VIP_PAD_DVALID, 173214501Srpaulo GPIO_VIP_PAD_PSYNC, 174214501Srpaulo GPIO_VIP_PAD_COUNT, 175214501Srpaulo GPIO_VIP_PAD_MIN = GPIO_VIP_PAD_SCL, 176214501Srpaulo GPIO_VIP_PAD_MAX = GPIO_VIP_PAD_PSYNC 177214501Srpaulo}; 178214501Srpaulo 179214501Srpauloenum gpio_sync { 180214501Srpaulo GPIO_SYNC_UNKNOWN = (-1), 181214501Srpaulo GPIO_SYNC_HSYNC_A, 182214501Srpaulo GPIO_SYNC_VSYNC_A, 183214501Srpaulo GPIO_SYNC_HSYNC_B, 184214501Srpaulo GPIO_SYNC_VSYNC_B, 185214501Srpaulo GPIO_SYNC_COUNT, 186214501Srpaulo GPIO_SYNC_MIN = GPIO_SYNC_HSYNC_A, 187214501Srpaulo GPIO_SYNC_MAX = GPIO_SYNC_VSYNC_B 188214501Srpaulo}; 189214501Srpaulo 190214501Srpauloenum gpio_gsl { 191214501Srpaulo GPIO_GSL_UNKNOWN = (-1), 192214501Srpaulo GPIO_GSL_GENLOCK_CLOCK, 193214501Srpaulo GPIO_GSL_GENLOCK_VSYNC, 194214501Srpaulo GPIO_GSL_SWAPLOCK_A, 195214501Srpaulo GPIO_GSL_SWAPLOCK_B, 196214501Srpaulo GPIO_GSL_COUNT, 197214501Srpaulo GPIO_GSL_MIN = GPIO_GSL_GENLOCK_CLOCK, 198214501Srpaulo GPIO_GSL_MAX = GPIO_GSL_SWAPLOCK_B 199214501Srpaulo}; 200214501Srpaulo 201214501Srpaulo/* 202214501Srpaulo * @brief 203214501Srpaulo * Unique Id for DDC handle. 204214501Srpaulo * Values are meaningful (used as indexes to array) 205214501Srpaulo */ 206214501Srpauloenum gpio_ddc_line { 207214501Srpaulo GPIO_DDC_LINE_UNKNOWN = (-1), 208214501Srpaulo GPIO_DDC_LINE_DDC1, 209214501Srpaulo GPIO_DDC_LINE_DDC2, 210214501Srpaulo GPIO_DDC_LINE_DDC3, 211214501Srpaulo GPIO_DDC_LINE_DDC4, 212214501Srpaulo GPIO_DDC_LINE_DDC5, 213214501Srpaulo GPIO_DDC_LINE_DDC6, 214214501Srpaulo GPIO_DDC_LINE_DDC_VGA, 215214501Srpaulo GPIO_DDC_LINE_VIP_PAD, 216214501Srpaulo GPIO_DDC_LINE_I2C_PAD = GPIO_DDC_LINE_VIP_PAD, 217214501Srpaulo GPIO_DDC_LINE_COUNT, 218214501Srpaulo GPIO_DDC_LINE_MIN = GPIO_DDC_LINE_DDC1, 219214501Srpaulo GPIO_DDC_LINE_MAX = GPIO_DDC_LINE_I2C_PAD 220214501Srpaulo}; 221214501Srpaulo 222214501Srpaulo/* 223214501Srpaulo * @brief 224214501Srpaulo * Identifies the mode of operation to open a GPIO device. 225214501Srpaulo * A GPIO device (pin) can be programmed in only one of these modes at a time. 226214501Srpaulo */ 227214501Srpauloenum gpio_mode { 228214501Srpaulo GPIO_MODE_UNKNOWN = (-1), 229214501Srpaulo GPIO_MODE_INPUT, 230214501Srpaulo GPIO_MODE_OUTPUT, 231214501Srpaulo GPIO_MODE_FAST_OUTPUT, 232214501Srpaulo GPIO_MODE_HARDWARE, 233214501Srpaulo GPIO_MODE_INTERRUPT 234214501Srpaulo}; 235214501Srpaulo 236214501Srpaulo/* 237214501Srpaulo * @brief 238214501Srpaulo * Identifies the source of the signal when GPIO is in HW mode. 239214501Srpaulo * get_signal_source() will return GPIO_SYGNAL_SOURCE__UNKNOWN 240214501Srpaulo * when one of the following holds: 241214501Srpaulo * 1. GPIO is input GPIO 242214501Srpaulo * 2. GPIO is not opened in HW mode 243214501Srpaulo * 3. GPIO does not have fixed signal source 244214501Srpaulo * (like DC_GenericA have mux instead fixed) 245214501Srpaulo */ 246214501Srpauloenum gpio_signal_source { 247214501Srpaulo GPIO_SIGNAL_SOURCE_UNKNOWN = (-1), 248214501Srpaulo GPIO_SIGNAL_SOURCE_DACA_STEREO_SYNC, 249214501Srpaulo GPIO_SIGNAL_SOURCE_PASS_THROUGH_STEREO_SYNC, 250214501Srpaulo GPIO_SIGNAL_SOURCE_DACB_STEREO_SYNC, 251214501Srpaulo GPIO_SIGNAL_SOURCE_DACA_HSYNC, 252214501Srpaulo GPIO_SIGNAL_SOURCE_DACB_HSYNC, 253214501Srpaulo GPIO_SIGNAL_SOURCE_DACA_VSYNC, 254214501Srpaulo GPIO_SIGNAL_SOURCE_DACB_VSYNC, 255214501Srpaulo}; 256214501Srpaulo 257214501Srpauloenum gpio_stereo_source { 258214501Srpaulo GPIO_STEREO_SOURCE_UNKNOWN = (-1), 259214501Srpaulo GPIO_STEREO_SOURCE_D1, 260214501Srpaulo GPIO_STEREO_SOURCE_D2, 261214501Srpaulo GPIO_STEREO_SOURCE_D3, 262214501Srpaulo GPIO_STEREO_SOURCE_D4, 263214501Srpaulo GPIO_STEREO_SOURCE_D5, 264214501Srpaulo GPIO_STEREO_SOURCE_D6 265214501Srpaulo}; 266214501Srpaulo 267214501Srpaulo/* 268214501Srpaulo * GPIO config 269214501Srpaulo */ 270214501Srpaulo 271214501Srpauloenum gpio_config_type { 272214501Srpaulo GPIO_CONFIG_TYPE_NONE, 273214501Srpaulo GPIO_CONFIG_TYPE_DDC, 274214501Srpaulo GPIO_CONFIG_TYPE_HPD, 275214501Srpaulo GPIO_CONFIG_TYPE_GENERIC_MUX, 276214501Srpaulo GPIO_CONFIG_TYPE_GSL_MUX, 277214501Srpaulo GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE 278214501Srpaulo}; 279214501Srpaulo 280214501Srpaulo/* DDC configuration */ 281214501Srpaulo 282214501Srpauloenum gpio_ddc_config_type { 283214501Srpaulo GPIO_DDC_CONFIG_TYPE_MODE_AUX, 284214501Srpaulo GPIO_DDC_CONFIG_TYPE_MODE_I2C, 285214501Srpaulo GPIO_DDC_CONFIG_TYPE_POLL_FOR_CONNECT, 286214501Srpaulo GPIO_DDC_CONFIG_TYPE_POLL_FOR_DISCONNECT, 287214501Srpaulo GPIO_DDC_CONFIG_TYPE_DISABLE_POLLING 288214501Srpaulo}; 289214501Srpaulo 290214501Srpaulostruct gpio_ddc_config { 291214501Srpaulo enum gpio_ddc_config_type type; 292214501Srpaulo bool data_en_bit_present; 293214501Srpaulo bool clock_en_bit_present; 294214501Srpaulo}; 295214501Srpaulo 296214501Srpaulo/* HPD configuration */ 297214501Srpaulo 298214501Srpaulostruct gpio_hpd_config { 299214501Srpaulo uint32_t delay_on_connect; /* milliseconds */ 300214501Srpaulo uint32_t delay_on_disconnect; /* milliseconds */ 301214501Srpaulo}; 302214501Srpaulo 303214501Srpaulostruct gpio_generic_mux_config { 304214501Srpaulo bool enable_output_from_mux; 305 enum gpio_signal_source mux_select; 306 enum gpio_stereo_source stereo_select; 307}; 308 309enum gpio_gsl_mux_config_type { 310 GPIO_GSL_MUX_CONFIG_TYPE_DISABLE, 311 GPIO_GSL_MUX_CONFIG_TYPE_TIMING_SYNC, 312 GPIO_GSL_MUX_CONFIG_TYPE_FLIP_SYNC 313}; 314 315struct gpio_gsl_mux_config { 316 enum gpio_gsl_mux_config_type type; 317 /* Actually sync_source type, 318 * however we want to avoid inter-component includes here */ 319 uint32_t gsl_group; 320}; 321 322struct gpio_config_data { 323 enum gpio_config_type type; 324 union { 325 struct gpio_ddc_config ddc; 326 struct gpio_hpd_config hpd; 327 struct gpio_generic_mux_config generic_mux; 328 struct gpio_gsl_mux_config gsl_mux; 329 } config; 330}; 331 332#endif 333