1/*
2 * Copyright 2022 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __MMSCH_V4_0_H__
25#define __MMSCH_V4_0_H__
26
27#include "amdgpu_vcn.h"
28
29#define MMSCH_VERSION_MAJOR	4
30#define MMSCH_VERSION_MINOR	0
31#define MMSCH_VERSION	(MMSCH_VERSION_MAJOR << 16 | MMSCH_VERSION_MINOR)
32
33#define RB_ENABLED (1 << 0)
34#define RB4_ENABLED (1 << 1)
35
36#define MMSCH_VF_ENGINE_STATUS__PASS 0x1
37
38#define MMSCH_VF_MAILBOX_RESP__OK 0x1
39#define MMSCH_VF_MAILBOX_RESP__INCOMPLETE 0x2
40
41#define MMSCH_VF_ENGINE_STATUS__PASS 0x1
42
43#define MMSCH_VF_MAILBOX_RESP__OK 0x1
44#define MMSCH_VF_MAILBOX_RESP__INCOMPLETE 0x2
45
46#define MMSCH_V4_0_VCN_INSTANCES 0x2
47
48enum mmsch_v4_0_command_type {
49	MMSCH_COMMAND__DIRECT_REG_WRITE = 0,
50	MMSCH_COMMAND__DIRECT_REG_POLLING = 2,
51	MMSCH_COMMAND__DIRECT_REG_READ_MODIFY_WRITE = 3,
52	MMSCH_COMMAND__INDIRECT_REG_WRITE = 8,
53	MMSCH_COMMAND__END = 0xf
54};
55
56struct mmsch_v4_0_table_info {
57	uint32_t init_status;
58	uint32_t table_offset;
59	uint32_t table_size;
60};
61
62struct mmsch_v4_0_init_header {
63	uint32_t version;
64	uint32_t total_size;
65	struct mmsch_v4_0_table_info inst[MMSCH_V4_0_VCN_INSTANCES];
66	struct mmsch_v4_0_table_info jpegdec;
67};
68
69struct mmsch_v4_0_cmd_direct_reg_header {
70	uint32_t reg_offset   : 28;
71	uint32_t command_type : 4;
72};
73
74struct mmsch_v4_0_cmd_indirect_reg_header {
75	uint32_t reg_offset    : 20;
76	uint32_t reg_idx_space : 8;
77	uint32_t command_type  : 4;
78};
79
80struct mmsch_v4_0_cmd_direct_write {
81	struct mmsch_v4_0_cmd_direct_reg_header cmd_header;
82	uint32_t reg_value;
83};
84
85struct mmsch_v4_0_cmd_direct_read_modify_write {
86	struct mmsch_v4_0_cmd_direct_reg_header cmd_header;
87	uint32_t write_data;
88	uint32_t mask_value;
89};
90
91struct mmsch_v4_0_cmd_direct_polling {
92	struct mmsch_v4_0_cmd_direct_reg_header cmd_header;
93	uint32_t mask_value;
94	uint32_t wait_value;
95};
96
97struct mmsch_v4_0_cmd_end {
98	struct mmsch_v4_0_cmd_direct_reg_header cmd_header;
99};
100
101struct mmsch_v4_0_cmd_indirect_write {
102	struct mmsch_v4_0_cmd_indirect_reg_header cmd_header;
103	uint32_t reg_value;
104};
105
106#define MMSCH_V4_0_INSERT_DIRECT_RD_MOD_WT(reg, mask, data) { \
107	size = sizeof(struct mmsch_v4_0_cmd_direct_read_modify_write); \
108	size_dw = size / 4; \
109	direct_rd_mod_wt.cmd_header.reg_offset = reg; \
110	direct_rd_mod_wt.mask_value = mask; \
111	direct_rd_mod_wt.write_data = data; \
112	memcpy((void *)table_loc, &direct_rd_mod_wt, size); \
113	table_loc += size_dw; \
114	table_size += size_dw; \
115}
116
117#define MMSCH_V4_0_INSERT_DIRECT_WT(reg, value) { \
118	size = sizeof(struct mmsch_v4_0_cmd_direct_write); \
119	size_dw = size / 4; \
120	direct_wt.cmd_header.reg_offset = reg; \
121	direct_wt.reg_value = value; \
122	memcpy((void *)table_loc, &direct_wt, size); \
123	table_loc += size_dw; \
124	table_size += size_dw; \
125}
126
127#define MMSCH_V4_0_INSERT_DIRECT_POLL(reg, mask, wait) { \
128	size = sizeof(struct mmsch_v4_0_cmd_direct_polling); \
129	size_dw = size / 4; \
130	direct_poll.cmd_header.reg_offset = reg; \
131	direct_poll.mask_value = mask; \
132	direct_poll.wait_value = wait; \
133	memcpy((void *)table_loc, &direct_poll, size); \
134	table_loc += size_dw; \
135	table_size += size_dw; \
136}
137
138#define MMSCH_V4_0_INSERT_END() { \
139	size = sizeof(struct mmsch_v4_0_cmd_end); \
140	size_dw = size / 4; \
141	memcpy((void *)table_loc, &end, size); \
142	table_loc += size_dw; \
143	table_size += size_dw; \
144}
145
146#endif
147