1/*	$OpenBSD: autrivar.h,v 1.4 2010/08/27 18:50:56 deraadt Exp $	*/
2
3/*
4 * Copyright (c) 2001 SOMEYA Yoshihiko and KUROSAWA Takahiro.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28#ifndef _DEV_PCI_AUTRIVAR_H_
29#define	_DEV_PCI_AUTRIVAR_H_
30
31/*
32 * softc
33 */
34struct autri_dma {
35	bus_dmamap_t		map;
36	caddr_t			addr;		/* VA */
37	bus_dma_segment_t	segs[1];
38	int			nsegs;
39	size_t			size;
40	struct autri_dma	*next;
41};
42
43struct autri_codec_softc {
44	struct device		sc_dev;		/* base device */
45	struct autri_softc	*sc;
46	int			id;
47	int			status_data;
48	int			status_addr;
49	struct ac97_host_if	host_if;
50	struct ac97_codec_if	*codec_if;
51	int			flags;
52};
53
54struct autri_chstatus {
55	void		(*intr)(void *); /* rint/pint */
56	void		*intr_arg;	/* arg for intr */
57	u_int		offset;		/* filled up to here */
58	u_int		blksize;
59	u_int		factor;		/* byte per sample */
60	u_int		length;		/* ring buffer length */
61	struct autri_dma *dma;		/* DMA handle for ring buf */
62
63	int		ch;
64	int		ch_intr;
65#if 0
66	u_int		csoint;
67	u_int		count;
68#endif
69};
70
71struct autri_softc {
72	struct device		sc_dev;		/* base device */
73	pci_chipset_tag_t	sc_pc;
74	pcitag_t		sc_pt;
75	pcireg_t		sc_devid;
76	void			*sc_ih;		/* interrupt vectoring */
77	bus_space_tag_t		memt;
78	bus_space_handle_t	memh;
79	bus_space_tag_t		iot;
80	bus_space_handle_t	ioh;
81	bus_dma_tag_t		sc_dmatag;	/* DMA tag */
82	u_int			sc_flags;
83
84	struct autri_codec_softc sc_codec;
85	struct autri_dma	*sc_dmas;	/* List of DMA handles */
86
87	u_int32_t		sc_class;
88	int			sc_revision;
89
90	/*
91	 * Play/record status
92	 */
93	struct autri_chstatus	sc_play, sc_rec;
94
95#if NMIDI > 0
96	void	(*sc_iintr)(void *, int);	/* midi input ready handler */
97	void	(*sc_ointr)(void *);		/* midi output ready handler */
98	void	*sc_arg;
99#endif
100
101};
102
103#endif /* _DEV_PCI_AUTRIVAR_H_ */
104
105