amdpm.c revision 1.13
1/* $OpenBSD: amdpm.c,v 1.13 2006/03/07 11:56:23 dlg Exp $ */ 2 3/* 4 * Copyright (c) 2006 Alexander Yurchenko <grange@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19/*- 20 * Copyright (c) 2002 The NetBSD Foundation, Inc. 21 * All rights reserved. 22 * 23 * This code is derived from software contributed to The NetBSD Foundation 24 * by Enami Tsugutomo. 25 * 26 * Redistribution and use in source and binary forms, with or without 27 * modification, are permitted provided that the following conditions 28 * are met: 29 * 1. Redistributions of source code must retain the above copyright 30 * notice, this list of conditions and the following disclaimer. 31 * 2. Redistributions in binary form must reproduce the above copyright 32 * notice, this list of conditions and the following disclaimer in the 33 * documentation and/or other materials provided with the distribution. 34 * 3. All advertising materials mentioning features or use of this software 35 * must display the following acknowledgement: 36 * This product includes software developed by the NetBSD 37 * Foundation, Inc. and its contributors. 38 * 4. Neither the name of The NetBSD Foundation nor the names of its 39 * contributors may be used to endorse or promote products derived 40 * from this software without specific prior written permission. 41 * 42 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 43 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 44 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 45 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 46 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 47 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 48 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 49 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 50 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 51 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 52 * POSSIBILITY OF SUCH DAMAGE. 53 */ 54 55#include <sys/param.h> 56#include <sys/systm.h> 57#include <sys/device.h> 58#include <sys/kernel.h> 59#include <sys/lock.h> 60#include <sys/proc.h> 61#include <sys/timeout.h> 62#ifdef __HAVE_TIMECOUNTER 63#include <sys/timetc.h> 64#endif 65 66#include <machine/bus.h> 67 68#include <dev/pci/pcivar.h> 69#include <dev/pci/pcireg.h> 70#include <dev/pci/pcidevs.h> 71 72#include <dev/pci/amdpmreg.h> 73 74#include <dev/rndvar.h> 75#include <dev/i2c/i2cvar.h> 76 77#ifdef AMDPM_DEBUG 78#define DPRINTF(x) printf x 79#else 80#define DPRINTF(x) 81#endif 82 83#define AMDPM_SMBUS_DELAY 100 84#define AMDPM_SMBUS_TIMEOUT 1 85 86#ifdef __HAVE_TIMECOUNTER 87u_int amdpm_get_timecount(struct timecounter *tc); 88 89#ifndef AMDPM_FREQUENCY 90#define AMDPM_FREQUENCY 3579545 91#endif 92 93static struct timecounter amdpm_timecounter = { 94 amdpm_get_timecount, /* get_timecount */ 95 0, /* no poll_pps */ 96 0xffffff, /* counter_mask */ 97 AMDPM_FREQUENCY, /* frequency */ 98 "AMDPM", /* name */ 99 1000 /* quality */ 100}; 101#endif 102 103struct amdpm_softc { 104 struct device sc_dev; 105 106 pci_chipset_tag_t sc_pc; 107 pcitag_t sc_tag; 108 109 bus_space_tag_t sc_iot; 110 bus_space_handle_t sc_ioh; /* PMxx space */ 111 int sc_poll; 112 113 struct timeout sc_rnd_ch; 114 115 struct i2c_controller sc_i2c_tag; 116 struct lock sc_i2c_lock; 117 struct { 118 i2c_op_t op; 119 void *buf; 120 size_t len; 121 int flags; 122 volatile int error; 123 } sc_i2c_xfer; 124}; 125 126int amdpm_match(struct device *, void *, void *); 127void amdpm_attach(struct device *, struct device *, void *); 128void amdpm_rnd_callout(void *); 129 130int amdpm_i2c_acquire_bus(void *, int); 131void amdpm_i2c_release_bus(void *, int); 132int amdpm_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 133 void *, size_t, int); 134 135int amdpm_intr(void *); 136 137struct cfattach amdpm_ca = { 138 sizeof(struct amdpm_softc), amdpm_match, amdpm_attach 139}; 140 141struct cfdriver amdpm_cd = { 142 NULL, "amdpm", DV_DULL 143}; 144 145const struct pci_matchid amdpm_ids[] = { 146 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_PMC }, 147 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_766_PMC }, 148 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC768_PMC }, 149 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_8111_PMC }, 150 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_SMB } 151}; 152 153int 154amdpm_match(struct device *parent, void *match, void *aux) 155{ 156 return (pci_matchbyid(aux, amdpm_ids, 157 sizeof(amdpm_ids) / sizeof(amdpm_ids[0]))); 158} 159 160void 161amdpm_attach(struct device *parent, struct device *self, void *aux) 162{ 163 struct amdpm_softc *sc = (struct amdpm_softc *) self; 164 struct pci_attach_args *pa = aux; 165 struct i2cbus_attach_args iba; 166 pcireg_t cfg_reg, reg; 167 int i, base; 168 169 sc->sc_pc = pa->pa_pc; 170 sc->sc_tag = pa->pa_tag; 171 sc->sc_iot = pa->pa_iot; 172 sc->sc_poll = 1; /* XXX */ 173 174 cfg_reg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG); 175 if ((cfg_reg & AMDPM_PMIOEN) == 0) { 176 printf(": PMxx space isn't enabled\n"); 177 return; 178 } 179 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NVIDIA) 180 base = NFPM_PMPTR; 181 else 182 /* PCI_VENDOR_AMD */ 183 base = AMDPM_PMPTR; 184 185 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, base); 186 if (bus_space_map(sc->sc_iot, AMDPM_PMBASE(reg), AMDPM_PMSIZE, 187 0, &sc->sc_ioh)) { 188 printf(": failed to map PMxx space\n"); 189 return; 190 } 191 192#ifdef __HAVE_TIMECOUNTER 193 if ((cfg_reg & AMDPM_TMRRST) == 0 && 194 (cfg_reg & AMDPM_STOPTMR) == 0 && 195 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_PBC768_PMC) { 196 printf(": %d-bit timer at %dHz", 197 (cfg_reg & AMDPM_TMR32) ? 32 : 24, 198 amdpm_timecounter.tc_frequency); 199 200 amdpm_timecounter.tc_priv = sc; 201 if (cfg_reg & AMDPM_TMR32) 202 amdpm_timecounter.tc_counter_mask = 0xffffffffu; 203 tc_init(&amdpm_timecounter); 204 } 205#endif 206 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_PBC768_PMC || 207 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_8111_PMC) { 208 if ((cfg_reg & AMDPM_RNGEN) ==0) { 209 pci_conf_write(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG, 210 cfg_reg | AMDPM_RNGEN); 211 cfg_reg = pci_conf_read(pa->pa_pc, pa->pa_tag, 212 AMDPM_CONFREG); 213 } 214 if (cfg_reg & AMDPM_RNGEN) { 215 /* Check to see if we can read data from the RNG. */ 216 (void) bus_space_read_4(sc->sc_iot, sc->sc_ioh, 217 AMDPM_RNGDATA); 218 for (i = 1000; i--; ) { 219 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, 220 AMDPM_RNGSTAT) & AMDPM_RNGDONE) 221 break; 222 DELAY(10); 223 } 224 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, 225 AMDPM_RNGSTAT) & AMDPM_RNGDONE) { 226 printf(": rng active"); 227 timeout_set(&sc->sc_rnd_ch, amdpm_rnd_callout, 228 sc); 229 amdpm_rnd_callout(sc); 230 } 231 } 232 } 233 printf("\n"); 234 235 /* Attach I2C bus */ 236 lockinit(&sc->sc_i2c_lock, PRIBIO | PCATCH, "iiclk", 0, 0); 237 sc->sc_i2c_tag.ic_cookie = sc; 238 sc->sc_i2c_tag.ic_acquire_bus = amdpm_i2c_acquire_bus; 239 sc->sc_i2c_tag.ic_release_bus = amdpm_i2c_release_bus; 240 sc->sc_i2c_tag.ic_exec = amdpm_i2c_exec; 241 242 bzero(&iba, sizeof(iba)); 243 iba.iba_name = "iic"; 244 iba.iba_tag = &sc->sc_i2c_tag; 245 config_found(self, &iba, iicbus_print); 246} 247 248void 249amdpm_rnd_callout(void *v) 250{ 251 struct amdpm_softc *sc = v; 252 u_int32_t reg; 253 254 if ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_RNGSTAT) & 255 AMDPM_RNGDONE) != 0) { 256 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_RNGDATA); 257 add_true_randomness(reg); 258 } 259 timeout_add(&sc->sc_rnd_ch, 1); 260} 261 262#ifdef __HAVE_TIMECOUNTER 263u_int 264amdpm_get_timecount(struct timecounter *tc) 265{ 266 struct amdpm_softc *sc = tc->tc_priv; 267 u_int u2; 268#if 0 269 u_int u1, u3; 270#endif 271 272 u2 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_TMR); 273#if 0 274 u3 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_TMR); 275 do { 276 u1 = u2; 277 u2 = u3; 278 u3 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_TMR); 279 } while (u1 > u2 || u2 > u3); 280#endif 281 return (u2); 282} 283#endif 284 285int 286amdpm_i2c_acquire_bus(void *cookie, int flags) 287{ 288 struct amdpm_softc *sc = cookie; 289 290 if (cold || sc->sc_poll || (flags & I2C_F_POLL)) 291 return (0); 292 293 return (lockmgr(&sc->sc_i2c_lock, LK_EXCLUSIVE, NULL)); 294} 295 296void 297amdpm_i2c_release_bus(void *cookie, int flags) 298{ 299 struct amdpm_softc *sc = cookie; 300 301 if (cold || sc->sc_poll || (flags & I2C_F_POLL)) 302 return; 303 304 lockmgr(&sc->sc_i2c_lock, LK_RELEASE, NULL); 305} 306 307int 308amdpm_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, 309 const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags) 310{ 311 struct amdpm_softc *sc = cookie; 312 u_int8_t *b; 313 u_int16_t st, ctl, data; 314 int retries; 315 316 DPRINTF(("%s: exec: op %d, addr 0x%x, cmdlen %d, len %d, flags 0x%x\n", 317 sc->sc_dev.dv_xname, op, addr, cmdlen, len, flags)); 318 319 /* Wait for bus to be idle */ 320 for (retries = 100; retries > 0; retries--) { 321 st = bus_space_read_2(sc->sc_iot, sc->sc_ioh, AMDPM_SMBSTAT); 322 if (!(st & AMDPM_SMBSTAT_BSY)) 323 break; 324 DELAY(AMDPM_SMBUS_DELAY); 325 } 326 DPRINTF(("%s: exec: st 0x%b\n", sc->sc_dev.dv_xname, st, 327 AMDPM_SMBSTAT_BITS)); 328 if (st & AMDPM_SMBSTAT_BSY) 329 return (1); 330 331 if (cold || sc->sc_poll) 332 flags |= I2C_F_POLL; 333 334 if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2) 335 return (1); 336 337 /* Setup transfer */ 338 sc->sc_i2c_xfer.op = op; 339 sc->sc_i2c_xfer.buf = buf; 340 sc->sc_i2c_xfer.len = len; 341 sc->sc_i2c_xfer.flags = flags; 342 sc->sc_i2c_xfer.error = 0; 343 344 /* Set slave address and transfer direction */ 345 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AMDPM_SMBADDR, 346 AMDPM_SMBADDR_ADDR(addr) | 347 (I2C_OP_READ_P(op) ? AMDPM_SMBADDR_READ : 0)); 348 349 b = (void *)cmdbuf; 350 if (cmdlen > 0) 351 /* Set command byte */ 352 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMDPM_SMBCMD, b[0]); 353 354 if (I2C_OP_WRITE_P(op)) { 355 /* Write data */ 356 data = 0; 357 b = buf; 358 if (len > 0) 359 data = b[0]; 360 if (len > 1) 361 data |= ((u_int16_t)b[1] << 8); 362 if (len > 0) 363 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 364 AMDPM_SMBDATA, data); 365 } 366 367 /* Set SMBus command */ 368 if (len == 0) 369 ctl = AMDPM_SMBCTL_CMD_BYTE; 370 else if (len == 1) 371 ctl = AMDPM_SMBCTL_CMD_BDATA; 372 else if (len == 2) 373 ctl = AMDPM_SMBCTL_CMD_WDATA; 374 375 if ((flags & I2C_F_POLL) == 0) 376 ctl |= AMDPM_SMBCTL_CYCEN; 377 378 /* Start transaction */ 379 ctl |= AMDPM_SMBCTL_START; 380 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AMDPM_SMBCTL, ctl); 381 382 if (flags & I2C_F_POLL) { 383 /* Poll for completion */ 384 DELAY(AMDPM_SMBUS_DELAY); 385 for (retries = 1000; retries > 0; retries--) { 386 st = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 387 AMDPM_SMBSTAT); 388 if ((st & AMDPM_SMBSTAT_HBSY) == 0) 389 break; 390 DELAY(AMDPM_SMBUS_DELAY); 391 } 392 if (st & AMDPM_SMBSTAT_HBSY) 393 goto timeout; 394 amdpm_intr(sc); 395 } else { 396 /* Wait for interrupt */ 397 if (tsleep(sc, PRIBIO, "iicexec", AMDPM_SMBUS_TIMEOUT * hz)) 398 goto timeout; 399 } 400 401 if (sc->sc_i2c_xfer.error) 402 return (1); 403 404 return (0); 405 406timeout: 407 /* 408 * Transfer timeout. Kill the transaction and clear status bits. 409 */ 410 printf("%s: timeout, status 0x%b\n", sc->sc_dev.dv_xname, st, 411 AMDPM_SMBSTAT_BITS); 412 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AMDPM_SMBCTL, 413 AMDPM_SMBCTL_ABORT); 414 DELAY(AMDPM_SMBUS_DELAY); 415 st = bus_space_read_2(sc->sc_iot, sc->sc_ioh, AMDPM_SMBSTAT); 416 if ((st & AMDPM_SMBSTAT_ABRT) == 0) 417 printf("%s: transaction abort failed, status 0x%b\n", 418 sc->sc_dev.dv_xname, st, AMDPM_SMBSTAT_BITS); 419 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AMDPM_SMBSTAT, st); 420 return (1); 421} 422 423int 424amdpm_intr(void *arg) 425{ 426 struct amdpm_softc *sc = arg; 427 u_int16_t st, data; 428 u_int8_t *b; 429 size_t len; 430 431 /* Read status */ 432 st = bus_space_read_2(sc->sc_iot, sc->sc_ioh, AMDPM_SMBSTAT); 433 if ((st & AMDPM_SMBSTAT_HBSY) != 0 || (st & (AMDPM_SMBSTAT_ABRT | 434 AMDPM_SMBSTAT_COL | AMDPM_SMBSTAT_PRERR | AMDPM_SMBSTAT_CYC | 435 AMDPM_SMBSTAT_TO | AMDPM_SMBSTAT_SNP | AMDPM_SMBSTAT_SLV | 436 AMDPM_SMBSTAT_SMBA)) == 0) 437 /* Interrupt was not for us */ 438 return (0); 439 440 DPRINTF(("%s: intr: st 0x%b\n", sc->sc_dev.dv_xname, st, 441 AMDPM_SMBSTAT_BITS)); 442 443 /* Clear status bits */ 444 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AMDPM_SMBSTAT, st); 445 446 /* Check for errors */ 447 if (st & (AMDPM_SMBSTAT_COL | AMDPM_SMBSTAT_PRERR | 448 AMDPM_SMBSTAT_TO)) { 449 sc->sc_i2c_xfer.error = 1; 450 goto done; 451 } 452 453 if (st & AMDPM_SMBSTAT_CYC) { 454 if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op)) 455 goto done; 456 457 /* Read data */ 458 b = sc->sc_i2c_xfer.buf; 459 len = sc->sc_i2c_xfer.len; 460 if (len > 0) { 461 data = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 462 AMDPM_SMBDATA); 463 b[0] = data & 0xff; 464 } 465 if (len > 1) 466 b[1] = (data >> 8) & 0xff; 467 } 468 469done: 470 if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0) 471 wakeup(sc); 472 return (1); 473} 474