etphy.c revision 1.6 
1/*	$OpenBSD: etphy.c,v 1.6 2014/12/05 15:50:04 mpi Exp $	*/
2
3/*
4 * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
5 *
6 * This code is derived from software contributed to The DragonFly Project
7 * by Sepherosa Ziehau <sepherosa@gmail.com>
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 *
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in
17 *    the documentation and/or other materials provided with the
18 *    distribution.
19 * 3. Neither the name of The DragonFly Project nor the names of its
20 *    contributors may be used to endorse or promote products derived
21 *    from this software without specific, prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
26 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
27 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
29 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
31 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
33 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * $DragonFly: src/sys/dev/netif/mii_layer/truephy.c,v 1.1 2007/10/12 14:12:42 sephe Exp $
37 */
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/kernel.h>
42#include <sys/device.h>
43#include <sys/socket.h>
44
45#include <net/if.h>
46#include <net/if_var.h>
47#include <net/if_media.h>
48
49#include <dev/mii/mii.h>
50#include <dev/mii/miivar.h>
51#include <dev/mii/miidevs.h>
52
53#define ETPHY_INDEX		0x10	/* XXX reserved in DS */
54#define ETPHY_INDEX_MAGIC	0x402
55#define ETPHY_DATA		0x11	/* XXX reserved in DS */
56
57#define ETPHY_CTRL		0x12
58#define ETPHY_CTRL_DIAG		0x0004
59#define ETPHY_CTRL_RSV1		0x0002	/* XXX reserved */
60#define ETPHY_CTRL_RSV0		0x0001	/* XXX reserved */
61
62#define ETPHY_CONF		0x16
63#define ETPHY_CONF_TXFIFO_MASK	0x3000
64#define ETPHY_CONF_TXFIFO_8	0x0000
65#define ETPHY_CONF_TXFIFO_16	0x1000
66#define ETPHY_CONF_TXFIFO_24	0x2000
67#define ETPHY_CONF_TXFIFO_32	0x3000
68
69#define ETPHY_SR		0x1a
70#define ETPHY_SR_SPD_MASK	0x0300
71#define ETPHY_SR_SPD_1000T	0x0200
72#define ETPHY_SR_SPD_100TX	0x0100
73#define ETPHY_SR_SPD_10T	0x0000
74#define ETPHY_SR_FDX		0x0080
75
76
77int	etphy_service(struct mii_softc *, struct mii_data *, int);
78void	etphy_attach(struct device *, struct device *, void *);
79int	etphy_match(struct device *, void *, void *);
80void	etphy_reset(struct mii_softc *);
81void	etphy_status(struct mii_softc *);
82
83const struct mii_phy_funcs etphy_funcs = {
84	etphy_service, etphy_status, etphy_reset,
85};
86
87static const struct mii_phydesc etphys[] = {
88	{ MII_OUI_AGERE,	MII_MODEL_AGERE_ET1011,
89	  MII_STR_AGERE_ET1011 },
90	{ 0,			0,
91	  NULL },
92};
93
94struct cfattach etphy_ca = {
95	sizeof (struct mii_softc), etphy_match, etphy_attach,
96	mii_phy_detach
97};
98
99struct cfdriver etphy_cd = {
100	NULL, "etphy", DV_DULL
101};
102
103static const struct etphy_dsp {
104	uint16_t	index;
105	uint16_t	data;
106} etphy_dspcode[] = {
107	{ 0x880b,	0x0926 },	/* AfeIfCreg4B1000Msbs */
108	{ 0x880c,	0x0926 },	/* AfeIfCreg4B100Msbs */
109	{ 0x880d,	0x0926 },	/* AfeIfCreg4B10Msbs */
110
111	{ 0x880e,	0xb4d3 },	/* AfeIfCreg4B1000Lsbs */
112	{ 0x880f,	0xb4d3 },	/* AfeIfCreg4B100Lsbs */
113	{ 0x8810,	0xb4d3 },	/* AfeIfCreg4B10Lsbs */
114
115	{ 0x8805,	0xb03e },	/* AfeIfCreg3B1000Msbs */
116	{ 0x8806,	0xb03e },	/* AfeIfCreg3B100Msbs */
117	{ 0x8807,	0xff00 },	/* AfeIfCreg3B10Msbs */
118
119	{ 0x8808,	0xe090 },	/* AfeIfCreg3B1000Lsbs */
120	{ 0x8809,	0xe110 },	/* AfeIfCreg3B100Lsbs */
121	{ 0x880a,	0x0000 },	/* AfeIfCreg3B10Lsbs */
122
123	{ 0x300d,	1      },	/* DisableNorm */
124
125	{ 0x280c,	0x0180 },	/* LinkHoldEnd */
126
127	{ 0x1c21,	0x0002 },	/* AlphaM */
128
129	{ 0x3821,	6      },	/* FfeLkgTx0 */
130	{ 0x381d,	1      },	/* FfeLkg1g4 */
131	{ 0x381e,	1      },	/* FfeLkg1g5 */
132	{ 0x381f,	1      },	/* FfeLkg1g6 */
133	{ 0x3820,	1      },	/* FfeLkg1g7 */
134
135	{ 0x8402,	0x01f0 },	/* Btinact */
136	{ 0x800e,	20     },	/* LftrainTime */
137	{ 0x800f,	24     },	/* DvguardTime */
138	{ 0x8010,	46     }	/* IdlguardTime */
139};
140
141int
142etphy_match(struct device *parent, void *match, void *aux)
143{
144	struct mii_attach_args *ma = aux;
145
146	if (mii_phy_match(ma, etphys) != NULL)
147		return (10);
148
149	return (0);
150}
151
152void
153etphy_attach(struct device *parent, struct device *self, void *aux)
154{
155	struct mii_softc *sc = (struct mii_softc *)self;
156	struct mii_attach_args *ma = aux;
157	struct mii_data *mii = ma->mii_data;
158	const struct mii_phydesc *mpd;
159
160	mpd = mii_phy_match(ma, etphys);
161	printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
162
163	sc->mii_inst = mii->mii_instance;
164	sc->mii_phy = ma->mii_phyno;
165	sc->mii_funcs = &etphy_funcs;
166	sc->mii_model = MII_MODEL(ma->mii_id2);
167	sc->mii_pdata = mii;
168	sc->mii_flags = ma->mii_flags;
169
170	sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOLOOP;
171
172	PHY_RESET(sc);
173
174	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
175	if (sc->mii_capabilities & BMSR_EXTSTAT) {
176		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
177		/* No 1000baseT half-duplex support */
178		sc->mii_extcapabilities &= ~EXTSR_1000THDX;
179	}
180
181	mii_phy_add_media(sc);
182}
183
184int
185etphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
186{
187	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
188	int bmcr;
189
190	switch (cmd) {
191	case MII_POLLSTAT:
192		/*
193		 * If we're not polling our PHY instance, just return.
194		 */
195		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
196			return 0;
197		break;
198
199	case MII_MEDIACHG:
200		/*
201		 * If the media indicates a different PHY instance,
202		 * isolate ourselves.
203		 */
204		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
205			bmcr = PHY_READ(sc, MII_BMCR);
206			PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
207			return 0;
208		}
209
210		/*
211		 * If the interface is not up, don't do anything.
212		 */
213		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
214			break;
215
216		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
217			bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_AUTOEN;
218			PHY_WRITE(sc, MII_BMCR, bmcr);
219			PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);
220		}
221
222		mii_phy_setmedia(sc);
223
224		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
225			bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN;
226			PHY_WRITE(sc, MII_BMCR, bmcr);
227
228			if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
229				PHY_WRITE(sc, MII_BMCR,
230					  bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
231			}
232		}
233		break;
234
235	case MII_TICK:
236		/*
237		 * If we're not currently selected, just return.
238		 */
239		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
240			return 0;
241
242		if (mii_phy_tick(sc) == EJUSTRETURN)
243			return 0;
244		break;
245	}
246
247	/* Update the media status. */
248	mii_phy_status(sc);
249
250	/* Callback if something changed. */
251	mii_phy_update(sc, cmd);
252	return 0;
253}
254
255void
256etphy_reset(struct mii_softc *sc)
257{
258	int i;
259
260	for (i = 0; i < 2; ++i) {
261		PHY_READ(sc, MII_PHYIDR1);
262		PHY_READ(sc, MII_PHYIDR2);
263
264		PHY_READ(sc, ETPHY_CTRL);
265		PHY_WRITE(sc, ETPHY_CTRL,
266		    ETPHY_CTRL_DIAG | ETPHY_CTRL_RSV1);
267
268		PHY_WRITE(sc, ETPHY_INDEX, ETPHY_INDEX_MAGIC);
269		PHY_READ(sc, ETPHY_DATA);
270
271		PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_RSV1);
272	}
273
274	PHY_READ(sc, MII_BMCR);
275	PHY_READ(sc, ETPHY_CTRL);
276	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
277	PHY_WRITE(sc, ETPHY_CTRL,
278	    ETPHY_CTRL_DIAG | ETPHY_CTRL_RSV1 | ETPHY_CTRL_RSV0);
279
280#define N(arr)	(int)(sizeof(arr) / sizeof(arr[0]))
281
282	for (i = 0; i < N(etphy_dspcode); ++i) {
283		const struct etphy_dsp *dsp = &etphy_dspcode[i];
284
285		PHY_WRITE(sc, ETPHY_INDEX, dsp->index);
286		PHY_WRITE(sc, ETPHY_DATA, dsp->data);
287
288		PHY_WRITE(sc, ETPHY_INDEX, dsp->index);
289		PHY_READ(sc, ETPHY_DATA);
290	}
291
292#undef N
293
294	PHY_READ(sc, MII_BMCR);
295	PHY_READ(sc, ETPHY_CTRL);
296	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN |  BMCR_S1000);
297	PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_RSV1);
298
299	mii_phy_reset(sc);
300}
301
302void
303etphy_status(struct mii_softc *sc)
304{
305	struct mii_data *mii = sc->mii_pdata;
306	int bmsr, bmcr, sr;
307
308	mii->mii_media_status = IFM_AVALID;
309	mii->mii_media_active = IFM_ETHER;
310
311	sr = PHY_READ(sc, ETPHY_SR);
312	bmcr = PHY_READ(sc, MII_BMCR);
313
314	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
315	if (bmsr & BMSR_LINK)
316		mii->mii_media_status |= IFM_ACTIVE;
317
318	if (bmcr & BMCR_AUTOEN) {
319		if ((bmsr & BMSR_ACOMP) == 0) {
320			mii->mii_media_active |= IFM_NONE;
321			return;
322		}
323	}
324
325	switch (sr & ETPHY_SR_SPD_MASK) {
326	case ETPHY_SR_SPD_1000T:
327		mii->mii_media_active |= IFM_1000_T;
328		break;
329	case ETPHY_SR_SPD_100TX:
330		mii->mii_media_active |= IFM_100_TX;
331		break;
332	case ETPHY_SR_SPD_10T:
333		mii->mii_media_active |= IFM_10_T;
334		break;
335	default:
336		mii->mii_media_active |= IFM_NONE;
337		return;
338	}
339
340	if (sr & ETPHY_SR_FDX)
341		mii->mii_media_active |= IFM_FDX;
342	else
343		mii->mii_media_active |= IFM_HDX;
344}
345