etphy.c revision 1.1 
1/*	$OpenBSD: etphy.c,v 1.1 2007/10/30 12:31:06 jsg Exp $	*/
2
3/*
4 * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
5 *
6 * This code is derived from software contributed to The DragonFly Project
7 * by Sepherosa Ziehau <sepherosa@gmail.com>
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 *
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in
17 *    the documentation and/or other materials provided with the
18 *    distribution.
19 * 3. Neither the name of The DragonFly Project nor the names of its
20 *    contributors may be used to endorse or promote products derived
21 *    from this software without specific, prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
26 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
27 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
29 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
31 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
33 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * $DragonFly: src/sys/dev/netif/mii_layer/truephy.c,v 1.1 2007/10/12 14:12:42 sephe Exp $
37 */
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/kernel.h>
42#include <sys/device.h>
43#include <sys/socket.h>
44
45#include <net/if.h>
46#include <net/if_media.h>
47
48#include <dev/mii/mii.h>
49#include <dev/mii/miivar.h>
50#include <dev/mii/miidevs.h>
51
52#define ETPHY_INDEX		0x10	/* XXX reserved in DS */
53#define ETPHY_DATA		0x11	/* XXX reserved in DS */
54
55#define ETPHY_CTRL		0x12
56
57#define ETPHY_SR		0x1a
58#define ETPHY_SR_SPD_MASK	0x0300
59#define ETPHY_SR_SPD_1000T	0x0200
60#define ETPHY_SR_SPD_100TX	0x0100
61#define ETPHY_SR_SPD_10T	0x0000
62#define ETPHY_SR_FDX		0x0080
63
64
65int	etphy_service(struct mii_softc *, struct mii_data *, int);
66void	etphy_attach(struct device *, struct device *, void *);
67int	etphy_match(struct device *, void *, void *);
68void	etphy_reset(struct mii_softc *);
69void	etphy_status(struct mii_softc *);
70
71const struct mii_phy_funcs etphy_funcs = {
72	etphy_service, etphy_status, etphy_reset,
73};
74
75static const struct mii_phydesc etphys[] = {
76	{ MII_OUI_AGERE,	MII_MODEL_AGERE_ET1011,
77	  MII_STR_AGERE_ET1011 },
78	{ 0,			0,
79	  NULL },
80};
81
82struct cfattach etphy_ca = {
83	sizeof (struct mii_softc), etphy_match, etphy_attach,
84	mii_phy_detach, mii_phy_activate
85};
86
87struct cfdriver etphy_cd = {
88	NULL, "etphy", DV_DULL
89};
90
91static const struct etphy_dsp {
92	uint16_t	index;
93	uint16_t	data;
94} etphy_dspcode[] = {
95	{ 0x880b,	0x0926 },	/* AfeIfCreg4B1000Msbs */
96	{ 0x880c,	0x0926 },	/* AfeIfCreg4B100Msbs */
97	{ 0x880d,	0x0926 },	/* AfeIfCreg4B10Msbs */
98
99	{ 0x880e,	0xb4d3 },	/* AfeIfCreg4B1000Lsbs */
100	{ 0x880f,	0xb4d3 },	/* AfeIfCreg4B100Lsbs */
101	{ 0x8810,	0xb4d3 },	/* AfeIfCreg4B10Lsbs */
102
103	{ 0x8805,	0xb03e },	/* AfeIfCreg3B1000Msbs */
104	{ 0x8806,	0xb03e },	/* AfeIfCreg3B100Msbs */
105	{ 0x8807,	0xff00 },	/* AfeIfCreg3B10Msbs */
106
107	{ 0x8808,	0xe090 },	/* AfeIfCreg3B1000Lsbs */
108	{ 0x8809,	0xe110 },	/* AfeIfCreg3B100Lsbs */
109	{ 0x880a,	0x0000 },	/* AfeIfCreg3B10Lsbs */
110
111	{ 0x300d,	1      },	/* DisableNorm */
112
113	{ 0x280c,	0x0180 },	/* LinkHoldEnd */
114
115	{ 0x1c21,	0x0002 },	/* AlphaM */
116
117	{ 0x3821,	6      },	/* FfeLkgTx0 */
118	{ 0x381d,	1      },	/* FfeLkg1g4 */
119	{ 0x381e,	1      },	/* FfeLkg1g5 */
120	{ 0x381f,	1      },	/* FfeLkg1g6 */
121	{ 0x3820,	1      },	/* FfeLkg1g7 */
122
123	{ 0x8402,	0x01f0 },	/* Btinact */
124	{ 0x800e,	20     },	/* LftrainTime */
125	{ 0x800f,	24     },	/* DvguardTime */
126	{ 0x8010,	46     }	/* IdlguardTime */
127};
128
129int
130etphy_match(struct device *parent, void *match, void *aux)
131{
132	struct mii_attach_args *ma = aux;
133
134	if (mii_phy_match(ma, etphys) != NULL)
135		return (10);
136
137	return (0);
138}
139
140void
141etphy_attach(struct device *parent, struct device *self, void *aux)
142{
143	struct mii_softc *sc = (struct mii_softc *)self;
144	struct mii_attach_args *ma = aux;
145	struct mii_data *mii = ma->mii_data;
146	const struct mii_phydesc *mpd;
147
148	mpd = mii_phy_match(ma, etphys);
149	printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
150
151	sc->mii_inst = mii->mii_instance;
152	sc->mii_phy = ma->mii_phyno;
153	sc->mii_funcs = &etphy_funcs;
154	sc->mii_model = MII_MODEL(ma->mii_id2);
155	sc->mii_pdata = mii;
156	sc->mii_flags = ma->mii_flags;
157
158	sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOLOOP;
159
160	mii->mii_instance++;
161
162	etphy_reset(sc);
163
164	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
165	if (sc->mii_capabilities & BMSR_EXTSTAT) {
166		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
167		/* No 1000baseT half-duplex support */
168		sc->mii_extcapabilities &= ~EXTSR_1000THDX;
169	}
170
171	if ((sc->mii_capabilities & BMSR_MEDIAMASK) != 0 ||
172	    (sc->mii_extcapabilities & EXTSR_MEDIAMASK) != 0)
173		mii_phy_add_media(sc);
174}
175
176int
177etphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
178{
179	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
180	int bmcr;
181
182	switch (cmd) {
183	case MII_POLLSTAT:
184		/*
185		 * If we're not polling our PHY instance, just return.
186		 */
187		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
188			return 0;
189		break;
190
191	case MII_MEDIACHG:
192		/*
193		 * If the media indicates a different PHY instance,
194		 * isolate ourselves.
195		 */
196		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
197			bmcr = PHY_READ(sc, MII_BMCR);
198			PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
199			return 0;
200		}
201
202		/*
203		 * If the interface is not up, don't do anything.
204		 */
205		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
206			break;
207
208		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
209			bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_AUTOEN;
210			PHY_WRITE(sc, MII_BMCR, bmcr);
211			PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);
212		}
213
214		mii_phy_setmedia(sc);
215
216		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
217			bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN;
218			PHY_WRITE(sc, MII_BMCR, bmcr);
219
220			if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
221				PHY_WRITE(sc, MII_BMCR,
222					  bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
223			}
224		}
225		break;
226
227	case MII_TICK:
228		/*
229		 * If we're not currently selected, just return.
230		 */
231		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
232			return 0;
233
234		if (mii_phy_tick(sc) == EJUSTRETURN)
235			return 0;
236		break;
237	}
238
239	/* Update the media status. */
240	etphy_status(sc);
241
242	/* Callback if something changed. */
243	mii_phy_update(sc, cmd);
244	return 0;
245}
246
247void
248etphy_reset(struct mii_softc *sc)
249{
250	int i;
251
252	for (i = 0; i < 2; ++i) {
253		PHY_READ(sc, MII_PHYIDR1);
254		PHY_READ(sc, MII_PHYIDR2);
255
256		PHY_READ(sc, ETPHY_CTRL);
257		PHY_WRITE(sc, ETPHY_CTRL, 0x6);
258
259		PHY_WRITE(sc, ETPHY_INDEX, 0x402);
260		PHY_READ(sc, ETPHY_DATA);
261
262		PHY_WRITE(sc, ETPHY_CTRL, 0x2);
263	}
264
265	PHY_READ(sc, MII_BMCR);
266	PHY_READ(sc, ETPHY_CTRL);
267	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
268	PHY_WRITE(sc, ETPHY_CTRL, 0x7);
269
270#define N(arr)	(int)(sizeof(arr) / sizeof(arr[0]))
271
272	for (i = 0; i < N(etphy_dspcode); ++i) {
273		const struct etphy_dsp *dsp = &etphy_dspcode[i];
274
275		PHY_WRITE(sc, ETPHY_INDEX, dsp->index);
276		PHY_WRITE(sc, ETPHY_DATA, dsp->data);
277
278		PHY_WRITE(sc, ETPHY_INDEX, dsp->index);
279		PHY_READ(sc, ETPHY_DATA);
280	}
281
282#undef N
283
284	PHY_READ(sc, MII_BMCR);
285	PHY_READ(sc, ETPHY_CTRL);
286	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN |  BMCR_S1000);
287	PHY_WRITE(sc, ETPHY_CTRL, 0x2);
288
289	mii_phy_reset(sc);
290}
291
292void
293etphy_status(struct mii_softc *sc)
294{
295	struct mii_data *mii = sc->mii_pdata;
296	int bmsr, bmcr, sr;
297
298	mii->mii_media_status = IFM_AVALID;
299	mii->mii_media_active = IFM_ETHER;
300
301	sr = PHY_READ(sc, ETPHY_SR);
302	bmcr = PHY_READ(sc, MII_BMCR);
303
304	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
305	if (bmsr & BMSR_LINK)
306		mii->mii_media_status |= IFM_ACTIVE;
307
308	if (bmcr & BMCR_AUTOEN) {
309		if ((bmsr & BMSR_ACOMP) == 0) {
310			mii->mii_media_active |= IFM_NONE;
311			return;
312		}
313	}
314
315	switch (sr & ETPHY_SR_SPD_MASK) {
316	case ETPHY_SR_SPD_1000T:
317		mii->mii_media_active |= IFM_1000_T;
318		break;
319	case ETPHY_SR_SPD_100TX:
320		mii->mii_media_active |= IFM_100_TX;
321		break;
322	case ETPHY_SR_SPD_10T:
323		mii->mii_media_active |= IFM_10_T;
324		break;
325	default:
326		mii->mii_media_active |= IFM_NONE;
327		break;
328	}
329
330	if (sr & ETPHY_SR_FDX)
331		mii->mii_media_active |= IFM_FDX;
332}
333