dcphy.c revision 1.3 
1/*	$OpenBSD: dcphy.c,v 1.3 2000/08/26 20:04:17 nate Exp $	*/
2
3/*
4 * Copyright (c) 1997, 1998, 1999
5 *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *	This product includes software developed by Bill Paul.
18 * 4. Neither the name of the author nor the names of any co-contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 * THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 * $FreeBSD: src/sys/dev/mii/dcphy.c,v 1.2 1999/12/13 21:45:13 wpaul Exp $
35 */
36
37/*
38 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
39 * controllers. Technically we're abusing the miibus code to handle
40 * media selection and NWAY support here since there is no MII
41 * interface. However the logical operations are roughly the same,
42 * and the alternative is to create a fake MII interface in the driver,
43 * which is harder to do.
44 */
45
46#include <sys/param.h>
47#include <sys/device.h>
48#include <sys/systm.h>
49#include <sys/kernel.h>
50#include <sys/malloc.h>
51#include <sys/socket.h>
52#include <sys/errno.h>
53#include <sys/socket.h>
54
55#include <net/if.h>
56#include <net/if_dl.h>
57#include <net/if_types.h>
58#include <net/if_media.h>
59#include <netinet/in.h>
60#include <netinet/if_ether.h>
61
62#include <dev/mii/mii.h>
63#include <dev/mii/miivar.h>
64#include <dev/mii/miidevs.h>
65
66#include <machine/bus.h>
67
68#include <dev/pci/pcivar.h>
69
70#include <dev/ic/dcreg.h>
71
72#define DC_SETBIT(sc, reg, x)                           \
73        CSR_WRITE_4(sc, reg,                            \
74                CSR_READ_4(sc, reg) | x)
75
76#define DC_CLRBIT(sc, reg, x)                           \
77        CSR_WRITE_4(sc, reg,                            \
78                CSR_READ_4(sc, reg) & ~x)
79
80#define MIIF_AUTOTIMEOUT	0x0004
81
82/*
83 * This is the subsystem ID for the built-in 21143 ethernet
84 * in several Compaq Presario systems. Apparently these are
85 * 10Mbps only, so we need to treat them specially.
86 */
87#define COMPAQ_PRESARIO_ID	0xb0bb0e11
88
89int	dcphy_match	__P((struct device *, void *, void *));
90void	dcphy_attach	__P((struct device *, struct device *, void *));
91
92struct cfattach dcphy_ca = {
93	sizeof(struct mii_softc), dcphy_match, dcphy_attach, mii_phy_detach,
94	    mii_phy_activate
95};
96
97struct cfdriver dcphy_cd = {
98	NULL, "dcphy", DV_DULL
99};
100
101int	dcphy_service	__P((struct mii_softc *, struct mii_data *, int));
102void	dcphy_status	__P((struct mii_softc *));
103int	dcphy_auto	__P((struct mii_softc *, int));
104void	dcphy_reset	__P((struct mii_softc *));
105
106int
107dcphy_match(parent, match, aux)
108	struct device *parent;
109	void *match, *aux;
110{
111	struct mii_attach_args *ma = aux;
112
113	/*
114	 * The dc driver will report the 21143 vendor and device
115	 * ID to let us know that it wants us to attach.
116	 */
117	if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxDEC &&
118	    MII_MODEL(ma->mii_id2) == MII_MODEL_xxDEC_xxDC)
119		return (10);
120
121	return (0);
122}
123
124void
125dcphy_attach(parent, self, aux)
126	struct device *parent;
127	struct device *self;
128	void *aux;
129{
130	struct mii_softc *sc = (struct mii_softc *)self;
131	struct mii_attach_args *ma = aux;
132	struct mii_data *mii = ma->mii_data;
133	struct dc_softc *dc_sc;
134
135	printf(": internal PHY\n");
136	sc->mii_inst = mii->mii_instance;
137	sc->mii_phy = ma->mii_phyno;
138	sc->mii_service = dcphy_service;
139	sc->mii_status = dcphy_status;
140	sc->mii_pdata = mii;
141	sc->mii_flags = mii->mii_flags;
142
143	sc->mii_flags |= MIIF_NOISOLATE;
144	mii->mii_instance++;
145
146	dc_sc = mii->mii_ifp->if_softc;
147	CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
148	CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
149
150#define	ADD(m, c)	ifmedia_add(&mii->mii_media, (m), (c), NULL)
151
152	switch(dc_sc->dc_csid) {
153	case COMPAQ_PRESARIO_ID:
154		/* Example of how to only allow 10Mbps modes. */
155		sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
156		break;
157	default:
158		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
159		    sc->mii_inst), BMCR_LOOP|BMCR_S100);
160
161		sc->mii_capabilities =
162		    BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX|
163		    BMSR_10TFDX|BMSR_10THDX;
164		break;
165	}
166
167	sc->mii_capabilities &= ma->mii_capmask;
168	if (sc->mii_capabilities & BMSR_MEDIAMASK)
169		mii_phy_add_media(sc);
170#undef ADD
171}
172
173int
174dcphy_service(sc, mii, cmd)
175	struct mii_softc *sc;
176	struct mii_data *mii;
177	int cmd;
178{
179	struct dc_softc *dc_sc;
180	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
181	int reg;
182	u_int32_t mode;
183
184	if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
185		return (ENXIO);
186
187	dc_sc = mii->mii_ifp->if_softc;
188
189	switch (cmd) {
190	case MII_POLLSTAT:
191		/*
192		 * If we're not polling our PHY instance, just return.
193		 */
194		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
195			return (0);
196		}
197		break;
198
199	case MII_MEDIACHG:
200		/*
201		 * If the media indicates a different PHY instance,
202		 * isolate ourselves.
203		 */
204		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
205			return (0);
206		}
207
208		/*
209		 * If the interface is not up, don't do anything.
210		 */
211		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
212			break;
213
214		sc->mii_flags = 0;
215		mii->mii_media_active = IFM_NONE;
216		mode = CSR_READ_4(dc_sc, DC_NETCFG);
217		mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL|
218		    DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL);
219
220		switch (IFM_SUBTYPE(ife->ifm_media)) {
221		case IFM_AUTO:
222			/*dcphy_reset(sc);*/
223			(void) dcphy_auto(sc, 0);
224			break;
225		case IFM_100_T4:
226			/*
227			 * XXX Not supported as a manual setting right now.
228			 */
229			return (EINVAL);
230		case IFM_100_TX:
231			dcphy_reset(sc);
232			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
233			mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS|
234			    DC_NETCFG_SCRAMBLER;
235			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
236				mode |= DC_NETCFG_FULLDUPLEX;
237			else
238				mode &= ~DC_NETCFG_FULLDUPLEX;
239			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
240			break;
241		case IFM_10_T:
242			DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
243			DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
244			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
245				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
246			else
247				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
248			DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
249			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
250			mode &= ~DC_NETCFG_PORTSEL;
251			mode |= DC_NETCFG_SPEEDSEL;
252			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
253				mode |= DC_NETCFG_FULLDUPLEX;
254			else
255				mode &= ~DC_NETCFG_FULLDUPLEX;
256			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
257			break;
258		default:
259			return(EINVAL);
260			break;
261		}
262		break;
263
264	case MII_TICK:
265		/*
266		 * If we're not currently selected, just return.
267		 */
268		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
269			return (0);
270
271		/*
272		 * Only used for autonegotiation.
273		 */
274		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
275			return (0);
276
277		/*
278		 * Is the interface even up?
279		 */
280		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
281			return (0);
282
283		if (sc->mii_flags & MIIF_DOINGAUTO) {
284			if (++sc->mii_ticks != 5)
285				return(0);
286			else {
287				sc->mii_ticks = 0;
288				sc->mii_flags &= ~MIIF_DOINGAUTO;
289				sc->mii_flags |= MIIF_AUTOTIMEOUT;
290			}
291		}
292
293		sc->mii_flags &= ~MIIF_DOINGAUTO;
294
295		/*
296		 * Check to see if we have link.  If we do, we don't
297		 * need to restart the autonegotiation process.  Read
298		 * the BMSR twice in case it's latched.
299		 */
300		reg = CSR_READ_4(dc_sc, DC_10BTSTAT) &
301		    (DC_TSTAT_LS10|DC_TSTAT_LS100);
302
303		if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX &&
304		    !(reg & DC_TSTAT_LS100)) {
305			if (sc->mii_flags & MIIF_AUTOTIMEOUT) {
306				sc->mii_flags &= ~MIIF_AUTOTIMEOUT;
307				break;
308			} else
309				return(0);
310		} else if (IFM_SUBTYPE(mii->mii_media_active) == IFM_10_T &&
311		    !(reg & DC_TSTAT_LS10)) {
312			if (sc->mii_flags & MIIF_AUTOTIMEOUT) {
313				sc->mii_flags &= ~MIIF_AUTOTIMEOUT;
314				break;
315			} else
316				return(0);
317		} else if (IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE &&
318		    (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))) {
319			if (sc->mii_flags & MIIF_AUTOTIMEOUT) {
320				sc->mii_flags &= ~MIIF_AUTOTIMEOUT;
321				break;
322			} else
323				return(0);
324		} else if (CSR_READ_4(dc_sc, DC_ISR) & DC_ISR_LINKGOOD) {
325			if (sc->mii_flags & MIIF_AUTOTIMEOUT) {
326				sc->mii_flags &= ~MIIF_AUTOTIMEOUT;
327				break;
328			} else
329				return(0);
330		}
331
332		sc->mii_ticks = 0;
333		/*dcphy_reset(sc);*/
334		dcphy_auto(sc, 0);
335
336		break;
337	}
338
339	/* Update the media status. */
340	mii_phy_status(sc);
341
342	/* Callback if something changed. */
343	mii_phy_update(sc, cmd);
344	return (0);
345}
346
347void
348dcphy_status(sc)
349	struct mii_softc *sc;
350{
351	struct mii_data *mii = sc->mii_pdata;
352	int reg, anlpar;
353	struct dc_softc *dc_sc;
354
355	dc_sc = mii->mii_ifp->if_softc;
356
357	mii->mii_media_status = IFM_AVALID;
358	mii->mii_media_active = IFM_ETHER;
359
360	reg = CSR_READ_4(dc_sc, DC_10BTSTAT) &
361	     (DC_TSTAT_LS10|DC_TSTAT_LS100);
362
363	if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
364		mii->mii_media_status |= IFM_ACTIVE;
365
366	if (sc->mii_flags & MIIF_DOINGAUTO) {
367		mii->mii_media_active |= IFM_NONE;
368		return;
369	}
370
371	if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL &&
372	    CSR_READ_4(dc_sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT) {
373		/* Erg, still trying, I guess... */
374		if ((CSR_READ_4(dc_sc, DC_10BTSTAT) &
375		    DC_ASTAT_AUTONEGCMP) != DC_ASTAT_AUTONEGCMP) {
376			mii->mii_media_active |= IFM_NONE;
377			return;
378		}
379
380		if (CSR_READ_4(dc_sc, DC_10BTSTAT) & DC_TSTAT_LP_CAN_NWAY) {
381			anlpar = CSR_READ_4(dc_sc, DC_10BTSTAT) >> 16;
382			if (anlpar & ANLPAR_T4 &&
383			    sc->mii_capabilities & BMSR_100TXHDX)
384				mii->mii_media_active |= IFM_100_T4;
385			else if (anlpar & ANLPAR_TX_FD &&
386			    sc->mii_capabilities & BMSR_100TXHDX)
387				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
388			else if (anlpar & ANLPAR_TX &&
389			    sc->mii_capabilities & BMSR_100TXHDX)
390				mii->mii_media_active |= IFM_100_TX;
391			else if (anlpar & ANLPAR_10_FD)
392				mii->mii_media_active |= IFM_10_T|IFM_FDX;
393			else if (anlpar & ANLPAR_10)
394				mii->mii_media_active |= IFM_10_T;
395			else
396				mii->mii_media_active |= IFM_NONE;
397			if (DC_IS_INTEL(dc_sc))
398				DC_CLRBIT(dc_sc, DC_10BTCTRL,
399				    DC_TCTL_AUTONEGENBL);
400			return;
401		}
402		/*
403		 * If the other side doesn't support NWAY, then the
404		 * best we can do is determine if we have a 10Mbps or
405		 * 100Mbps link. There's no way to know if the link
406		 * is full or half duplex, so we default to half duplex
407		 * and hope that the user is clever enough to manually
408		 * change the media settings if we're wrong.
409		 */
410		if (!(reg & DC_TSTAT_LS100))
411			mii->mii_media_active |= IFM_100_TX;
412		else if (!(reg & DC_TSTAT_LS10))
413			mii->mii_media_active |= IFM_10_T;
414		else
415			mii->mii_media_active |= IFM_NONE;
416		if (DC_IS_INTEL(dc_sc))
417			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
418		return;
419	}
420
421	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SCRAMBLER)
422		mii->mii_media_active |= IFM_100_TX;
423	else
424		mii->mii_media_active |= IFM_10_T;
425	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
426		mii->mii_media_active |= IFM_FDX;
427
428	return;
429}
430
431int
432dcphy_auto(mii, waitfor)
433	struct mii_softc	*mii;
434	int			waitfor;
435{
436	int			i;
437	struct dc_softc		*sc;
438
439	sc = mii->mii_pdata->mii_ifp->if_softc;
440
441	if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
442		DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
443		DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
444		DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
445		if (mii->mii_capabilities & BMSR_100TXHDX)
446			CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
447		else
448			CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
449		DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
450		DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
451		DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
452	}
453
454	if (waitfor) {
455		/* Wait 500ms for it to complete. */
456		for (i = 0; i < 500; i++) {
457			if ((CSR_READ_4(sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT)
458			    == DC_ASTAT_AUTONEGCMP)
459				return(0);
460			DELAY(1000);
461		}
462		/*
463		 * Don't need to worry about clearing MIIF_DOINGAUTO.
464		 * If that's set, a timeout is pending, and it will
465		 * clear the flag.
466		 */
467		return(EIO);
468	}
469
470	/*
471	 * Just let it finish asynchronously.  This is for the benefit of
472	 * the tick handler driving autonegotiation.  Don't want 500ms
473	 * delays all the time while the system is running!
474	 */
475	if ((mii->mii_flags & MIIF_DOINGAUTO) == 0)
476		mii->mii_flags |= MIIF_DOINGAUTO;
477
478	return(EJUSTRETURN);
479}
480
481void
482dcphy_reset(mii)
483	struct mii_softc	*mii;
484{
485	struct dc_softc		*sc;
486
487	sc = mii->mii_pdata->mii_ifp->if_softc;
488
489	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
490	DELAY(1000);
491	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
492
493	return;
494}
495