wdcvar.h revision 1.2
1/* $OpenBSD: wdcvar.h,v 1.2 1999/07/22 02:54:06 csapuntz Exp $ */ 2/* $NetBSD: wdcvar.h,v 1.17 1999/04/11 20:50:29 bouyer Exp $ */ 3 4/*- 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40struct atapiscsi_softc; 41 42#define WAITTIME (10 * hz) /* time to wait for a completion */ 43 /* this is a lot for hard drives, but not for cdroms */ 44 45struct channel_queue { /* per channel queue (may be shared) */ 46 TAILQ_HEAD(xferhead, wdc_xfer) sc_xfer; 47}; 48 49struct channel_softc { /* Per channel data */ 50 /* Our location */ 51 int channel; 52 /* Our controller's softc */ 53 struct wdc_softc *wdc; 54 /* Our registers */ 55 bus_space_tag_t cmd_iot; 56 bus_space_handle_t cmd_ioh; 57 bus_space_tag_t ctl_iot; 58 bus_space_handle_t ctl_ioh; 59 /* data32{iot,ioh} are only used for 32 bit xfers */ 60 bus_space_tag_t data32iot; 61 bus_space_handle_t data32ioh; 62 /* Our state */ 63 int ch_flags; 64#define WDCF_ACTIVE 0x01 /* channel is active */ 65#define WDCF_IRQ_WAIT 0x10 /* controller is waiting for irq */ 66 u_int8_t ch_status; /* copy of status register */ 67 u_int8_t ch_error; /* copy of error register */ 68 /* per-drive infos */ 69 struct ata_drive_datas ch_drive[2]; 70 71 struct atapiscsi_softc *ch_as; 72 73 /* 74 * channel queues. May be the same for all channels, if hw channels 75 * are not independants 76 */ 77 struct channel_queue *ch_queue; 78}; 79 80struct wdc_softc { /* Per controller state */ 81 struct device sc_dev; 82 /* mandatory fields */ 83 int cap; 84/* Capabilities supported by the controller */ 85#define WDC_CAPABILITY_DATA16 0x0001 /* can do 16-bit data access */ 86#define WDC_CAPABILITY_DATA32 0x0002 /* can do 32-bit data access */ 87#define WDC_CAPABILITY_MODE 0x0004 /* controller knows its PIO/DMA modes */ 88#define WDC_CAPABILITY_DMA 0x0008 /* DMA */ 89#define WDC_CAPABILITY_UDMA 0x0010 /* Ultra-DMA/33 */ 90#define WDC_CAPABILITY_HWLOCK 0x0020 /* Needs to lock HW */ 91#define WDC_CAPABILITY_ATA_NOSTREAM 0x0040 /* Don't use stream funcs on ATA */ 92#define WDC_CAPABILITY_ATAPI_NOSTREAM 0x0080 /* Don't use stream f on ATAPI */ 93#define WDC_CAPABILITY_NO_EXTRA_RESETS 0x0100 /* only reset once */ 94#define WDC_CAPABILITY_PREATA 0x0200 /* ctrl can be a pre-ata one */ 95 u_int8_t PIO_cap; /* highest PIO mode supported */ 96 u_int8_t DMA_cap; /* highest DMA mode supported */ 97 u_int8_t UDMA_cap; /* highest UDMA mode supported */ 98 int nchannels; /* Number of channels on this controller */ 99 struct channel_softc **channels; /* channels-specific datas (array) */ 100 101#if 0 102 /* 103 * The reference count here is used for both IDE and ATAPI devices. 104 */ 105 struct scsipi_adapter sc_atapi_adapter; 106#endif 107 108 /* if WDC_CAPABILITY_DMA set in 'cap' */ 109 void *dma_arg; 110 int (*dma_init) __P((void *, int, int, void *, size_t, 111 int)); 112 void (*dma_start) __P((void *, int, int, int)); 113 int (*dma_finish) __P((void *, int, int, int)); 114/* flags passed to DMA functions */ 115#define WDC_DMA_READ 0x01 116#define WDC_DMA_POLL 0x02 117 118 /* if WDC_CAPABILITY_HWLOCK set in 'cap' */ 119 int (*claim_hw) __P((void *, int)); 120 void (*free_hw) __P((void *)); 121 122 /* if WDC_CAPABILITY_MODE set in 'cap' */ 123 void (*set_modes) __P((struct channel_softc *)); 124}; 125 126 /* 127 * Description of a command to be handled by a controller. 128 * These commands are queued in a list. 129 */ 130struct wdc_xfer { 131 volatile u_int c_flags; 132#define C_INUSE 0x0001 /* xfer struct is in use */ 133#define C_ATAPI 0x0002 /* xfer is ATAPI request */ 134#define C_TIMEOU 0x0004 /* xfer processing timed out */ 135#define C_NEEDDONE 0x0010 /* need to call upper-level done */ 136#define C_POLL 0x0020 /* cmd is polled */ 137#define C_DMA 0x0040 /* cmd uses DMA */ 138#define C_SENSE 0x0080 /* cmd is a internal command */ 139 140 /* Informations about our location */ 141 struct channel_softc *chp; 142 u_int8_t drive; 143 144 /* Information about the current transfer */ 145 void *cmd; /* wdc, ata or scsipi command structure */ 146 void *databuf; 147 int c_bcount; /* byte count left */ 148 int c_skip; /* bytes already transferred */ 149 TAILQ_ENTRY(wdc_xfer) c_xferchain; 150 LIST_ENTRY(wdc_xfer) free_list; 151 void (*c_start) __P((struct channel_softc *, struct wdc_xfer *)); 152 int (*c_intr) __P((struct channel_softc *, struct wdc_xfer *, int)); 153}; 154 155/* 156 * Public functions which can be called by ATA or ATAPI specific parts, 157 * or bus-specific backends. 158 */ 159 160int wdcprobe __P((struct channel_softc *)); 161void wdcattach __P((struct channel_softc *)); 162void wdc_final_attach __P((struct channel_softc *)); 163int wdcintr __P((void *)); 164void wdc_exec_xfer __P((struct channel_softc *, struct wdc_xfer *)); 165struct wdc_xfer *wdc_get_xfer __P((int)); /* int = WDC_NOSLEEP/CANSLEEP */ 166#define WDC_CANSLEEP 0x00 167#define WDC_NOSLEEP 0x01 168void wdc_free_xfer __P((struct channel_softc *, struct wdc_xfer *)); 169void wdcstart __P((struct channel_softc *)); 170void wdcrestart __P((void*)); 171int wdcreset __P((struct channel_softc *, int)); 172#define VERBOSE 1 173#define SILENT 0 /* wdcreset will not print errors */ 174int wdcwait __P((struct channel_softc *, int, int, int)); 175void wdcbit_bucket __P(( struct channel_softc *, int)); 176void wdccommand __P((struct channel_softc *, u_int8_t, u_int8_t, u_int16_t, 177 u_int8_t, u_int8_t, u_int8_t, u_int8_t)); 178void wdccommandshort __P((struct channel_softc *, int, int)); 179void wdctimeout __P((void *arg)); 180 181int wdc_addref __P((struct channel_softc *)); 182void wdc_delref __P((struct channel_softc *)); 183 184/* 185 * ST506 spec says that if READY or SEEKCMPLT go off, then the read or write 186 * command is aborted. 187 */ 188#define wait_for_drq(chp, timeout) wdcwait((chp), WDCS_DRQ, WDCS_DRQ, (timeout)) 189#define wait_for_unbusy(chp, timeout) wdcwait((chp), 0, 0, (timeout)) 190#define wait_for_ready(chp, timeout) wdcwait((chp), WDCS_DRDY, \ 191 WDCS_DRDY, (timeout)) 192/* ATA/ATAPI specs says a device can take 31s to reset */ 193#define WDC_RESET_WAIT 31000 194 195void wdc_atapibus_attach __P((struct channel_softc *)); 196void wdc_atapibus_final_attach __P((struct channel_softc *)); 197 198int atapi_print __P((void *, const char *)); 199 200void wdc_disable_intr __P((struct channel_softc *)); 201void wdc_enable_intr __P((struct channel_softc *)); 202int wdc_select_drive __P((struct channel_softc *, int, int)); 203