smc93cx6.c revision 1.14 
1/*	$OpenBSD: smc93cx6.c,v 1.14 2003/08/08 21:34:39 fgsch Exp $	*/
2/* $FreeBSD: sys/dev/aic7xxx/93cx6.c,v 1.5 2000/01/07 23:08:17 gibbs Exp $ */
3/*
4 * Interface for the 93C66/56/46/26/06 serial eeprom parts.
5 *
6 * Copyright (c) 1995, 1996 Daniel M. Eischen
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice immediately at the beginning of the file, without modification,
14 *    this list of conditions, and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. Absolutely no warranty of function or purpose is made by the author
19 *    Daniel M. Eischen.
20 * 4. Modifications may be freely made to this file if the above conditions
21 *    are met.
22 */
23
24/*
25 *   The instruction set of the 93C66/56/46/26/06 chips are as follows:
26 *
27 *               Start  OP	    *
28 *     Function   Bit  Code  Address**  Data     Description
29 *     -------------------------------------------------------------------
30 *     READ        1    10   A5 - A0             Reads data stored in memory,
31 *                                               starting at specified address
32 *     EWEN        1    00   11XXXX              Write enable must precede
33 *                                               all programming modes
34 *     ERASE       1    11   A5 - A0             Erase register A5A4A3A2A1A0
35 *     WRITE       1    01   A5 - A0   D15 - D0  Writes register
36 *     ERAL        1    00   10XXXX              Erase all registers
37 *     WRAL        1    00   01XXXX    D15 - D0  Writes to all registers
38 *     EWDS        1    00   00XXXX              Disables all programming
39 *                                               instructions
40 *     *Note: A value of X for address is a don't care condition.
41 *    **Note: There are 8 address bits for the 93C56/66 chips unlike
42 *	      the 93C46/26/06 chips which have 6 address bits.
43 *
44 *   The 93C46 has a four wire interface: clock, chip select, data in, and
45 *   data out.  In order to perform one of the above functions, you need
46 *   to enable the chip select for a clock period (typically a minimum of
47 *   1 usec, with the clock high and low a minimum of 750 and 250 nsec
48 *   respectively).  While the chip select remains high, you can clock in
49 *   the instructions (above) starting with the start bit, followed by the
50 *   OP code, Address, and Data (if needed).  For the READ instruction, the
51 *   requested 16-bit register contents is read from the data out line but
52 *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB
53 *   first).  The clock cycling from low to high initiates the next data
54 *   bit to be sent from the chip.
55 *
56 */
57
58#include <sys/param.h>
59#include <sys/systm.h>
60#include <machine/bus.h>
61#include <dev/ic/aic7xxx_openbsd.h>
62#include <dev/ic/aic7xxx_inline.h>
63#include <dev/ic/smc93cx6var.h>
64
65/*
66 * Right now, we only have to read the SEEPROM.  But we make it easier to
67 * add other 93Cx6 functions.
68 */
69static struct seeprom_cmd {
70  	unsigned char len;
71 	unsigned char bits[9];
72} seeprom_read = {3, {1, 1, 0}};
73
74/*
75 * Wait for the SEERDY to go high; about 800 ns.
76 */
77#define CLOCK_PULSE(sd, rdy)				\
78	while ((SEEPROM_STATUS_INB(sd) & rdy) == 0) {	\
79		;  /* Do nothing */			\
80	}						\
81	(void)SEEPROM_INB(sd);	/* Clear clock */
82
83/*
84 * Send a START condition and the given command
85 */
86static void
87send_seeprom_cmd(struct seeprom_descriptor *sd, struct seeprom_cmd *cmd)
88{
89	u_int8_t temp;
90	int i = 0;
91
92	/* Send chip select for one clock cycle. */
93	temp = sd->sd_MS ^ sd->sd_CS;
94	SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
95	CLOCK_PULSE(sd, sd->sd_RDY);
96
97	for (i = 0; i < cmd->len; i++) {
98		if (cmd->bits[i] != 0)
99			temp ^= sd->sd_DO;
100		SEEPROM_OUTB(sd, temp);
101		CLOCK_PULSE(sd, sd->sd_RDY);
102		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
103		CLOCK_PULSE(sd, sd->sd_RDY);
104		if (cmd->bits[i] != 0)
105			temp ^= sd->sd_DO;
106	}
107}
108
109/*
110 * Clear CS put the chip in the reset state, where it can wait for new commands.
111 */
112static void
113reset_seeprom(struct seeprom_descriptor *sd)
114{
115	u_int8_t temp;
116
117	temp = sd->sd_MS;
118	SEEPROM_OUTB(sd, temp);
119	CLOCK_PULSE(sd, sd->sd_RDY);
120	SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
121	CLOCK_PULSE(sd, sd->sd_RDY);
122	SEEPROM_OUTB(sd, temp);
123	CLOCK_PULSE(sd, sd->sd_RDY);
124}
125
126/*
127 * Read the serial EEPROM and returns 1 if successful and 0 if
128 * not successful.
129 */
130int
131read_seeprom(sd, buf, start_addr, count)
132	struct seeprom_descriptor *sd;
133	u_int16_t *buf;
134	bus_size_t start_addr;
135	bus_size_t count;
136{
137	int i = 0;
138	u_int k = 0;
139	u_int16_t v;
140	u_int8_t temp;
141
142	/*
143	 * Read the requested registers of the seeprom.  The loop
144	 * will range from 0 to count-1.
145	 */
146	for (k = start_addr; k < count + start_addr; k++) {
147		/*
148		 * Now we're ready to send the read command followed by the
149		 * address of the 16-bit register we want to read.
150		 */
151		send_seeprom_cmd(sd, &seeprom_read);
152
153		/* Send the 6 or 8 bit address (MSB first, LSB last). */
154		temp = sd->sd_MS ^ sd->sd_CS;
155		for (i = (sd->sd_chip - 1); i >= 0; i--) {
156			if ((k & (1 << i)) != 0)
157				temp ^= sd->sd_DO;
158			SEEPROM_OUTB(sd, temp);
159			CLOCK_PULSE(sd, sd->sd_RDY);
160			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
161			CLOCK_PULSE(sd, sd->sd_RDY);
162			if ((k & (1 << i)) != 0)
163				temp ^= sd->sd_DO;
164		}
165
166		/*
167		 * Now read the 16 bit register.  An initial 0 precedes the
168		 * register contents which begins with bit 15 (MSB) and ends
169		 * with bit 0 (LSB).  The initial 0 will be shifted off the
170		 * top of our word as we let the loop run from 0 to 16.
171		 */
172		v = 0;
173		for (i = 16; i >= 0; i--) {
174			SEEPROM_OUTB(sd, temp);
175			CLOCK_PULSE(sd, sd->sd_RDY);
176			v <<= 1;
177			if (SEEPROM_DATA_INB(sd) & sd->sd_DI)
178				v |= 1;
179			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
180			CLOCK_PULSE(sd, sd->sd_RDY);
181		}
182
183		buf[k - start_addr] = v;
184
185		/* Reset the chip select for the next command cycle. */
186		reset_seeprom(sd);
187	}
188#ifdef AHC_DUMP_EEPROM
189	printf("\nSerial EEPROM:\n\t");
190	for (k = 0; k < count; k = k + 1) {
191		if (((k % 8) == 0) && (k != 0)) {
192			printf ("\n\t");
193		}
194		printf (" 0x%x", buf[k]);
195	}
196	printf ("\n");
197#endif
198	return (1);
199}
200
201int
202verify_cksum(struct seeprom_config *sc)
203{
204	int i;
205	int maxaddr;
206	u_int32_t checksum;
207	u_int16_t *scarray;
208
209	maxaddr = (sizeof(*sc)/2) - 1;
210	checksum = 0;
211	scarray = (uint16_t *)sc;
212
213	for (i = 0; i < maxaddr; i++)
214		checksum = checksum + scarray[i];
215	if (checksum == 0 ||
216	    (checksum & 0xFFFF) != sc->checksum) {
217		return (0);
218	} else {
219		return(1);
220	}
221}
222