silireg.h revision 1.4
1/* $OpenBSD: silireg.h,v 1.4 2007/03/24 02:28:06 dlg Exp $ */ 2 3/* 4 * Copyright (c) 2007 David Gwynne <dlg@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19#define SILI_PCI_BAR_GLOBAL 0x10 20#define SILI_PCI_BAR_PORT 0x14 21#define SILI_PCI_BAR_INDIRECT 0x18 22 23#define SILI_REG_PORT0_STATUS 0x00 /* Port 0 Slot Status */ 24#define SILI_REG_PORT1_STATUS 0x04 /* Port 1 Slot Status */ 25#define SILI_REG_PORT2_STATUS 0x08 /* Port 2 Slot Status */ 26#define SILI_REG_PORT3_STATUS 0x0c /* Port 3 Slot Status */ 27#define SILI_REG_GC 0x40 /* Global Control */ 28#define SILI_REG_GIS 0x40 /* Global Interrupt Status */ 29#define SILI_REG_PHYCONF 0x48 /* PHY Configuration */ 30#define SILI_REG_BISTCTL 0x50 /* BIST Control */ 31#define SILI_REG_BISTPATTERN 0x54 /* BIST Pattern */ 32#define SILI_REG_BISTSTAT 0x58 /* BIST Status */ 33#define SILI_REG_FLASHADDR 0x70 /* Flash Address */ 34#define SILI_REG_FLASHDATA 0x74 /* Flash Memory Data / GPIO Control */ 35#define SILI_REG_GPIOCTL SILI_REG_FLASHDATA 36#define SILI_REG_IICADDR 0x78 /* I2C Address */ 37#define SILI_REG_IIC 0x7c /* I2C Data / Control */ 38