rt2560.c revision 1.82
1/* $OpenBSD: rt2560.c,v 1.82 2017/01/22 10:17:38 dlg Exp $ */ 2 3/*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/*- 21 * Ralink Technology RT2560 chipset driver 22 * http://www.ralinktech.com/ 23 */ 24 25#include "bpfilter.h" 26 27#include <sys/param.h> 28#include <sys/sockio.h> 29#include <sys/mbuf.h> 30#include <sys/kernel.h> 31#include <sys/socket.h> 32#include <sys/systm.h> 33#include <sys/malloc.h> 34#include <sys/timeout.h> 35#include <sys/conf.h> 36#include <sys/device.h> 37#include <sys/endian.h> 38 39#include <machine/bus.h> 40#include <machine/intr.h> 41 42#if NBPFILTER > 0 43#include <net/bpf.h> 44#endif 45#include <net/if.h> 46#include <net/if_dl.h> 47#include <net/if_media.h> 48 49#include <netinet/in.h> 50#include <netinet/if_ether.h> 51 52#include <net80211/ieee80211_var.h> 53#include <net80211/ieee80211_amrr.h> 54#include <net80211/ieee80211_radiotap.h> 55 56#include <dev/ic/rt2560reg.h> 57#include <dev/ic/rt2560var.h> 58 59#ifdef RAL_DEBUG 60#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 61#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 62int rt2560_debug = 1; 63#else 64#define DPRINTF(x) 65#define DPRINTFN(n, x) 66#endif 67 68int rt2560_alloc_tx_ring(struct rt2560_softc *, 69 struct rt2560_tx_ring *, int); 70void rt2560_reset_tx_ring(struct rt2560_softc *, 71 struct rt2560_tx_ring *); 72void rt2560_free_tx_ring(struct rt2560_softc *, 73 struct rt2560_tx_ring *); 74int rt2560_alloc_rx_ring(struct rt2560_softc *, 75 struct rt2560_rx_ring *, int); 76void rt2560_reset_rx_ring(struct rt2560_softc *, 77 struct rt2560_rx_ring *); 78void rt2560_free_rx_ring(struct rt2560_softc *, 79 struct rt2560_rx_ring *); 80struct ieee80211_node *rt2560_node_alloc(struct ieee80211com *); 81int rt2560_media_change(struct ifnet *); 82void rt2560_next_scan(void *); 83void rt2560_iter_func(void *, struct ieee80211_node *); 84void rt2560_amrr_timeout(void *); 85void rt2560_newassoc(struct ieee80211com *, struct ieee80211_node *, 86 int); 87int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 88 int); 89uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 90void rt2560_encryption_intr(struct rt2560_softc *); 91void rt2560_tx_intr(struct rt2560_softc *); 92void rt2560_prio_intr(struct rt2560_softc *); 93void rt2560_decryption_intr(struct rt2560_softc *); 94void rt2560_rx_intr(struct rt2560_softc *); 95#ifndef IEEE80211_STA_ONLY 96void rt2560_beacon_expire(struct rt2560_softc *); 97#endif 98void rt2560_wakeup_expire(struct rt2560_softc *); 99#if NBPFILTER > 0 100uint8_t rt2560_rxrate(const struct rt2560_rx_desc *); 101#endif 102int rt2560_ack_rate(struct ieee80211com *, int); 103uint16_t rt2560_txtime(int, int, uint32_t); 104uint8_t rt2560_plcp_signal(int); 105void rt2560_setup_tx_desc(struct rt2560_softc *, 106 struct rt2560_tx_desc *, uint32_t, int, int, int, 107 bus_addr_t); 108#ifndef IEEE80211_STA_ONLY 109int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 110 struct ieee80211_node *); 111#endif 112int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 113 struct ieee80211_node *); 114int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 115 struct ieee80211_node *); 116void rt2560_start(struct ifnet *); 117void rt2560_watchdog(struct ifnet *); 118int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 119void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 120uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 121void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 122void rt2560_set_chan(struct rt2560_softc *, 123 struct ieee80211_channel *); 124void rt2560_disable_rf_tune(struct rt2560_softc *); 125void rt2560_enable_tsf_sync(struct rt2560_softc *); 126void rt2560_update_plcp(struct rt2560_softc *); 127void rt2560_updateslot(struct ieee80211com *); 128void rt2560_set_slottime(struct rt2560_softc *); 129void rt2560_set_basicrates(struct rt2560_softc *); 130void rt2560_update_led(struct rt2560_softc *, int, int); 131void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 132void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 133void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 134void rt2560_update_promisc(struct rt2560_softc *); 135void rt2560_set_txantenna(struct rt2560_softc *, int); 136void rt2560_set_rxantenna(struct rt2560_softc *, int); 137const char *rt2560_get_rf(int); 138void rt2560_read_eeprom(struct rt2560_softc *); 139int rt2560_bbp_init(struct rt2560_softc *); 140int rt2560_init(struct ifnet *); 141void rt2560_stop(struct ifnet *, int); 142 143static const struct { 144 uint32_t reg; 145 uint32_t val; 146} rt2560_def_mac[] = { 147 RT2560_DEF_MAC 148}; 149 150static const struct { 151 uint8_t reg; 152 uint8_t val; 153} rt2560_def_bbp[] = { 154 RT2560_DEF_BBP 155}; 156 157static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2; 158static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2; 159static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2; 160static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2; 161static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2; 162static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2; 163static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2; 164static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2; 165 166int 167rt2560_attach(void *xsc, int id) 168{ 169 struct rt2560_softc *sc = xsc; 170 struct ieee80211com *ic = &sc->sc_ic; 171 struct ifnet *ifp = &ic->ic_if; 172 int error, i; 173 174 sc->amrr.amrr_min_success_threshold = 1; 175 sc->amrr.amrr_max_success_threshold = 15; 176 timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc); 177 timeout_set(&sc->scan_to, rt2560_next_scan, sc); 178 179 /* retrieve RT2560 rev. no */ 180 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 181 182 /* retrieve MAC address */ 183 rt2560_get_macaddr(sc, ic->ic_myaddr); 184 printf(", address %s\n", ether_sprintf(ic->ic_myaddr)); 185 186 /* retrieve RF rev. no and various other things from EEPROM */ 187 rt2560_read_eeprom(sc); 188 189 printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname, 190 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 191 192 /* 193 * Allocate Tx and Rx rings. 194 */ 195 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 196 if (error != 0) { 197 printf("%s: could not allocate Tx ring\n", 198 sc->sc_dev.dv_xname); 199 goto fail1; 200 } 201 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 202 if (error != 0) { 203 printf("%s: could not allocate ATIM ring\n", 204 sc->sc_dev.dv_xname); 205 goto fail2; 206 } 207 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 208 if (error != 0) { 209 printf("%s: could not allocate Prio ring\n", 210 sc->sc_dev.dv_xname); 211 goto fail3; 212 } 213 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 214 if (error != 0) { 215 printf("%s: could not allocate Beacon ring\n", 216 sc->sc_dev.dv_xname); 217 goto fail4; 218 } 219 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 220 if (error != 0) { 221 printf("%s: could not allocate Rx ring\n", 222 sc->sc_dev.dv_xname); 223 goto fail5; 224 } 225 226 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 227 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 228 ic->ic_state = IEEE80211_S_INIT; 229 230 /* set device capabilities */ 231 ic->ic_caps = 232 IEEE80211_C_MONITOR | /* monitor mode supported */ 233#ifndef IEEE80211_STA_ONLY 234 IEEE80211_C_IBSS | /* IBSS mode supported */ 235 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 236#endif 237 IEEE80211_C_TXPMGT | /* tx power management */ 238 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 239 IEEE80211_C_SHSLOT | /* short slot time supported */ 240 IEEE80211_C_WEP | /* s/w WEP */ 241 IEEE80211_C_RSN; /* WPA/RSN */ 242 243 /* set supported .11b and .11g rates */ 244 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 245 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 246 247 /* set supported .11b and .11g channels (1 through 14) */ 248 for (i = 1; i <= 14; i++) { 249 ic->ic_channels[i].ic_freq = 250 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 251 ic->ic_channels[i].ic_flags = 252 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 253 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 254 } 255 256 ifp->if_softc = sc; 257 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 258 ifp->if_ioctl = rt2560_ioctl; 259 ifp->if_start = rt2560_start; 260 ifp->if_watchdog = rt2560_watchdog; 261 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 262 263 if_attach(ifp); 264 ieee80211_ifattach(ifp); 265 ic->ic_node_alloc = rt2560_node_alloc; 266 ic->ic_newassoc = rt2560_newassoc; 267 ic->ic_updateslot = rt2560_updateslot; 268 269 /* XXX RTS causes throughput problems -- where is the bug? */ 270 ic->ic_rtsthreshold = IEEE80211_RTS_MAX; 271 272 /* override state transition machine */ 273 sc->sc_newstate = ic->ic_newstate; 274 ic->ic_newstate = rt2560_newstate; 275 ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status); 276 277#if NBPFILTER > 0 278 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 279 sizeof (struct ieee80211_frame) + 64); 280 281 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 282 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 283 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 284 285 sc->sc_txtap_len = sizeof sc->sc_txtapu; 286 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 287 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 288#endif 289 return 0; 290 291fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 292fail4: rt2560_free_tx_ring(sc, &sc->prioq); 293fail3: rt2560_free_tx_ring(sc, &sc->atimq); 294fail2: rt2560_free_tx_ring(sc, &sc->txq); 295fail1: return ENXIO; 296} 297 298int 299rt2560_detach(void *xsc) 300{ 301 struct rt2560_softc *sc = xsc; 302 struct ifnet *ifp = &sc->sc_ic.ic_if; 303 304 timeout_del(&sc->scan_to); 305 timeout_del(&sc->amrr_to); 306 307 ieee80211_ifdetach(ifp); /* free all nodes */ 308 if_detach(ifp); 309 310 rt2560_free_tx_ring(sc, &sc->txq); 311 rt2560_free_tx_ring(sc, &sc->atimq); 312 rt2560_free_tx_ring(sc, &sc->prioq); 313 rt2560_free_tx_ring(sc, &sc->bcnq); 314 rt2560_free_rx_ring(sc, &sc->rxq); 315 316 return 0; 317} 318 319void 320rt2560_suspend(void *xsc) 321{ 322 struct rt2560_softc *sc = xsc; 323 struct ifnet *ifp = &sc->sc_ic.ic_if; 324 325 if (ifp->if_flags & IFF_RUNNING) 326 rt2560_stop(ifp, 1); 327} 328 329void 330rt2560_wakeup(void *xsc) 331{ 332 struct rt2560_softc *sc = xsc; 333 struct ifnet *ifp = &sc->sc_ic.ic_if; 334 335 if (ifp->if_flags & IFF_UP) 336 rt2560_init(ifp); 337} 338 339int 340rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 341 int count) 342{ 343 int i, nsegs, error; 344 345 ring->count = count; 346 ring->queued = 0; 347 ring->cur = ring->next = 0; 348 ring->cur_encrypt = ring->next_encrypt = 0; 349 350 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 351 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 352 if (error != 0) { 353 printf("%s: could not create desc DMA map\n", 354 sc->sc_dev.dv_xname); 355 goto fail; 356 } 357 358 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 359 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO); 360 if (error != 0) { 361 printf("%s: could not allocate DMA memory\n", 362 sc->sc_dev.dv_xname); 363 goto fail; 364 } 365 366 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 367 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 368 BUS_DMA_NOWAIT); 369 if (error != 0) { 370 printf("%s: can't map desc DMA memory\n", 371 sc->sc_dev.dv_xname); 372 goto fail; 373 } 374 375 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 376 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 377 if (error != 0) { 378 printf("%s: could not load desc DMA map\n", 379 sc->sc_dev.dv_xname); 380 goto fail; 381 } 382 383 ring->physaddr = ring->map->dm_segs->ds_addr; 384 385 ring->data = mallocarray(count, sizeof (struct rt2560_tx_data), 386 M_DEVBUF, M_NOWAIT | M_ZERO); 387 if (ring->data == NULL) { 388 printf("%s: could not allocate soft data\n", 389 sc->sc_dev.dv_xname); 390 error = ENOMEM; 391 goto fail; 392 } 393 394 for (i = 0; i < count; i++) { 395 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 396 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 397 &ring->data[i].map); 398 if (error != 0) { 399 printf("%s: could not create DMA map\n", 400 sc->sc_dev.dv_xname); 401 goto fail; 402 } 403 } 404 405 return 0; 406 407fail: rt2560_free_tx_ring(sc, ring); 408 return error; 409} 410 411void 412rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 413{ 414 int i; 415 416 for (i = 0; i < ring->count; i++) { 417 struct rt2560_tx_desc *desc = &ring->desc[i]; 418 struct rt2560_tx_data *data = &ring->data[i]; 419 420 if (data->m != NULL) { 421 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 422 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 423 bus_dmamap_unload(sc->sc_dmat, data->map); 424 m_freem(data->m); 425 data->m = NULL; 426 } 427 428 /* 429 * The node has already been freed at that point so don't call 430 * ieee80211_release_node() here. 431 */ 432 data->ni = NULL; 433 434 desc->flags = 0; 435 } 436 437 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 438 BUS_DMASYNC_PREWRITE); 439 440 ring->queued = 0; 441 ring->cur = ring->next = 0; 442 ring->cur_encrypt = ring->next_encrypt = 0; 443} 444 445void 446rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 447{ 448 int i; 449 450 if (ring->desc != NULL) { 451 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 452 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 453 bus_dmamap_unload(sc->sc_dmat, ring->map); 454 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 455 ring->count * RT2560_TX_DESC_SIZE); 456 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 457 } 458 459 if (ring->data != NULL) { 460 for (i = 0; i < ring->count; i++) { 461 struct rt2560_tx_data *data = &ring->data[i]; 462 463 if (data->m != NULL) { 464 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 465 data->map->dm_mapsize, 466 BUS_DMASYNC_POSTWRITE); 467 bus_dmamap_unload(sc->sc_dmat, data->map); 468 m_freem(data->m); 469 } 470 471 /* 472 * The node has already been freed at that point so 473 * don't call ieee80211_release_node() here. 474 */ 475 data->ni = NULL; 476 477 if (data->map != NULL) 478 bus_dmamap_destroy(sc->sc_dmat, data->map); 479 } 480 free(ring->data, M_DEVBUF, ring->count * sizeof *ring->data); 481 } 482} 483 484int 485rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 486 int count) 487{ 488 int i, nsegs, error; 489 490 ring->count = count; 491 ring->cur = ring->next = 0; 492 ring->cur_decrypt = 0; 493 494 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 495 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 496 if (error != 0) { 497 printf("%s: could not create desc DMA map\n", 498 sc->sc_dev.dv_xname); 499 goto fail; 500 } 501 502 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 503 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO); 504 if (error != 0) { 505 printf("%s: could not allocate DMA memory\n", 506 sc->sc_dev.dv_xname); 507 goto fail; 508 } 509 510 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 511 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 512 BUS_DMA_NOWAIT); 513 if (error != 0) { 514 printf("%s: can't map desc DMA memory\n", 515 sc->sc_dev.dv_xname); 516 goto fail; 517 } 518 519 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 520 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 521 if (error != 0) { 522 printf("%s: could not load desc DMA map\n", 523 sc->sc_dev.dv_xname); 524 goto fail; 525 } 526 527 ring->physaddr = ring->map->dm_segs->ds_addr; 528 529 ring->data = mallocarray(count, sizeof (struct rt2560_rx_data), 530 M_DEVBUF, M_NOWAIT | M_ZERO); 531 if (ring->data == NULL) { 532 printf("%s: could not allocate soft data\n", 533 sc->sc_dev.dv_xname); 534 error = ENOMEM; 535 goto fail; 536 } 537 538 /* 539 * Pre-allocate Rx buffers and populate Rx ring. 540 */ 541 for (i = 0; i < count; i++) { 542 struct rt2560_rx_desc *desc = &sc->rxq.desc[i]; 543 struct rt2560_rx_data *data = &sc->rxq.data[i]; 544 545 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 546 0, BUS_DMA_NOWAIT, &data->map); 547 if (error != 0) { 548 printf("%s: could not create DMA map\n", 549 sc->sc_dev.dv_xname); 550 goto fail; 551 } 552 553 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 554 if (data->m == NULL) { 555 printf("%s: could not allocate rx mbuf\n", 556 sc->sc_dev.dv_xname); 557 error = ENOMEM; 558 goto fail; 559 } 560 MCLGET(data->m, M_DONTWAIT); 561 if (!(data->m->m_flags & M_EXT)) { 562 printf("%s: could not allocate rx mbuf cluster\n", 563 sc->sc_dev.dv_xname); 564 error = ENOMEM; 565 goto fail; 566 } 567 568 error = bus_dmamap_load(sc->sc_dmat, data->map, 569 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 570 if (error != 0) { 571 printf("%s: could not load rx buf DMA map", 572 sc->sc_dev.dv_xname); 573 goto fail; 574 } 575 576 desc->flags = htole32(RT2560_RX_BUSY); 577 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 578 } 579 580 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 581 BUS_DMASYNC_PREWRITE); 582 583 return 0; 584 585fail: rt2560_free_rx_ring(sc, ring); 586 return error; 587} 588 589void 590rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 591{ 592 int i; 593 594 for (i = 0; i < ring->count; i++) { 595 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 596 ring->data[i].drop = 0; 597 } 598 599 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 600 BUS_DMASYNC_PREWRITE); 601 602 ring->cur = ring->next = 0; 603 ring->cur_decrypt = 0; 604} 605 606void 607rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 608{ 609 int i; 610 611 if (ring->desc != NULL) { 612 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 613 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 614 bus_dmamap_unload(sc->sc_dmat, ring->map); 615 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 616 ring->count * RT2560_RX_DESC_SIZE); 617 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 618 } 619 620 if (ring->data != NULL) { 621 for (i = 0; i < ring->count; i++) { 622 struct rt2560_rx_data *data = &ring->data[i]; 623 624 if (data->m != NULL) { 625 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 626 data->map->dm_mapsize, 627 BUS_DMASYNC_POSTREAD); 628 bus_dmamap_unload(sc->sc_dmat, data->map); 629 m_freem(data->m); 630 } 631 632 if (data->map != NULL) 633 bus_dmamap_destroy(sc->sc_dmat, data->map); 634 } 635 free(ring->data, M_DEVBUF, ring->count * sizeof *ring->data); 636 } 637} 638 639struct ieee80211_node * 640rt2560_node_alloc(struct ieee80211com *ic) 641{ 642 return malloc(sizeof (struct rt2560_node), M_DEVBUF, 643 M_NOWAIT | M_ZERO); 644} 645 646int 647rt2560_media_change(struct ifnet *ifp) 648{ 649 int error; 650 651 error = ieee80211_media_change(ifp); 652 if (error != ENETRESET) 653 return error; 654 655 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 656 rt2560_init(ifp); 657 658 return 0; 659} 660 661/* 662 * This function is called periodically (every 200ms) during scanning to 663 * switch from one channel to another. 664 */ 665void 666rt2560_next_scan(void *arg) 667{ 668 struct rt2560_softc *sc = arg; 669 struct ieee80211com *ic = &sc->sc_ic; 670 struct ifnet *ifp = &ic->ic_if; 671 int s; 672 673 s = splnet(); 674 if (ic->ic_state == IEEE80211_S_SCAN) 675 ieee80211_next_scan(ifp); 676 splx(s); 677} 678 679/* 680 * This function is called for each neighbor node. 681 */ 682void 683rt2560_iter_func(void *arg, struct ieee80211_node *ni) 684{ 685 struct rt2560_softc *sc = arg; 686 struct rt2560_node *rn = (struct rt2560_node *)ni; 687 688 ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn); 689} 690 691void 692rt2560_amrr_timeout(void *arg) 693{ 694 struct rt2560_softc *sc = arg; 695 struct ieee80211com *ic = &sc->sc_ic; 696 int s; 697 698 s = splnet(); 699 if (ic->ic_opmode == IEEE80211_M_STA) 700 rt2560_iter_func(sc, ic->ic_bss); 701#ifndef IEEE80211_STA_ONLY 702 else 703 ieee80211_iterate_nodes(ic, rt2560_iter_func, sc); 704#endif 705 splx(s); 706 707 timeout_add_msec(&sc->amrr_to, 500); 708} 709 710void 711rt2560_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 712{ 713 struct rt2560_softc *sc = ic->ic_softc; 714 int i; 715 716 ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn); 717 718 /* set rate to some reasonable initial value */ 719 for (i = ni->ni_rates.rs_nrates - 1; 720 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 721 i--); 722 ni->ni_txrate = i; 723} 724 725int 726rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 727{ 728 struct rt2560_softc *sc = ic->ic_if.if_softc; 729 enum ieee80211_state ostate; 730 struct ieee80211_node *ni; 731 int error = 0; 732 733 ostate = ic->ic_state; 734 timeout_del(&sc->scan_to); 735 timeout_del(&sc->amrr_to); 736 737 switch (nstate) { 738 case IEEE80211_S_INIT: 739 if (ostate == IEEE80211_S_RUN) { 740 /* abort TSF synchronization */ 741 RAL_WRITE(sc, RT2560_CSR14, 0); 742 743 /* turn association led off */ 744 rt2560_update_led(sc, 0, 0); 745 } 746 break; 747 748 case IEEE80211_S_SCAN: 749 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 750 timeout_add_msec(&sc->scan_to, 200); 751 break; 752 753 case IEEE80211_S_AUTH: 754 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 755 break; 756 757 case IEEE80211_S_ASSOC: 758 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 759 break; 760 761 case IEEE80211_S_RUN: 762 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 763 764 ni = ic->ic_bss; 765 766 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 767 rt2560_update_plcp(sc); 768 rt2560_set_slottime(sc); 769 rt2560_set_basicrates(sc); 770 rt2560_set_bssid(sc, ni->ni_bssid); 771 } 772 773#ifndef IEEE80211_STA_ONLY 774 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 775 ic->ic_opmode == IEEE80211_M_IBSS) { 776 struct mbuf *m = ieee80211_beacon_alloc(ic, ni); 777 if (m == NULL) { 778 printf("%s: could not allocate beacon\n", 779 sc->sc_dev.dv_xname); 780 error = ENOBUFS; 781 break; 782 } 783 784 error = rt2560_tx_bcn(sc, m, ni); 785 if (error != 0) 786 break; 787 } 788#endif 789 790 /* turn assocation led on */ 791 rt2560_update_led(sc, 1, 0); 792 793 if (ic->ic_opmode == IEEE80211_M_STA) { 794 /* fake a join to init the tx rate */ 795 rt2560_newassoc(ic, ni, 1); 796 } 797 798 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 799 /* start automatic rate control timer */ 800 if (ic->ic_fixed_rate == -1) 801 timeout_add_msec(&sc->amrr_to, 500); 802 803 rt2560_enable_tsf_sync(sc); 804 } 805 break; 806 } 807 808 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 809} 810 811/* 812 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 813 * 93C66). 814 */ 815uint16_t 816rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 817{ 818 uint32_t tmp; 819 uint16_t val; 820 int n; 821 822 /* clock C once before the first command */ 823 RT2560_EEPROM_CTL(sc, 0); 824 825 RT2560_EEPROM_CTL(sc, RT2560_S); 826 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 827 RT2560_EEPROM_CTL(sc, RT2560_S); 828 829 /* write start bit (1) */ 830 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 831 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 832 833 /* write READ opcode (10) */ 834 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 835 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 836 RT2560_EEPROM_CTL(sc, RT2560_S); 837 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 838 839 /* write address (A5-A0 or A7-A0) */ 840 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 841 for (; n >= 0; n--) { 842 RT2560_EEPROM_CTL(sc, RT2560_S | 843 (((addr >> n) & 1) << RT2560_SHIFT_D)); 844 RT2560_EEPROM_CTL(sc, RT2560_S | 845 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 846 } 847 848 RT2560_EEPROM_CTL(sc, RT2560_S); 849 850 /* read data Q15-Q0 */ 851 val = 0; 852 for (n = 15; n >= 0; n--) { 853 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 854 tmp = RAL_READ(sc, RT2560_CSR21); 855 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 856 RT2560_EEPROM_CTL(sc, RT2560_S); 857 } 858 859 RT2560_EEPROM_CTL(sc, 0); 860 861 /* clear Chip Select and clock C */ 862 RT2560_EEPROM_CTL(sc, RT2560_S); 863 RT2560_EEPROM_CTL(sc, 0); 864 RT2560_EEPROM_CTL(sc, RT2560_C); 865 866 return val; 867} 868 869/* 870 * Some frames were processed by the hardware cipher engine and are ready for 871 * transmission. 872 */ 873void 874rt2560_encryption_intr(struct rt2560_softc *sc) 875{ 876 int hw; 877 878 /* retrieve last descriptor index processed by cipher engine */ 879 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 880 RT2560_TX_DESC_SIZE; 881 882 for (; sc->txq.next_encrypt != hw;) { 883 struct rt2560_tx_desc *desc = 884 &sc->txq.desc[sc->txq.next_encrypt]; 885 886 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 887 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 888 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 889 890 if (letoh32(desc->flags) & 891 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 892 break; 893 894 /* for TKIP, swap eiv field to fix a bug in ASIC */ 895 if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) == 896 RT2560_TX_CIPHER_TKIP) 897 desc->eiv = swap32(desc->eiv); 898 899 /* mark the frame ready for transmission */ 900 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 901 902 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 903 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 904 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 905 906 DPRINTFN(15, ("encryption done idx=%u\n", 907 sc->txq.next_encrypt)); 908 909 sc->txq.next_encrypt = 910 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 911 } 912 913 /* kick Tx */ 914 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 915} 916 917void 918rt2560_tx_intr(struct rt2560_softc *sc) 919{ 920 struct ieee80211com *ic = &sc->sc_ic; 921 struct ifnet *ifp = &ic->ic_if; 922 923 for (;;) { 924 struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next]; 925 struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next]; 926 struct rt2560_node *rn; 927 928 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 929 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 930 BUS_DMASYNC_POSTREAD); 931 932 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 933 (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) || 934 !(letoh32(desc->flags) & RT2560_TX_VALID)) 935 break; 936 937 rn = (struct rt2560_node *)data->ni; 938 939 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 940 case RT2560_TX_SUCCESS: 941 DPRINTFN(10, ("data frame sent successfully\n")); 942 rn->amn.amn_txcnt++; 943 break; 944 945 case RT2560_TX_SUCCESS_RETRY: 946 DPRINTFN(9, ("data frame sent after %u retries\n", 947 (letoh32(desc->flags) >> 5) & 0x7)); 948 rn->amn.amn_txcnt++; 949 rn->amn.amn_retrycnt++; 950 break; 951 952 case RT2560_TX_FAIL_RETRY: 953 DPRINTFN(9, ("sending data frame failed (too much " 954 "retries)\n")); 955 rn->amn.amn_txcnt++; 956 rn->amn.amn_retrycnt++; 957 ifp->if_oerrors++; 958 break; 959 960 case RT2560_TX_FAIL_INVALID: 961 case RT2560_TX_FAIL_OTHER: 962 default: 963 DPRINTF(("%s: sending data frame failed 0x%08x\n", 964 sc->sc_dev.dv_xname, letoh32(desc->flags))); 965 ifp->if_oerrors++; 966 break; 967 } 968 969 /* descriptor is no longer valid */ 970 desc->flags &= ~htole32(RT2560_TX_VALID); 971 972 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 973 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 974 BUS_DMASYNC_PREWRITE); 975 976 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 977 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 978 bus_dmamap_unload(sc->sc_dmat, data->map); 979 m_freem(data->m); 980 data->m = NULL; 981 ieee80211_release_node(ic, data->ni); 982 data->ni = NULL; 983 984 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 985 986 sc->txq.queued--; 987 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 988 } 989 990 if (sc->txq.queued == 0 && sc->prioq.queued == 0) 991 sc->sc_tx_timer = 0; 992 if (sc->txq.queued < RT2560_TX_RING_COUNT - 1) { 993 sc->sc_flags &= ~RT2560_DATA_OACTIVE; 994 if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE))) 995 ifq_clr_oactive(&ifp->if_snd); 996 rt2560_start(ifp); 997 } 998} 999 1000void 1001rt2560_prio_intr(struct rt2560_softc *sc) 1002{ 1003 struct ieee80211com *ic = &sc->sc_ic; 1004 struct ifnet *ifp = &ic->ic_if; 1005 1006 for (;;) { 1007 struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next]; 1008 struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next]; 1009 1010 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1011 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1012 BUS_DMASYNC_POSTREAD); 1013 1014 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1015 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1016 break; 1017 1018 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1019 case RT2560_TX_SUCCESS: 1020 DPRINTFN(10, ("mgt frame sent successfully\n")); 1021 break; 1022 1023 case RT2560_TX_SUCCESS_RETRY: 1024 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1025 (letoh32(desc->flags) >> 5) & 0x7)); 1026 break; 1027 1028 case RT2560_TX_FAIL_RETRY: 1029 DPRINTFN(9, ("sending mgt frame failed (too much " 1030 "retries)\n")); 1031 break; 1032 1033 case RT2560_TX_FAIL_INVALID: 1034 case RT2560_TX_FAIL_OTHER: 1035 default: 1036 DPRINTF(("%s: sending mgt frame failed 0x%08x\n", 1037 sc->sc_dev.dv_xname, letoh32(desc->flags))); 1038 break; 1039 } 1040 1041 /* descriptor is no longer valid */ 1042 desc->flags &= ~htole32(RT2560_TX_VALID); 1043 1044 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1045 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1046 BUS_DMASYNC_PREWRITE); 1047 1048 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1049 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1050 bus_dmamap_unload(sc->sc_dmat, data->map); 1051 m_freem(data->m); 1052 data->m = NULL; 1053 ieee80211_release_node(ic, data->ni); 1054 data->ni = NULL; 1055 1056 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1057 1058 sc->prioq.queued--; 1059 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1060 } 1061 1062 if (sc->txq.queued == 0 && sc->prioq.queued == 0) 1063 sc->sc_tx_timer = 0; 1064 if (sc->prioq.queued < RT2560_PRIO_RING_COUNT) { 1065 sc->sc_flags &= ~RT2560_PRIO_OACTIVE; 1066 if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE))) 1067 ifq_clr_oactive(&ifp->if_snd); 1068 rt2560_start(ifp); 1069 } 1070} 1071 1072/* 1073 * Some frames were processed by the hardware cipher engine and are ready for 1074 * transmission to the IEEE802.11 layer. 1075 */ 1076void 1077rt2560_decryption_intr(struct rt2560_softc *sc) 1078{ 1079 struct ieee80211com *ic = &sc->sc_ic; 1080 struct ifnet *ifp = &ic->ic_if; 1081 struct ieee80211_frame *wh; 1082 struct ieee80211_rxinfo rxi; 1083 struct ieee80211_node *ni; 1084 struct mbuf *mnew, *m; 1085 int hw, error; 1086 1087 /* retrieve last decriptor index processed by cipher engine */ 1088 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1089 RT2560_RX_DESC_SIZE; 1090 1091 for (; sc->rxq.cur_decrypt != hw;) { 1092 struct rt2560_rx_desc *desc = 1093 &sc->rxq.desc[sc->rxq.cur_decrypt]; 1094 struct rt2560_rx_data *data = 1095 &sc->rxq.data[sc->rxq.cur_decrypt]; 1096 1097 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1098 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1099 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1100 1101 if (letoh32(desc->flags) & 1102 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1103 break; 1104 1105 if (data->drop) { 1106 ifp->if_ierrors++; 1107 goto skip; 1108 } 1109 1110 if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1111 (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) { 1112 ifp->if_ierrors++; 1113 goto skip; 1114 } 1115 1116 /* 1117 * Try to allocate a new mbuf for this ring element and load it 1118 * before processing the current mbuf. If the ring element 1119 * cannot be loaded, drop the received packet and reuse the old 1120 * mbuf. In the unlikely case that the old mbuf can't be 1121 * reloaded either, explicitly panic. 1122 */ 1123 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1124 if (mnew == NULL) { 1125 ifp->if_ierrors++; 1126 goto skip; 1127 } 1128 MCLGET(mnew, M_DONTWAIT); 1129 if (!(mnew->m_flags & M_EXT)) { 1130 m_freem(mnew); 1131 ifp->if_ierrors++; 1132 goto skip; 1133 } 1134 1135 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1136 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1137 bus_dmamap_unload(sc->sc_dmat, data->map); 1138 1139 error = bus_dmamap_load(sc->sc_dmat, data->map, 1140 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1141 if (error != 0) { 1142 m_freem(mnew); 1143 1144 /* try to reload the old mbuf */ 1145 error = bus_dmamap_load(sc->sc_dmat, data->map, 1146 mtod(data->m, void *), MCLBYTES, NULL, 1147 BUS_DMA_NOWAIT); 1148 if (error != 0) { 1149 /* very unlikely that it will fail... */ 1150 panic("%s: could not load old rx mbuf", 1151 sc->sc_dev.dv_xname); 1152 } 1153 /* physical address may have changed */ 1154 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1155 ifp->if_ierrors++; 1156 goto skip; 1157 } 1158 1159 /* 1160 * New mbuf successfully loaded, update Rx ring and continue 1161 * processing. 1162 */ 1163 m = data->m; 1164 data->m = mnew; 1165 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1166 1167 /* finalize mbuf */ 1168 m->m_pkthdr.len = m->m_len = 1169 (letoh32(desc->flags) >> 16) & 0xfff; 1170 1171#if NBPFILTER > 0 1172 if (sc->sc_drvbpf != NULL) { 1173 struct mbuf mb; 1174 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1175 uint32_t tsf_lo, tsf_hi; 1176 1177 /* get timestamp (low and high 32 bits) */ 1178 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1179 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1180 1181 tap->wr_tsf = 1182 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1183 tap->wr_flags = 0; 1184 tap->wr_rate = rt2560_rxrate(desc); 1185 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1186 tap->wr_chan_flags = 1187 htole16(ic->ic_ibss_chan->ic_flags); 1188 tap->wr_antenna = sc->rx_ant; 1189 tap->wr_antsignal = desc->rssi; 1190 1191 mb.m_data = (caddr_t)tap; 1192 mb.m_len = sc->sc_txtap_len; 1193 mb.m_next = m; 1194 mb.m_nextpkt = NULL; 1195 mb.m_type = 0; 1196 mb.m_flags = 0; 1197 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1198 } 1199#endif 1200 wh = mtod(m, struct ieee80211_frame *); 1201 ni = ieee80211_find_rxnode(ic, wh); 1202 1203 /* send the frame to the 802.11 layer */ 1204 rxi.rxi_flags = 0; 1205 rxi.rxi_rssi = desc->rssi; 1206 rxi.rxi_tstamp = 0; /* unused */ 1207 ieee80211_input(ifp, m, ni, &rxi); 1208 1209 /* node is no longer needed */ 1210 ieee80211_release_node(ic, ni); 1211 1212skip: desc->flags = htole32(RT2560_RX_BUSY); 1213 1214 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1215 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1216 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1217 1218 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1219 1220 sc->rxq.cur_decrypt = 1221 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1222 } 1223} 1224 1225/* 1226 * Some frames were received. Pass them to the hardware cipher engine before 1227 * sending them to the 802.11 layer. 1228 */ 1229void 1230rt2560_rx_intr(struct rt2560_softc *sc) 1231{ 1232 for (;;) { 1233 struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur]; 1234 struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 1235 1236 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1237 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1238 BUS_DMASYNC_POSTREAD); 1239 1240 if (letoh32(desc->flags) & 1241 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1242 break; 1243 1244 data->drop = 0; 1245 1246 if (letoh32(desc->flags) & 1247 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1248 /* 1249 * This should not happen since we did not request 1250 * to receive those frames when we filled RXCSR0. 1251 */ 1252 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1253 letoh32(desc->flags))); 1254 data->drop = 1; 1255 } 1256 1257 if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1258 DPRINTFN(5, ("bad length\n")); 1259 data->drop = 1; 1260 } 1261 1262 /* mark the frame for decryption */ 1263 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1264 1265 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1266 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1267 BUS_DMASYNC_PREWRITE); 1268 1269 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1270 1271 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1272 } 1273 1274 /* kick decrypt */ 1275 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1276} 1277 1278#ifndef IEEE80211_STA_ONLY 1279/* 1280 * This function is called in HostAP or IBSS modes when it's time to send a 1281 * new beacon (every ni_intval milliseconds). 1282 */ 1283void 1284rt2560_beacon_expire(struct rt2560_softc *sc) 1285{ 1286 struct ieee80211com *ic = &sc->sc_ic; 1287 struct rt2560_tx_data *data; 1288 1289 if (ic->ic_opmode != IEEE80211_M_IBSS && 1290 ic->ic_opmode != IEEE80211_M_HOSTAP) 1291 return; 1292 1293 data = &sc->bcnq.data[sc->bcnq.next]; 1294 1295 if (sc->sc_flags & RT2560_UPDATE_SLOT) { 1296 sc->sc_flags &= ~RT2560_UPDATE_SLOT; 1297 sc->sc_flags |= RT2560_SET_SLOTTIME; 1298 } else if (sc->sc_flags & RT2560_SET_SLOTTIME) { 1299 sc->sc_flags &= ~RT2560_SET_SLOTTIME; 1300 rt2560_set_slottime(sc); 1301 } 1302 1303 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1304 /* update ERP Information Element */ 1305 *sc->erp = ic->ic_bss->ni_erp; 1306 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1307 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1308 } 1309 1310#if defined(RT2560_DEBUG) && NBPFILTER > 0 1311 if (ic->ic_rawbpf != NULL) 1312 bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT); 1313#endif 1314 1315 DPRINTFN(15, ("beacon expired\n")); 1316} 1317#endif 1318 1319void 1320rt2560_wakeup_expire(struct rt2560_softc *sc) 1321{ 1322 DPRINTFN(15, ("wakeup expired\n")); 1323} 1324 1325int 1326rt2560_intr(void *arg) 1327{ 1328 struct rt2560_softc *sc = arg; 1329 struct ifnet *ifp = &sc->sc_ic.ic_if; 1330 uint32_t r; 1331 1332 r = RAL_READ(sc, RT2560_CSR7); 1333 if (__predict_false(r == 0xffffffff)) 1334 return 0; /* device likely went away */ 1335 if (r == 0) 1336 return 0; /* not for us */ 1337 1338 /* disable interrupts */ 1339 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1340 1341 /* acknowledge interrupts */ 1342 RAL_WRITE(sc, RT2560_CSR7, r); 1343 1344 /* don't re-enable interrupts if we're shutting down */ 1345 if (!(ifp->if_flags & IFF_RUNNING)) 1346 return 0; 1347 1348#ifndef IEEE80211_STA_ONLY 1349 if (r & RT2560_BEACON_EXPIRE) 1350 rt2560_beacon_expire(sc); 1351#endif 1352 1353 if (r & RT2560_WAKEUP_EXPIRE) 1354 rt2560_wakeup_expire(sc); 1355 1356 if (r & RT2560_ENCRYPTION_DONE) 1357 rt2560_encryption_intr(sc); 1358 1359 if (r & RT2560_TX_DONE) 1360 rt2560_tx_intr(sc); 1361 1362 if (r & RT2560_PRIO_DONE) 1363 rt2560_prio_intr(sc); 1364 1365 if (r & RT2560_DECRYPTION_DONE) 1366 rt2560_decryption_intr(sc); 1367 1368 if (r & RT2560_RX_DONE) 1369 rt2560_rx_intr(sc); 1370 1371 /* re-enable interrupts */ 1372 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1373 1374 return 1; 1375} 1376 1377/* quickly determine if a given rate is CCK or OFDM */ 1378#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1379 1380#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1381#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1382 1383#define RAL_SIFS 10 /* us */ 1384 1385#define RT2560_RXTX_TURNAROUND 10 /* us */ 1386 1387/* 1388 * This function is only used by the Rx radiotap code. It returns the rate at 1389 * which a given frame was received. 1390 */ 1391#if NBPFILTER > 0 1392uint8_t 1393rt2560_rxrate(const struct rt2560_rx_desc *desc) 1394{ 1395 if (letoh32(desc->flags) & RT2560_RX_OFDM) { 1396 /* reverse function of rt2560_plcp_signal */ 1397 switch (desc->rate) { 1398 case 0xb: return 12; 1399 case 0xf: return 18; 1400 case 0xa: return 24; 1401 case 0xe: return 36; 1402 case 0x9: return 48; 1403 case 0xd: return 72; 1404 case 0x8: return 96; 1405 case 0xc: return 108; 1406 } 1407 } else { 1408 if (desc->rate == 10) 1409 return 2; 1410 if (desc->rate == 20) 1411 return 4; 1412 if (desc->rate == 55) 1413 return 11; 1414 if (desc->rate == 110) 1415 return 22; 1416 } 1417 return 2; /* should not get there */ 1418} 1419#endif 1420 1421/* 1422 * Return the expected ack rate for a frame transmitted at rate `rate'. 1423 */ 1424int 1425rt2560_ack_rate(struct ieee80211com *ic, int rate) 1426{ 1427 switch (rate) { 1428 /* CCK rates */ 1429 case 2: 1430 return 2; 1431 case 4: 1432 case 11: 1433 case 22: 1434 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1435 1436 /* OFDM rates */ 1437 case 12: 1438 case 18: 1439 return 12; 1440 case 24: 1441 case 36: 1442 return 24; 1443 case 48: 1444 case 72: 1445 case 96: 1446 case 108: 1447 return 48; 1448 } 1449 1450 /* default to 1Mbps */ 1451 return 2; 1452} 1453 1454/* 1455 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1456 * The function automatically determines the operating mode depending on the 1457 * given rate. `flags' indicates whether short preamble is in use or not. 1458 */ 1459uint16_t 1460rt2560_txtime(int len, int rate, uint32_t flags) 1461{ 1462 uint16_t txtime; 1463 1464 if (RAL_RATE_IS_OFDM(rate)) { 1465 /* IEEE Std 802.11g-2003, pp. 44 */ 1466 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1467 txtime = 16 + 4 + 4 * txtime + 6; 1468 } else { 1469 /* IEEE Std 802.11b-1999, pp. 28 */ 1470 txtime = (16 * len + rate - 1) / rate; 1471 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1472 txtime += 72 + 24; 1473 else 1474 txtime += 144 + 48; 1475 } 1476 return txtime; 1477} 1478 1479uint8_t 1480rt2560_plcp_signal(int rate) 1481{ 1482 switch (rate) { 1483 /* CCK rates (returned values are device-dependent) */ 1484 case 2: return 0x0; 1485 case 4: return 0x1; 1486 case 11: return 0x2; 1487 case 22: return 0x3; 1488 1489 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1490 case 12: return 0xb; 1491 case 18: return 0xf; 1492 case 24: return 0xa; 1493 case 36: return 0xe; 1494 case 48: return 0x9; 1495 case 72: return 0xd; 1496 case 96: return 0x8; 1497 case 108: return 0xc; 1498 1499 /* unsupported rates (should not get there) */ 1500 default: return 0xff; 1501 } 1502} 1503 1504void 1505rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1506 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1507{ 1508 struct ieee80211com *ic = &sc->sc_ic; 1509 uint16_t plcp_length; 1510 int remainder; 1511 1512 desc->flags = htole32(flags); 1513 desc->flags |= htole32(len << 16); 1514 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1515 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1516 1517 desc->physaddr = htole32(physaddr); 1518 desc->wme = htole16( 1519 RT2560_AIFSN(2) | 1520 RT2560_LOGCWMIN(3) | 1521 RT2560_LOGCWMAX(8)); 1522 1523 /* setup PLCP fields */ 1524 desc->plcp_signal = rt2560_plcp_signal(rate); 1525 desc->plcp_service = 4; 1526 1527 len += IEEE80211_CRC_LEN; 1528 if (RAL_RATE_IS_OFDM(rate)) { 1529 desc->flags |= htole32(RT2560_TX_OFDM); 1530 1531 plcp_length = len & 0xfff; 1532 desc->plcp_length_hi = plcp_length >> 6; 1533 desc->plcp_length_lo = plcp_length & 0x3f; 1534 } else { 1535 plcp_length = (16 * len + rate - 1) / rate; 1536 if (rate == 22) { 1537 remainder = (16 * len) % 22; 1538 if (remainder != 0 && remainder < 7) 1539 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1540 } 1541 desc->plcp_length_hi = plcp_length >> 8; 1542 desc->plcp_length_lo = plcp_length & 0xff; 1543 1544 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1545 desc->plcp_signal |= 0x08; 1546 } 1547} 1548 1549#ifndef IEEE80211_STA_ONLY 1550int 1551rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1552 struct ieee80211_node *ni) 1553{ 1554 struct ieee80211com *ic = &sc->sc_ic; 1555 struct rt2560_tx_desc *desc; 1556 struct rt2560_tx_data *data; 1557 int rate = 2, error; 1558 1559 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1560 data = &sc->bcnq.data[sc->bcnq.cur]; 1561 1562 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1563 BUS_DMA_NOWAIT); 1564 if (error != 0) { 1565 printf("%s: can't map mbuf (error %d)\n", 1566 sc->sc_dev.dv_xname, error); 1567 m_freem(m0); 1568 return error; 1569 } 1570 1571 data->m = m0; 1572 data->ni = ni; 1573 1574 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1575 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1576 data->map->dm_segs->ds_addr); 1577 1578 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1579 BUS_DMASYNC_PREWRITE); 1580 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1581 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1582 BUS_DMASYNC_PREWRITE); 1583 1584 /* 1585 * Store pointer to ERP Information Element so that we can update it 1586 * dynamically when the slot time changes. 1587 * XXX: this is ugly since it depends on how net80211 builds beacon 1588 * frames but ieee80211_beacon_alloc() don't store offsets for us. 1589 */ 1590 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1591 sc->erp = 1592 mtod(m0, uint8_t *) + 1593 sizeof (struct ieee80211_frame) + 1594 8 + 2 + 2 + 1595 ((ic->ic_flags & IEEE80211_F_HIDENWID) ? 1596 1 : 2 + ni->ni_esslen) + 1597 2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) + 1598 2 + 1 + 1599 ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) + 1600 2; 1601 } 1602 1603 return 0; 1604} 1605#endif 1606 1607int 1608rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1609 struct ieee80211_node *ni) 1610{ 1611 struct ieee80211com *ic = &sc->sc_ic; 1612 struct rt2560_tx_desc *desc; 1613 struct rt2560_tx_data *data; 1614 struct ieee80211_frame *wh; 1615 uint16_t dur; 1616 uint32_t flags = 0; 1617 int rate = 2, error; 1618 1619 desc = &sc->prioq.desc[sc->prioq.cur]; 1620 data = &sc->prioq.data[sc->prioq.cur]; 1621 1622 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1623 BUS_DMA_NOWAIT); 1624 if (error != 0) { 1625 printf("%s: can't map mbuf (error %d)\n", 1626 sc->sc_dev.dv_xname, error); 1627 m_freem(m0); 1628 return error; 1629 } 1630 1631#if NBPFILTER > 0 1632 if (sc->sc_drvbpf != NULL) { 1633 struct mbuf mb; 1634 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1635 1636 tap->wt_flags = 0; 1637 tap->wt_rate = rate; 1638 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1639 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1640 tap->wt_antenna = sc->tx_ant; 1641 1642 mb.m_data = (caddr_t)tap; 1643 mb.m_len = sc->sc_txtap_len; 1644 mb.m_next = m0; 1645 mb.m_nextpkt = NULL; 1646 mb.m_type = 0; 1647 mb.m_flags = 0; 1648 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1649 } 1650#endif 1651 1652 data->m = m0; 1653 data->ni = ni; 1654 1655 wh = mtod(m0, struct ieee80211_frame *); 1656 1657 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1658 flags |= RT2560_TX_NEED_ACK; 1659 1660 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1661 RAL_SIFS; 1662 *(uint16_t *)wh->i_dur = htole16(dur); 1663 1664#ifndef IEEE80211_STA_ONLY 1665 /* tell hardware to set timestamp for probe responses */ 1666 if ((wh->i_fc[0] & 1667 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1668 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1669 flags |= RT2560_TX_TIMESTAMP; 1670#endif 1671 } 1672 1673 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1674 data->map->dm_segs->ds_addr); 1675 1676 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1677 BUS_DMASYNC_PREWRITE); 1678 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1679 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1680 BUS_DMASYNC_PREWRITE); 1681 1682 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1683 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1684 1685 /* kick prio */ 1686 sc->prioq.queued++; 1687 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1688 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1689 1690 return 0; 1691} 1692 1693int 1694rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1695 struct ieee80211_node *ni) 1696{ 1697 struct ieee80211com *ic = &sc->sc_ic; 1698 struct rt2560_tx_ring *txq = &sc->txq; 1699 struct rt2560_tx_desc *desc; 1700 struct rt2560_tx_data *data; 1701 struct ieee80211_frame *wh; 1702 struct ieee80211_key *k; 1703 struct mbuf *m1; 1704 uint16_t dur; 1705 uint32_t flags = 0; 1706 int pktlen, rate, needcts = 0, needrts = 0, error; 1707 1708 wh = mtod(m0, struct ieee80211_frame *); 1709 1710 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1711 k = ieee80211_get_txkey(ic, wh, ni); 1712 1713 if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL) 1714 return ENOBUFS; 1715 1716 /* packet header may have moved, reset our local pointer */ 1717 wh = mtod(m0, struct ieee80211_frame *); 1718 } 1719 1720 /* compute actual packet length (including CRC and crypto overhead) */ 1721 pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN; 1722 1723 /* pickup a rate */ 1724 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 1725 ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1726 IEEE80211_FC0_TYPE_MGT)) { 1727 /* mgmt/multicast frames are sent at the lowest avail. rate */ 1728 rate = ni->ni_rates.rs_rates[0]; 1729 } else if (ic->ic_fixed_rate != -1) { 1730 rate = ic->ic_sup_rates[ic->ic_curmode]. 1731 rs_rates[ic->ic_fixed_rate]; 1732 } else 1733 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1734 if (rate == 0) 1735 rate = 2; /* XXX should not happen */ 1736 rate &= IEEE80211_RATE_VAL; 1737 1738 /* 1739 * Packet Bursting: backoff after ppb=8 frames to give other STAs a 1740 * chance to contend for the wireless medium. 1741 */ 1742 if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7)) 1743 flags |= RT2560_TX_IFS_SIFS; 1744 1745 /* check if RTS/CTS or CTS-to-self protection must be used */ 1746 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1747 /* multicast frames are not sent at OFDM rates in 802.11b/g */ 1748 if (pktlen > ic->ic_rtsthreshold) { 1749 needrts = 1; /* RTS/CTS based on frame length */ 1750 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1751 RAL_RATE_IS_OFDM(rate)) { 1752 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) 1753 needcts = 1; /* CTS-to-self */ 1754 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) 1755 needrts = 1; /* RTS/CTS */ 1756 } 1757 } 1758 if (needrts || needcts) { 1759 struct mbuf *mprot; 1760 int protrate, ackrate; 1761 1762 protrate = 2; /* XXX */ 1763 ackrate = rt2560_ack_rate(ic, rate); 1764 1765 dur = rt2560_txtime(pktlen, rate, ic->ic_flags) + 1766 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1767 2 * RAL_SIFS; 1768 if (needrts) { 1769 dur += rt2560_txtime(RAL_CTS_SIZE, rt2560_ack_rate(ic, 1770 protrate), ic->ic_flags) + RAL_SIFS; 1771 mprot = ieee80211_get_rts(ic, wh, dur); 1772 } else { 1773 mprot = ieee80211_get_cts_to_self(ic, dur); 1774 } 1775 if (mprot == NULL) { 1776 printf("%s: could not allocate protection frame\n", 1777 sc->sc_dev.dv_xname); 1778 m_freem(m0); 1779 return ENOBUFS; 1780 } 1781 1782 desc = &txq->desc[txq->cur_encrypt]; 1783 data = &txq->data[txq->cur_encrypt]; 1784 1785 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot, 1786 BUS_DMA_NOWAIT); 1787 if (error != 0) { 1788 printf("%s: can't map mbuf (error %d)\n", 1789 sc->sc_dev.dv_xname, error); 1790 m_freem(mprot); 1791 m_freem(m0); 1792 return error; 1793 } 1794 1795 data->m = mprot; 1796 /* avoid multiple free() of the same node for each fragment */ 1797 data->ni = ieee80211_ref_node(ni); 1798 1799 /* XXX may want to pass the protection frame to BPF */ 1800 1801 rt2560_setup_tx_desc(sc, desc, 1802 (needrts ? RT2560_TX_NEED_ACK : 0) | RT2560_TX_MORE_FRAG, 1803 mprot->m_pkthdr.len, protrate, 1, 1804 data->map->dm_segs->ds_addr); 1805 1806 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1807 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1808 bus_dmamap_sync(sc->sc_dmat, txq->map, 1809 txq->cur_encrypt * RT2560_TX_DESC_SIZE, 1810 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1811 1812 txq->queued++; 1813 if (++txq->cur_encrypt >= txq->count) 1814 txq->cur_encrypt = 0; 1815 1816 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1817 } 1818 1819 data = &txq->data[txq->cur_encrypt]; 1820 desc = &txq->desc[txq->cur_encrypt]; 1821 1822 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1823 BUS_DMA_NOWAIT); 1824 if (error != 0 && error != EFBIG) { 1825 printf("%s: can't map mbuf (error %d)\n", 1826 sc->sc_dev.dv_xname, error); 1827 m_freem(m0); 1828 return error; 1829 } 1830 if (error != 0) { 1831 /* too many fragments, linearize */ 1832 MGETHDR(m1, M_DONTWAIT, MT_DATA); 1833 if (m1 == NULL) { 1834 m_freem(m0); 1835 return ENOBUFS; 1836 } 1837 if (m0->m_pkthdr.len > MHLEN) { 1838 MCLGET(m1, M_DONTWAIT); 1839 if (!(m1->m_flags & M_EXT)) { 1840 m_freem(m0); 1841 m_freem(m1); 1842 return ENOBUFS; 1843 } 1844 } 1845 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m1, caddr_t)); 1846 m1->m_pkthdr.len = m1->m_len = m0->m_pkthdr.len; 1847 m_freem(m0); 1848 m0 = m1; 1849 1850 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1851 BUS_DMA_NOWAIT); 1852 if (error != 0) { 1853 printf("%s: can't map mbuf (error %d)\n", 1854 sc->sc_dev.dv_xname, error); 1855 m_freem(m0); 1856 return error; 1857 } 1858 1859 /* packet header have moved, reset our local pointer */ 1860 wh = mtod(m0, struct ieee80211_frame *); 1861 } 1862 1863#if NBPFILTER > 0 1864 if (sc->sc_drvbpf != NULL) { 1865 struct mbuf mb; 1866 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1867 1868 tap->wt_flags = 0; 1869 tap->wt_rate = rate; 1870 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1871 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1872 tap->wt_antenna = sc->tx_ant; 1873 1874 mb.m_data = (caddr_t)tap; 1875 mb.m_len = sc->sc_txtap_len; 1876 mb.m_next = m0; 1877 mb.m_nextpkt = NULL; 1878 mb.m_type = 0; 1879 mb.m_flags = 0; 1880 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1881 } 1882#endif 1883 1884 data->m = m0; 1885 data->ni = ni; 1886 1887 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1888 flags |= RT2560_TX_NEED_ACK; 1889 1890 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 1891 ic->ic_flags) + RAL_SIFS; 1892 *(uint16_t *)wh->i_dur = htole16(dur); 1893 } 1894 1895 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1896 data->map->dm_segs->ds_addr); 1897 1898 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1899 BUS_DMASYNC_PREWRITE); 1900 bus_dmamap_sync(sc->sc_dmat, txq->map, 1901 txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1902 BUS_DMASYNC_PREWRITE); 1903 1904 DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n", 1905 m0->m_pkthdr.len, txq->cur_encrypt, rate)); 1906 1907 /* kick encrypt */ 1908 txq->queued++; 1909 if (++txq->cur_encrypt >= txq->count) 1910 txq->cur_encrypt = 0; 1911 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1912 1913 return 0; 1914} 1915 1916void 1917rt2560_start(struct ifnet *ifp) 1918{ 1919 struct rt2560_softc *sc = ifp->if_softc; 1920 struct ieee80211com *ic = &sc->sc_ic; 1921 struct mbuf *m0; 1922 struct ieee80211_node *ni; 1923 1924 /* 1925 * net80211 may still try to send management frames even if the 1926 * IFF_RUNNING flag is not set... 1927 */ 1928 if (!(ifp->if_flags & IFF_RUNNING) || ifq_is_oactive(&ifp->if_snd)) 1929 return; 1930 1931 for (;;) { 1932 if (mq_len(&ic->ic_mgtq) > 0) { 1933 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 1934 ifq_set_oactive(&ifp->if_snd); 1935 sc->sc_flags |= RT2560_PRIO_OACTIVE; 1936 break; 1937 } 1938 1939 m0 = mq_dequeue(&ic->ic_mgtq); 1940 if (m0 == NULL) 1941 continue; 1942 ni = m0->m_pkthdr.ph_cookie; 1943#if NBPFILTER > 0 1944 if (ic->ic_rawbpf != NULL) 1945 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1946#endif 1947 if (rt2560_tx_mgt(sc, m0, ni) != 0) 1948 break; 1949 1950 } else { 1951 /* Because RTS/CTS requires an extra frame we need 1952 * space for 2 frames on the regular Tx queue. */ 1953 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 1954 ifq_set_oactive(&ifp->if_snd); 1955 sc->sc_flags |= RT2560_DATA_OACTIVE; 1956 break; 1957 } 1958 1959 if (ic->ic_state != IEEE80211_S_RUN) 1960 break; 1961 1962 IFQ_DEQUEUE(&ifp->if_snd, m0); 1963 if (m0 == NULL) 1964 break; 1965#if NBPFILTER > 0 1966 if (ifp->if_bpf != NULL) 1967 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1968#endif 1969 m0 = ieee80211_encap(ifp, m0, &ni); 1970 if (m0 == NULL) 1971 continue; 1972#if NBPFILTER > 0 1973 if (ic->ic_rawbpf != NULL) 1974 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1975#endif 1976 if (rt2560_tx_data(sc, m0, ni) != 0) { 1977 if (ni != NULL) 1978 ieee80211_release_node(ic, ni); 1979 ifp->if_oerrors++; 1980 break; 1981 } 1982 } 1983 1984 sc->sc_tx_timer = 5; 1985 ifp->if_timer = 1; 1986 } 1987} 1988 1989void 1990rt2560_watchdog(struct ifnet *ifp) 1991{ 1992 struct rt2560_softc *sc = ifp->if_softc; 1993 1994 ifp->if_timer = 0; 1995 1996 if (sc->sc_tx_timer > 0) { 1997 if (--sc->sc_tx_timer == 0) { 1998 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1999 rt2560_init(ifp); 2000 ifp->if_oerrors++; 2001 return; 2002 } 2003 ifp->if_timer = 1; 2004 } 2005 2006 ieee80211_watchdog(ifp); 2007} 2008 2009int 2010rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 2011{ 2012 struct rt2560_softc *sc = ifp->if_softc; 2013 struct ieee80211com *ic = &sc->sc_ic; 2014 struct ifreq *ifr; 2015 int s, error = 0; 2016 2017 s = splnet(); 2018 2019 switch (cmd) { 2020 case SIOCSIFADDR: 2021 ifp->if_flags |= IFF_UP; 2022 /* FALLTHROUGH */ 2023 case SIOCSIFFLAGS: 2024 if (ifp->if_flags & IFF_UP) { 2025 if (ifp->if_flags & IFF_RUNNING) 2026 rt2560_update_promisc(sc); 2027 else 2028 rt2560_init(ifp); 2029 } else { 2030 if (ifp->if_flags & IFF_RUNNING) 2031 rt2560_stop(ifp, 1); 2032 } 2033 break; 2034 2035 case SIOCADDMULTI: 2036 case SIOCDELMULTI: 2037 ifr = (struct ifreq *)data; 2038 error = (cmd == SIOCADDMULTI) ? 2039 ether_addmulti(ifr, &ic->ic_ac) : 2040 ether_delmulti(ifr, &ic->ic_ac); 2041 2042 if (error == ENETRESET) 2043 error = 0; 2044 break; 2045 2046 case SIOCS80211CHANNEL: 2047 /* 2048 * This allows for fast channel switching in monitor mode 2049 * (used by kismet). In IBSS mode, we must explicitly reset 2050 * the interface to generate a new beacon frame. 2051 */ 2052 error = ieee80211_ioctl(ifp, cmd, data); 2053 if (error == ENETRESET && 2054 ic->ic_opmode == IEEE80211_M_MONITOR) { 2055 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2056 (IFF_UP | IFF_RUNNING)) 2057 rt2560_set_chan(sc, ic->ic_ibss_chan); 2058 error = 0; 2059 } 2060 break; 2061 2062 default: 2063 error = ieee80211_ioctl(ifp, cmd, data); 2064 } 2065 2066 if (error == ENETRESET) { 2067 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2068 (IFF_UP | IFF_RUNNING)) 2069 rt2560_init(ifp); 2070 error = 0; 2071 } 2072 2073 splx(s); 2074 2075 return error; 2076} 2077 2078void 2079rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2080{ 2081 uint32_t tmp; 2082 int ntries; 2083 2084 for (ntries = 0; ntries < 100; ntries++) { 2085 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2086 break; 2087 DELAY(1); 2088 } 2089 if (ntries == 100) { 2090 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2091 return; 2092 } 2093 2094 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2095 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2096 2097 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2098} 2099 2100uint8_t 2101rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2102{ 2103 uint32_t val; 2104 int ntries; 2105 2106 for (ntries = 0; ntries < 100; ntries++) { 2107 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2108 break; 2109 DELAY(1); 2110 } 2111 if (ntries == 100) { 2112 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2113 return 0; 2114 } 2115 2116 val = RT2560_BBP_BUSY | reg << 8; 2117 RAL_WRITE(sc, RT2560_BBPCSR, val); 2118 2119 for (ntries = 0; ntries < 100; ntries++) { 2120 val = RAL_READ(sc, RT2560_BBPCSR); 2121 if (!(val & RT2560_BBP_BUSY)) 2122 return val & 0xff; 2123 DELAY(1); 2124 } 2125 2126 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2127 return 0; 2128} 2129 2130void 2131rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2132{ 2133 uint32_t tmp; 2134 int ntries; 2135 2136 for (ntries = 0; ntries < 100; ntries++) { 2137 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2138 break; 2139 DELAY(1); 2140 } 2141 if (ntries == 100) { 2142 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2143 return; 2144 } 2145 2146 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2147 (reg & 0x3); 2148 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2149 2150 /* remember last written value in sc */ 2151 sc->rf_regs[reg] = val; 2152 2153 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2154} 2155 2156void 2157rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2158{ 2159 struct ieee80211com *ic = &sc->sc_ic; 2160 uint8_t power, tmp; 2161 u_int chan; 2162 2163 chan = ieee80211_chan2ieee(ic, c); 2164 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2165 return; 2166 2167 power = min(sc->txpow[chan - 1], 31); 2168 2169 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2170 2171 switch (sc->rf_rev) { 2172 case RT2560_RF_2522: 2173 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2174 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2175 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2176 break; 2177 2178 case RT2560_RF_2523: 2179 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2180 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2181 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2182 rt2560_rf_write(sc, RT2560_RF4, 2183 (chan == 14) ? 0x00280 : 0x00286); 2184 break; 2185 2186 case RT2560_RF_2524: 2187 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2188 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2189 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2190 rt2560_rf_write(sc, RT2560_RF4, 2191 (chan == 14) ? 0x00280 : 0x00286); 2192 break; 2193 2194 case RT2560_RF_2525: 2195 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2196 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2197 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2198 rt2560_rf_write(sc, RT2560_RF4, 2199 (chan == 14) ? 0x00280 : 0x00286); 2200 2201 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2202 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2203 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2204 rt2560_rf_write(sc, RT2560_RF4, 2205 (chan == 14) ? 0x00280 : 0x00286); 2206 break; 2207 2208 case RT2560_RF_2525E: 2209 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2210 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2211 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2212 rt2560_rf_write(sc, RT2560_RF4, 2213 (chan == 14) ? 0x00286 : 0x00282); 2214 break; 2215 2216 case RT2560_RF_2526: 2217 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2218 rt2560_rf_write(sc, RT2560_RF4, 2219 (chan & 1) ? 0x00386 : 0x00381); 2220 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2221 2222 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2223 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2224 rt2560_rf_write(sc, RT2560_RF4, 2225 (chan & 1) ? 0x00386 : 0x00381); 2226 break; 2227 } 2228 2229 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2230 ic->ic_state != IEEE80211_S_SCAN) { 2231 /* set Japan filter bit for channel 14 */ 2232 tmp = rt2560_bbp_read(sc, 70); 2233 2234 tmp &= ~RT2560_JAPAN_FILTER; 2235 if (chan == 14) 2236 tmp |= RT2560_JAPAN_FILTER; 2237 2238 rt2560_bbp_write(sc, 70, tmp); 2239 2240 DELAY(1000); /* RF needs a 1ms delay here */ 2241 rt2560_disable_rf_tune(sc); 2242 2243 /* clear CRC errors */ 2244 RAL_READ(sc, RT2560_CNT0); 2245 } 2246} 2247 2248/* 2249 * Disable RF auto-tuning. 2250 */ 2251void 2252rt2560_disable_rf_tune(struct rt2560_softc *sc) 2253{ 2254 uint32_t tmp; 2255 2256 if (sc->rf_rev != RT2560_RF_2523) { 2257 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2258 rt2560_rf_write(sc, RT2560_RF1, tmp); 2259 } 2260 2261 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2262 rt2560_rf_write(sc, RT2560_RF3, tmp); 2263 2264 DPRINTFN(2, ("disabling RF autotune\n")); 2265} 2266 2267/* 2268 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2269 * synchronization. 2270 */ 2271void 2272rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2273{ 2274 struct ieee80211com *ic = &sc->sc_ic; 2275 uint16_t logcwmin, preload; 2276 uint32_t tmp; 2277 2278 /* first, disable TSF synchronization */ 2279 RAL_WRITE(sc, RT2560_CSR14, 0); 2280 2281 tmp = 16 * ic->ic_bss->ni_intval; 2282 RAL_WRITE(sc, RT2560_CSR12, tmp); 2283 2284 RAL_WRITE(sc, RT2560_CSR13, 0); 2285 2286 logcwmin = 5; 2287 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2288 tmp = logcwmin << 16 | preload; 2289 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2290 2291 /* finally, enable TSF synchronization */ 2292 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2293 if (ic->ic_opmode == IEEE80211_M_STA) 2294 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2295#ifndef IEEE80211_STA_ONLY 2296 else 2297 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2298 RT2560_ENABLE_BEACON_GENERATOR; 2299#endif 2300 RAL_WRITE(sc, RT2560_CSR14, tmp); 2301 2302 DPRINTF(("enabling TSF synchronization\n")); 2303} 2304 2305void 2306rt2560_update_plcp(struct rt2560_softc *sc) 2307{ 2308 struct ieee80211com *ic = &sc->sc_ic; 2309 2310 /* no short preamble for 1Mbps */ 2311 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2312 2313 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2314 /* values taken from the reference driver */ 2315 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2316 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2317 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2318 } else { 2319 /* same values as above or'ed 0x8 */ 2320 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2321 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2322 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2323 } 2324 2325 DPRINTF(("updating PLCP for %s preamble\n", 2326 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2327} 2328 2329void 2330rt2560_updateslot(struct ieee80211com *ic) 2331{ 2332 struct rt2560_softc *sc = ic->ic_if.if_softc; 2333 2334#ifndef IEEE80211_STA_ONLY 2335 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2336 /* 2337 * In HostAP mode, we defer setting of new slot time until 2338 * updated ERP Information Element has propagated to all 2339 * associated STAs. 2340 */ 2341 sc->sc_flags |= RT2560_UPDATE_SLOT; 2342 } else 2343#endif 2344 rt2560_set_slottime(sc); 2345} 2346 2347/* 2348 * IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to 2349 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2350 */ 2351void 2352rt2560_set_slottime(struct rt2560_softc *sc) 2353{ 2354 struct ieee80211com *ic = &sc->sc_ic; 2355 uint8_t slottime; 2356 uint16_t sifs, pifs, difs, eifs; 2357 uint32_t tmp; 2358 2359 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2360 2361 /* define the MAC slot boundaries */ 2362 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2363 pifs = sifs + slottime; 2364 difs = sifs + 2 * slottime; 2365 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2366 2367 tmp = RAL_READ(sc, RT2560_CSR11); 2368 tmp = (tmp & ~0x1f00) | slottime << 8; 2369 RAL_WRITE(sc, RT2560_CSR11, tmp); 2370 2371 tmp = pifs << 16 | sifs; 2372 RAL_WRITE(sc, RT2560_CSR18, tmp); 2373 2374 tmp = eifs << 16 | difs; 2375 RAL_WRITE(sc, RT2560_CSR19, tmp); 2376 2377 DPRINTF(("setting slottime to %uus\n", slottime)); 2378} 2379 2380void 2381rt2560_set_basicrates(struct rt2560_softc *sc) 2382{ 2383 struct ieee80211com *ic = &sc->sc_ic; 2384 2385 /* update basic rate set */ 2386 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2387 /* 11b basic rates: 1, 2Mbps */ 2388 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2389 } else { 2390 /* 11b/g basic rates: 1, 2, 5.5, 11Mbps */ 2391 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf); 2392 } 2393} 2394 2395void 2396rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2397{ 2398 uint32_t tmp; 2399 2400 /* set ON period to 70ms and OFF period to 30ms */ 2401 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2402 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2403} 2404 2405void 2406rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2407{ 2408 uint32_t tmp; 2409 2410 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2411 RAL_WRITE(sc, RT2560_CSR5, tmp); 2412 2413 tmp = bssid[4] | bssid[5] << 8; 2414 RAL_WRITE(sc, RT2560_CSR6, tmp); 2415 2416 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2417} 2418 2419void 2420rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2421{ 2422 uint32_t tmp; 2423 2424 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2425 RAL_WRITE(sc, RT2560_CSR3, tmp); 2426 2427 tmp = addr[4] | addr[5] << 8; 2428 RAL_WRITE(sc, RT2560_CSR4, tmp); 2429 2430 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2431} 2432 2433void 2434rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2435{ 2436 uint32_t tmp; 2437 2438 tmp = RAL_READ(sc, RT2560_CSR3); 2439 addr[0] = tmp & 0xff; 2440 addr[1] = (tmp >> 8) & 0xff; 2441 addr[2] = (tmp >> 16) & 0xff; 2442 addr[3] = (tmp >> 24); 2443 2444 tmp = RAL_READ(sc, RT2560_CSR4); 2445 addr[4] = tmp & 0xff; 2446 addr[5] = (tmp >> 8) & 0xff; 2447} 2448 2449void 2450rt2560_update_promisc(struct rt2560_softc *sc) 2451{ 2452 struct ifnet *ifp = &sc->sc_ic.ic_if; 2453 uint32_t tmp; 2454 2455 tmp = RAL_READ(sc, RT2560_RXCSR0); 2456 2457 tmp &= ~RT2560_DROP_NOT_TO_ME; 2458 if (!(ifp->if_flags & IFF_PROMISC)) 2459 tmp |= RT2560_DROP_NOT_TO_ME; 2460 2461 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2462 2463 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2464 "entering" : "leaving")); 2465} 2466 2467void 2468rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2469{ 2470 uint32_t tmp; 2471 uint8_t tx; 2472 2473 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2474 if (antenna == 1) 2475 tx |= RT2560_BBP_ANTA; 2476 else if (antenna == 2) 2477 tx |= RT2560_BBP_ANTB; 2478 else 2479 tx |= RT2560_BBP_DIVERSITY; 2480 2481 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2482 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2483 sc->rf_rev == RT2560_RF_5222) 2484 tx |= RT2560_BBP_FLIPIQ; 2485 2486 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2487 2488 /* update values for CCK and OFDM in BBPCSR1 */ 2489 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2490 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2491 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2492} 2493 2494void 2495rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2496{ 2497 uint8_t rx; 2498 2499 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2500 if (antenna == 1) 2501 rx |= RT2560_BBP_ANTA; 2502 else if (antenna == 2) 2503 rx |= RT2560_BBP_ANTB; 2504 else 2505 rx |= RT2560_BBP_DIVERSITY; 2506 2507 /* need to force no I/Q flip for RF 2525e and 2526 */ 2508 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2509 rx &= ~RT2560_BBP_FLIPIQ; 2510 2511 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2512} 2513 2514const char * 2515rt2560_get_rf(int rev) 2516{ 2517 switch (rev) { 2518 case RT2560_RF_2522: return "RT2522"; 2519 case RT2560_RF_2523: return "RT2523"; 2520 case RT2560_RF_2524: return "RT2524"; 2521 case RT2560_RF_2525: return "RT2525"; 2522 case RT2560_RF_2525E: return "RT2525e"; 2523 case RT2560_RF_2526: return "RT2526"; 2524 case RT2560_RF_5222: return "RT5222"; 2525 default: return "unknown"; 2526 } 2527} 2528 2529void 2530rt2560_read_eeprom(struct rt2560_softc *sc) 2531{ 2532 uint16_t val; 2533 int i; 2534 2535 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2536 sc->rf_rev = (val >> 11) & 0x1f; 2537 sc->hw_radio = (val >> 10) & 0x1; 2538 sc->led_mode = (val >> 6) & 0x7; 2539 sc->rx_ant = (val >> 4) & 0x3; 2540 sc->tx_ant = (val >> 2) & 0x3; 2541 sc->nb_ant = val & 0x3; 2542 2543 /* read default values for BBP registers */ 2544 for (i = 0; i < 16; i++) { 2545 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2546 sc->bbp_prom[i].reg = val >> 8; 2547 sc->bbp_prom[i].val = val & 0xff; 2548 } 2549 2550 /* read Tx power for all b/g channels */ 2551 for (i = 0; i < 14 / 2; i++) { 2552 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2553 sc->txpow[i * 2] = val >> 8; 2554 sc->txpow[i * 2 + 1] = val & 0xff; 2555 } 2556} 2557 2558int 2559rt2560_bbp_init(struct rt2560_softc *sc) 2560{ 2561 int i, ntries; 2562 2563 /* wait for BBP to be ready */ 2564 for (ntries = 0; ntries < 100; ntries++) { 2565 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2566 break; 2567 DELAY(1); 2568 } 2569 if (ntries == 100) { 2570 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2571 return EIO; 2572 } 2573 2574 /* initialize BBP registers to default values */ 2575 for (i = 0; i < nitems(rt2560_def_bbp); i++) { 2576 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2577 rt2560_def_bbp[i].val); 2578 } 2579#if 0 2580 /* initialize BBP registers to values stored in EEPROM */ 2581 for (i = 0; i < 16; i++) { 2582 if (sc->bbp_prom[i].reg == 0xff) 2583 continue; 2584 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2585 } 2586#endif 2587 2588 return 0; 2589} 2590 2591int 2592rt2560_init(struct ifnet *ifp) 2593{ 2594 struct rt2560_softc *sc = ifp->if_softc; 2595 struct ieee80211com *ic = &sc->sc_ic; 2596 uint32_t tmp; 2597 int i; 2598 2599 /* for CardBus, power on the socket */ 2600 if (!(sc->sc_flags & RT2560_ENABLED)) { 2601 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2602 printf("%s: could not enable device\n", 2603 sc->sc_dev.dv_xname); 2604 return EIO; 2605 } 2606 sc->sc_flags |= RT2560_ENABLED; 2607 } 2608 2609 rt2560_stop(ifp, 0); 2610 2611 /* setup tx rings */ 2612 tmp = RT2560_PRIO_RING_COUNT << 24 | 2613 RT2560_ATIM_RING_COUNT << 16 | 2614 RT2560_TX_RING_COUNT << 8 | 2615 RT2560_TX_DESC_SIZE; 2616 2617 /* rings _must_ be initialized in this _exact_ order! */ 2618 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2619 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2620 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2621 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2622 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2623 2624 /* setup rx ring */ 2625 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2626 2627 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2628 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2629 2630 /* initialize MAC registers to default values */ 2631 for (i = 0; i < nitems(rt2560_def_mac); i++) 2632 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2633 2634 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2635 rt2560_set_macaddr(sc, ic->ic_myaddr); 2636 2637 /* set basic rate set (will be updated later) */ 2638 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2639 2640 rt2560_set_slottime(sc); 2641 rt2560_update_plcp(sc); 2642 rt2560_update_led(sc, 0, 0); 2643 2644 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2645 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2646 2647 if (rt2560_bbp_init(sc) != 0) { 2648 rt2560_stop(ifp, 1); 2649 return EIO; 2650 } 2651 2652 rt2560_set_txantenna(sc, 1); 2653 rt2560_set_rxantenna(sc, 1); 2654 2655 /* set default BSS channel */ 2656 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2657 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2658 2659 /* kick Rx */ 2660 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2661 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2662 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2663#ifndef IEEE80211_STA_ONLY 2664 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2665#endif 2666 tmp |= RT2560_DROP_TODS; 2667 if (!(ifp->if_flags & IFF_PROMISC)) 2668 tmp |= RT2560_DROP_NOT_TO_ME; 2669 } 2670 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2671 2672 /* clear old FCS and Rx FIFO errors */ 2673 RAL_READ(sc, RT2560_CNT0); 2674 RAL_READ(sc, RT2560_CNT4); 2675 2676 /* clear any pending interrupts */ 2677 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2678 2679 /* enable interrupts */ 2680 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2681 2682 ifp->if_flags |= IFF_RUNNING; 2683 ifq_clr_oactive(&ifp->if_snd); 2684 2685 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2686 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2687 else 2688 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2689 2690 return 0; 2691} 2692 2693void 2694rt2560_stop(struct ifnet *ifp, int disable) 2695{ 2696 struct rt2560_softc *sc = ifp->if_softc; 2697 struct ieee80211com *ic = &sc->sc_ic; 2698 2699 sc->sc_tx_timer = 0; 2700 sc->sc_flags &= ~(RT2560_PRIO_OACTIVE|RT2560_DATA_OACTIVE); 2701 ifp->if_timer = 0; 2702 ifp->if_flags &= ~IFF_RUNNING; 2703 ifq_clr_oactive(&ifp->if_snd); 2704 2705 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2706 2707 /* abort Tx */ 2708 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2709 2710 /* disable Rx */ 2711 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2712 2713 /* reset ASIC (and thus, BBP) */ 2714 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2715 RAL_WRITE(sc, RT2560_CSR1, 0); 2716 2717 /* disable interrupts */ 2718 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2719 2720 /* clear any pending interrupt */ 2721 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2722 2723 /* reset Tx and Rx rings */ 2724 rt2560_reset_tx_ring(sc, &sc->txq); 2725 rt2560_reset_tx_ring(sc, &sc->atimq); 2726 rt2560_reset_tx_ring(sc, &sc->prioq); 2727 rt2560_reset_tx_ring(sc, &sc->bcnq); 2728 rt2560_reset_rx_ring(sc, &sc->rxq); 2729 2730 /* for CardBus, power down the socket */ 2731 if (disable && sc->sc_disable != NULL) { 2732 if (sc->sc_flags & RT2560_ENABLED) { 2733 (*sc->sc_disable)(sc); 2734 sc->sc_flags &= ~RT2560_ENABLED; 2735 } 2736 } 2737} 2738 2739struct cfdriver ral_cd = { 2740 NULL, "ral", DV_IFNET 2741}; 2742